Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	254847027	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

199748977

1

T1

4867

T2

1446

T3

1109

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	239882953	1			T1	4914		T2	1035		T3	1105
values[0x0]	103184871	1			T1	1063		T2	474		T3	208
values[0x1]	111528180	1			T1	1191		T2	478		T3	217

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	198743151	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

255852853

1

T1

5377

T2

1561

T3

1204

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	1313115	1			T1	28		T2	9		T3	1
valid_sources[0x01]	2239834	1			T1	24		T2	12		T3	10
valid_sources[0x02]	1308792	1			T1	34		T2	5		T12	543
valid_sources[0x03]	1310917	1			T1	28		T2	8		T3	7
valid_sources[0x04]	1313493	1			T1	25		T2	3		T3	4
valid_sources[0x05]	1746097	1			T1	19		T2	2		T12	572
valid_sources[0x06]	1427012	1			T1	27		T2	8		T3	14
valid_sources[0x07]	2008851	1			T1	25		T2	13		T3	12
valid_sources[0x08]	1301947	1			T1	19		T2	6		T3	17
valid_sources[0x09]	2347197	1			T1	39		T2	4		T12	664
valid_sources[0x0a]	1388688	1			T1	30		T2	12		T12	560
valid_sources[0x0b]	1308380	1			T1	43		T2	5		T3	12
valid_sources[0x0c]	2238770	1			T1	25		T2	16		T3	1
valid_sources[0x0d]	2144839	1			T1	30		T2	19		T12	632
valid_sources[0x0e]	1409192	1			T1	31		T2	7		T12	538
valid_sources[0x0f]	1307385	1			T1	36		T2	14		T12	561
valid_sources[0x10]	1314018	1			T1	31		T2	6		T3	15
valid_sources[0x11]	1310805	1			T1	27		T2	7		T12	581
valid_sources[0x12]	2150323	1			T1	31		T2	9		T3	1
valid_sources[0x13]	1314593	1			T1	25		T2	9		T3	1
valid_sources[0x14]	1307261	1			T1	21		T2	9		T12	599
valid_sources[0x15]	3122263	1			T1	23		T2	9		T12	652
valid_sources[0x16]	2190451	1			T1	33		T2	10		T3	12
valid_sources[0x17]	1460117	1			T1	28		T2	3		T3	11
valid_sources[0x18]	2168588	1			T1	34		T2	5		T3	1
valid_sources[0x19]	1309877	1			T1	27		T2	8		T12	534
valid_sources[0x1a]	1306036	1			T1	30		T2	11		T12	693
valid_sources[0x1b]	1298419	1			T1	27		T2	5		T3	16
valid_sources[0x1c]	3790799	1			T1	28		T2	7		T12	526
valid_sources[0x1d]	1309639	1			T1	29		T2	7		T3	11
valid_sources[0x1e]	3357123	1			T1	25		T2	11		T3	3
valid_sources[0x1f]	3271144	1			T1	32		T2	4		T3	31
valid_sources[0x20]	1765448	1			T1	21		T2	2		T12	537
valid_sources[0x21]	1306503	1			T1	23		T2	5		T3	10
valid_sources[0x22]	1418786	1			T1	20		T2	8		T3	6
valid_sources[0x23]	1299154	1			T1	25		T2	6		T12	690
valid_sources[0x24]	1862838	1			T1	18		T2	2		T3	2
valid_sources[0x25]	1378082	1			T1	26		T2	4		T12	605
valid_sources[0x26]	1321052	1			T1	26		T3	4		T12	554
valid_sources[0x27]	1447698	1			T1	27		T2	1		T3	6
valid_sources[0x28]	1378295	1			T1	24		T2	3		T3	8
valid_sources[0x29]	1312052	1			T1	36		T2	10		T3	8
valid_sources[0x2a]	1320066	1			T1	32		T2	11		T12	669
valid_sources[0x2b]	2497448	1			T1	31		T2	4		T3	1
valid_sources[0x2c]	2627933	1			T1	24		T2	5		T3	16
valid_sources[0x2d]	1771368	1			T1	26		T2	5		T3	16
valid_sources[0x2e]	1414283	1			T1	29		T2	10		T3	2
valid_sources[0x2f]	1326917	1			T1	26		T2	4		T12	546
valid_sources[0x30]	1307834	1			T1	23		T2	7		T3	4
valid_sources[0x31]	1321462	1			T1	28		T2	6		T12	569
valid_sources[0x32]	3387174	1			T1	23		T2	14		T3	26
valid_sources[0x33]	1308198	1			T1	29		T2	9		T3	9
valid_sources[0x34]	1762385	1			T1	30		T2	10		T3	16
valid_sources[0x35]	1312676	1			T1	25		T2	2		T12	551
valid_sources[0x36]	2642165	1			T1	32		T2	14		T3	15
valid_sources[0x37]	1321289	1			T1	27		T3	1		T12	544
valid_sources[0x38]	2213196	1			T1	32		T2	7		T12	543
valid_sources[0x39]	1311313	1			T1	24		T2	7		T3	3
valid_sources[0x3a]	1307325	1			T1	26		T2	6		T3	1
valid_sources[0x3b]	1493944	1			T1	33		T2	2		T12	564
valid_sources[0x3c]	1330610	1			T1	25		T2	7		T12	558
valid_sources[0x3d]	1311310	1			T1	32		T2	7		T3	30
valid_sources[0x3e]	1312066	1			T1	23		T2	6		T3	16
valid_sources[0x3f]	1311978	1			T1	27		T2	8		T3	6
valid_sources[0x40]	1314384	1			T1	42		T2	6		T12	679
valid_sources[0x41]	1315086	1			T1	24		T2	15		T3	9
valid_sources[0x42]	3356356	1			T1	20		T2	6		T3	23
valid_sources[0x43]	1309775	1			T1	26		T2	9		T3	1
valid_sources[0x44]	1305086	1			T1	22		T2	8		T3	11
valid_sources[0x45]	1440096	1			T1	20		T2	6		T3	4
valid_sources[0x46]	3475055	1			T1	23		T2	8		T12	512
valid_sources[0x47]	1303766	1			T1	26		T2	9		T3	3
valid_sources[0x48]	1775579	1			T1	21		T2	10		T3	22
valid_sources[0x49]	4217334	1			T1	24		T2	9		T3	2
valid_sources[0x4a]	1302674	1			T1	28		T2	3		T12	588
valid_sources[0x4b]	1305671	1			T1	33		T2	3		T3	3
valid_sources[0x4c]	3362385	1			T1	30		T2	7		T3	8
valid_sources[0x4d]	1309681	1			T1	34		T2	9		T3	1
valid_sources[0x4e]	1328187	1			T1	23		T2	10		T3	3
valid_sources[0x4f]	1309357	1			T1	31		T2	5		T3	7
valid_sources[0x50]	1317881	1			T1	24		T2	11		T12	606
valid_sources[0x51]	3374641	1			T1	26		T2	9		T12	671
valid_sources[0x52]	1313832	1			T1	32		T2	1		T12	611
valid_sources[0x53]	1304850	1			T1	34		T2	12		T3	1
valid_sources[0x54]	1308912	1			T1	25		T2	7		T3	22
valid_sources[0x55]	2172713	1			T1	27		T2	1		T3	7
valid_sources[0x56]	1321285	1			T1	36		T2	13		T3	9
valid_sources[0x57]	1311646	1			T1	30		T2	9		T3	2
valid_sources[0x58]	1308365	1			T1	26		T2	8		T12	643
valid_sources[0x59]	1324445	1			T1	28		T2	4		T3	2
valid_sources[0x5a]	1323698	1			T1	28		T2	5		T12	615
valid_sources[0x5b]	2168762	1			T1	27		T2	17		T3	10
valid_sources[0x5c]	1310671	1			T1	33		T2	3		T3	3
valid_sources[0x5d]	1301533	1			T1	22		T2	6		T3	6
valid_sources[0x5e]	2230513	1			T1	24		T2	8		T12	631
valid_sources[0x5f]	1304610	1			T1	33		T2	16		T12	619
valid_sources[0x60]	3327395	1			T1	33		T2	10		T3	25
valid_sources[0x61]	1430102	1			T1	28		T2	15		T12	584
valid_sources[0x62]	1303351	1			T1	28		T2	4		T12	518
valid_sources[0x63]	2178569	1			T1	21		T2	13		T3	8
valid_sources[0x64]	1982012	1			T1	26		T2	7		T3	1
valid_sources[0x65]	1330475	1			T1	31		T2	5		T3	7
valid_sources[0x66]	1361304	1			T1	28		T2	4		T3	11
valid_sources[0x67]	1305796	1			T1	25		T2	11		T3	3
valid_sources[0x68]	1304277	1			T1	27		T2	10		T12	548
valid_sources[0x69]	1312593	1			T1	26		T2	16		T12	594
valid_sources[0x6a]	1320986	1			T1	27		T2	9		T3	5
valid_sources[0x6b]	1308650	1			T1	29		T2	6		T12	553
valid_sources[0x6c]	2208662	1			T1	30		T2	5		T3	27
valid_sources[0x6d]	1485035	1			T1	37		T2	4		T12	598
valid_sources[0x6e]	1310514	1			T1	27		T2	4		T3	29
valid_sources[0x6f]	1314068	1			T1	22		T2	6		T3	2
valid_sources[0x70]	1324549	1			T1	26		T2	7		T3	30
valid_sources[0x71]	1986979	1			T1	30		T2	12		T12	677
valid_sources[0x72]	1307264	1			T1	32		T2	9		T3	5
valid_sources[0x73]	1987989	1			T1	32		T2	8		T12	486
valid_sources[0x74]	1306199	1			T1	26		T2	3		T3	2
valid_sources[0x75]	1316920	1			T1	35		T2	8		T3	3
valid_sources[0x76]	2185807	1			T1	30		T2	8		T3	12
valid_sources[0x77]	1810395	1			T1	28		T2	12		T3	8
valid_sources[0x78]	1308125	1			T1	27		T2	8		T3	11
valid_sources[0x79]	1313811	1			T1	28		T2	4		T3	7
valid_sources[0x7a]	1307295	1			T1	26		T2	19		T3	3
valid_sources[0x7b]	1308556	1			T1	25		T2	7		T12	682
valid_sources[0x7c]	1314366	1			T1	32		T2	22		T3	8
valid_sources[0x7d]	3360595	1			T1	34		T2	9		T3	13
valid_sources[0x7e]	2438924	1			T1	22		T2	10		T3	5
valid_sources[0x7f]	1318905	1			T1	36		T2	5		T3	7
valid_sources[0x80]	2093763	1			T1	29		T2	12		T12	527

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

87001255

1

T1

3491

T2

700

T3

829

values[0x0]

all_enables

biggest_size

60664994

1

T1

699

T2

376

T3

148

values[0x1]

all_enables

biggest_size

52082728

1

T1

677

T2

370

T3

132