Summary for Variable app_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for app_err
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
348362 |
1 |
|
|
T1 |
2 |
|
T5 |
2185 |
|
T17 |
2402 |
Summary for Variable data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
8 |
0 |
8 |
100.00 |
User Defined Bins for data_strb
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
185257 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
full_data_beat |
119063 |
1 |
|
|
T1 |
2 |
|
T5 |
57 |
|
T17 |
72 |
seven_bytes |
6283 |
1 |
|
|
T5 |
66 |
|
T17 |
65 |
|
T18 |
8 |
six_bytes |
6347 |
1 |
|
|
T5 |
60 |
|
T17 |
63 |
|
T18 |
13 |
five_bytes |
6324 |
1 |
|
|
T5 |
54 |
|
T17 |
78 |
|
T18 |
13 |
four_bytes |
6264 |
1 |
|
|
T5 |
50 |
|
T17 |
69 |
|
T18 |
11 |
three_bytes |
6390 |
1 |
|
|
T5 |
54 |
|
T17 |
64 |
|
T18 |
12 |
two_bytes |
6184 |
1 |
|
|
T5 |
52 |
|
T17 |
68 |
|
T18 |
12 |
one_byte |
6250 |
1 |
|
|
T5 |
69 |
|
T17 |
49 |
|
T18 |
8 |
Summary for Variable done
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for done
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
341783 |
1 |
|
|
T1 |
2 |
|
T5 |
2149 |
|
T17 |
2372 |
auto[1] |
6579 |
1 |
|
|
T5 |
36 |
|
T17 |
30 |
|
T18 |
6 |
Summary for Variable in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for in_keccak_rounds
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
348362 |
1 |
|
|
T1 |
2 |
|
T5 |
2185 |
|
T17 |
2402 |
Summary for Variable single_data_beat
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for single_data_beat
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
348329 |
1 |
|
|
T1 |
2 |
|
T5 |
2185 |
|
T17 |
2402 |
auto[1] |
33 |
1 |
|
|
T22 |
1 |
|
T44 |
3 |
|
T45 |
3 |
Summary for Cross partial_data_on_last_beat
Samples crossed: done data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for partial_data_on_last_beat
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
2270 |
1 |
|
|
T5 |
7 |
|
T17 |
5 |
|
T18 |
1 |
Summary for Cross done_in_keccak_rounds
Samples crossed: done in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for done_in_keccak_rounds
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
6579 |
1 |
|
|
T5 |
36 |
|
T17 |
30 |
|
T18 |
6 |
Summary for Variable app_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for app_err
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
170197 |
1 |
|
|
T5 |
2181 |
|
T17 |
810 |
|
T18 |
64 |
Summary for Variable data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
8 |
0 |
8 |
100.00 |
User Defined Bins for data_strb
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
88032 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
full_data_beat |
60886 |
1 |
|
|
T5 |
85 |
|
T17 |
25 |
|
T18 |
2 |
seven_bytes |
3085 |
1 |
|
|
T5 |
59 |
|
T17 |
25 |
|
T18 |
1 |
six_bytes |
3051 |
1 |
|
|
T5 |
44 |
|
T17 |
25 |
|
T18 |
1 |
five_bytes |
3128 |
1 |
|
|
T5 |
70 |
|
T17 |
29 |
|
T18 |
1 |
four_bytes |
3059 |
1 |
|
|
T5 |
61 |
|
T17 |
20 |
|
T18 |
2 |
three_bytes |
2948 |
1 |
|
|
T5 |
53 |
|
T17 |
23 |
|
T18 |
1 |
two_bytes |
2998 |
1 |
|
|
T5 |
66 |
|
T17 |
25 |
|
T24 |
17 |
one_byte |
3010 |
1 |
|
|
T5 |
52 |
|
T17 |
26 |
|
T18 |
2 |
Summary for Variable done
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for done
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
166973 |
1 |
|
|
T5 |
2157 |
|
T17 |
800 |
|
T18 |
62 |
auto[1] |
3224 |
1 |
|
|
T5 |
24 |
|
T17 |
10 |
|
T18 |
2 |
Summary for Variable in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for in_keccak_rounds
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
170197 |
1 |
|
|
T5 |
2181 |
|
T17 |
810 |
|
T18 |
64 |
Summary for Variable single_data_beat
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for single_data_beat
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
170191 |
1 |
|
|
T5 |
2181 |
|
T17 |
810 |
|
T18 |
64 |
auto[1] |
6 |
1 |
|
|
T132 |
1 |
|
T133 |
1 |
|
T134 |
1 |
Summary for Cross partial_data_on_last_beat
Samples crossed: done data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for partial_data_on_last_beat
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
1114 |
1 |
|
|
T5 |
3 |
|
T24 |
1 |
|
T22 |
4 |
Summary for Cross done_in_keccak_rounds
Samples crossed: done in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for done_in_keccak_rounds
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
3224 |
1 |
|
|
T5 |
24 |
|
T17 |
10 |
|
T18 |
2 |
Summary for Variable app_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for app_err
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
174256 |
1 |
|
|
T5 |
1181 |
|
T17 |
775 |
|
T18 |
291 |
Summary for Variable data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
8 |
0 |
8 |
100.00 |
User Defined Bins for data_strb
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
89246 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
full_data_beat |
63836 |
1 |
|
|
T5 |
33 |
|
T17 |
20 |
|
T18 |
119 |
seven_bytes |
3089 |
1 |
|
|
T5 |
26 |
|
T17 |
17 |
|
T18 |
6 |
six_bytes |
3019 |
1 |
|
|
T5 |
33 |
|
T17 |
21 |
|
T18 |
6 |
five_bytes |
2995 |
1 |
|
|
T5 |
40 |
|
T17 |
18 |
|
T18 |
6 |
four_bytes |
2956 |
1 |
|
|
T5 |
40 |
|
T17 |
30 |
|
T18 |
2 |
three_bytes |
2947 |
1 |
|
|
T5 |
36 |
|
T17 |
26 |
|
T18 |
3 |
two_bytes |
3123 |
1 |
|
|
T5 |
34 |
|
T17 |
21 |
|
T18 |
5 |
one_byte |
3045 |
1 |
|
|
T5 |
42 |
|
T17 |
17 |
|
T18 |
8 |
Summary for Variable done
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for done
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
170878 |
1 |
|
|
T5 |
1167 |
|
T17 |
763 |
|
T18 |
285 |
auto[1] |
3378 |
1 |
|
|
T5 |
14 |
|
T17 |
12 |
|
T18 |
6 |
Summary for Variable in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for in_keccak_rounds
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
174256 |
1 |
|
|
T5 |
1181 |
|
T17 |
775 |
|
T18 |
291 |
Summary for Variable single_data_beat
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for single_data_beat
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
174244 |
1 |
|
|
T5 |
1181 |
|
T17 |
775 |
|
T18 |
291 |
auto[1] |
12 |
1 |
|
|
T44 |
1 |
|
T45 |
1 |
|
T135 |
1 |
Summary for Cross partial_data_on_last_beat
Samples crossed: done data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for partial_data_on_last_beat
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
1163 |
1 |
|
|
T5 |
3 |
|
T17 |
3 |
|
T18 |
2 |
Summary for Cross done_in_keccak_rounds
Samples crossed: done in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for done_in_keccak_rounds
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
3378 |
1 |
|
|
T5 |
14 |
|
T17 |
12 |
|
T18 |
6 |