Unified Coverage Report :: Group :: dv_base_reg_pkg::mubi_cov#(4,32'h00000006,32'h00000009)::mubi_cg

Group : dv_base_reg_pkg::mubi_cov#(4,32'h00000006,32'h00000009)::mubi_cg

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_dv_base_reg_0/dv_base_mubi_cov.sv

2 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
mubi4_cov_of_mubi4_cov_of_tb.dut.kmac_sha3_absorb_mubi_cov_if	100.00	1	100	1	64	64
mubi4_cov_of_mubi4_cov_of_tb.dut.kmac_sha3_done_mubi_cov_if	100.00	1	100	1	64	64

---

Group Instance : mubi4_cov_of_mubi4_cov_of_tb.dut.kmac_sha3_absorb_mubi_cov_if

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance mubi4_cov_of_mubi4_cov_of_tb.dut.kmac_sha3_absorb_mubi_cov_if

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	6	0	6	100.00

Variables for Group Instance mubi4_cov_of_mubi4_cov_of_tb.dut.kmac_sha3_absorb_mubi_cov_if

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_value	6	0	6	100.00	100	1	1	0

---

Group Instance : mubi4_cov_of_mubi4_cov_of_tb.dut.kmac_sha3_done_mubi_cov_if

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance mubi4_cov_of_mubi4_cov_of_tb.dut.kmac_sha3_done_mubi_cov_if

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	6	0	6	100.00

Variables for Group Instance mubi4_cov_of_mubi4_cov_of_tb.dut.kmac_sha3_done_mubi_cov_if

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_value	6	0	6	100.00	100	1	1	0

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	6	0	6	100.00

User Defined Bins for cp_value

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	527	1			T1	9		T15	10		T17	10
others[1]	518	1			T1	16		T15	5		T17	12
others[2]	501	1			T1	12		T15	7		T17	11
others[3]	854	1			T1	18		T15	5		T17	24
false	350215	1			T1	313		T2	25		T3	21
true	347422	1			T1	306		T2	24		T3	20

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	6	0	6	100.00

User Defined Bins for cp_value

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	853	1			T1	13		T15	8		T17	13
others[1]	511	1			T1	8		T15	5		T17	9
others[2]	510	1			T1	17		T15	5		T17	8
others[3]	861	1			T1	17		T15	9		T17	27
false	350548	1			T1	313		T2	25		T3	21
true	347420	1			T1	306		T2	24		T3	20