Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	253330764	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

199633943

1

T1

195048

T2

3782

T3

12003

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	239160782	1			T1	218281		T2	3060		T3	12714
values[0x0]	102804976	1			T1	68261		T2	629		T3	2656
values[0x1]	110998949	1			T1	73435		T2	724		T3	2789

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	197586814	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

255377893

1

T1

231545

T2

3938

T3

13301

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	1379126	1			T1	1371		T2	22		T3	3
valid_sources[0x01]	1351276	1			T1	1338		T2	19		T3	1
valid_sources[0x02]	3793394	1			T1	1447		T2	15		T3	9
valid_sources[0x03]	1971998	1			T1	1402		T2	6		T3	3
valid_sources[0x04]	1352762	1			T1	1307		T2	16		T3	5
valid_sources[0x05]	1350635	1			T1	1360		T2	16		T3	6
valid_sources[0x06]	1353088	1			T1	1430		T2	13		T3	3
valid_sources[0x07]	3414194	1			T1	1468		T2	20		T3	3
valid_sources[0x08]	1359786	1			T1	1296		T2	17		T3	2
valid_sources[0x09]	1493579	1			T1	1440		T2	13		T3	5
valid_sources[0x0a]	1363160	1			T1	1418		T2	20		T3	3
valid_sources[0x0b]	1347624	1			T1	1350		T2	7		T3	4
valid_sources[0x0c]	1353488	1			T1	1281		T2	21		T3	5
valid_sources[0x0d]	1345844	1			T1	1447		T2	21		T3	6
valid_sources[0x0e]	1353507	1			T1	1425		T2	15		T3	3
valid_sources[0x0f]	1348201	1			T1	1414		T2	14		T3	4
valid_sources[0x10]	1357021	1			T1	1476		T2	18		T3	3
valid_sources[0x11]	1358523	1			T1	1454		T2	25		T3	5
valid_sources[0x12]	2013726	1			T1	1419		T2	29		T3	5
valid_sources[0x13]	1379978	1			T1	1336		T2	17		T3	4
valid_sources[0x14]	1350336	1			T1	1414		T2	10		T3	4
valid_sources[0x15]	1392141	1			T1	1331		T2	20		T3	9
valid_sources[0x16]	1354785	1			T1	1394		T2	24		T3	3
valid_sources[0x17]	1352614	1			T1	1406		T2	13		T3	8
valid_sources[0x18]	2009869	1			T1	1337		T2	18		T3	7
valid_sources[0x19]	2310148	1			T1	1376		T2	17		T3	2
valid_sources[0x1a]	1352178	1			T1	1399		T2	11		T3	4
valid_sources[0x1b]	1350158	1			T1	1422		T2	13		T3	6
valid_sources[0x1c]	1432991	1			T1	1457		T2	12		T3	3
valid_sources[0x1d]	1358850	1			T1	1369		T2	18		T3	7
valid_sources[0x1e]	1347085	1			T1	1393		T2	15		T3	3
valid_sources[0x1f]	4391897	1			T1	1503		T2	13		T3	4
valid_sources[0x20]	1343729	1			T1	1489		T2	10		T3	4
valid_sources[0x21]	2005284	1			T1	1368		T2	16		T3	5
valid_sources[0x22]	1350189	1			T1	1368		T2	15		T3	4
valid_sources[0x23]	1472237	1			T1	1369		T2	18		T3	5
valid_sources[0x24]	1470425	1			T1	1411		T2	17		T3	2
valid_sources[0x25]	1361127	1			T1	1396		T2	14		T3	6
valid_sources[0x26]	1352353	1			T1	1466		T2	11		T3	7
valid_sources[0x27]	1346038	1			T1	1425		T2	14		T3	7
valid_sources[0x28]	1380016	1			T1	1419		T2	13		T3	4
valid_sources[0x29]	1357399	1			T1	1463		T2	22		T3	4
valid_sources[0x2a]	1434870	1			T1	1426		T2	11		T3	5
valid_sources[0x2b]	2342696	1			T1	1474		T2	17		T3	6
valid_sources[0x2c]	1349008	1			T1	1325		T2	20		T3	6
valid_sources[0x2d]	1466774	1			T1	1454		T2	24		T3	5
valid_sources[0x2e]	3210048	1			T1	1419		T2	19		T3	3
valid_sources[0x2f]	1888838	1			T1	1351		T2	19		T3	6
valid_sources[0x30]	5607879	1			T1	1364		T2	18		T3	4
valid_sources[0x31]	1352861	1			T1	1419		T2	21		T3	2
valid_sources[0x32]	2394764	1			T1	1425		T2	15		T3	5
valid_sources[0x33]	1449623	1			T1	1399		T2	15		T3	4
valid_sources[0x34]	3385752	1			T1	1421		T2	19		T3	3
valid_sources[0x35]	1418431	1			T1	1340		T2	15		T3	8
valid_sources[0x36]	1357887	1			T1	1409		T2	21		T3	4
valid_sources[0x37]	3757620	1			T1	1526		T2	17		T3	7
valid_sources[0x38]	1352403	1			T1	1360		T2	14		T3	10
valid_sources[0x39]	2227414	1			T1	1363		T2	27		T3	3
valid_sources[0x3a]	2025516	1			T1	1277		T2	9		T3	6
valid_sources[0x3b]	1356159	1			T1	1373		T2	16		T3	5
valid_sources[0x3c]	2288484	1			T1	1380		T2	24		T3	1
valid_sources[0x3d]	1357679	1			T1	1391		T2	13		T3	2
valid_sources[0x3e]	1432140	1			T1	1431		T2	22		T3	1
valid_sources[0x3f]	1349219	1			T1	1374		T2	21		T3	3
valid_sources[0x40]	3460870	1			T1	1454		T2	24		T3	8
valid_sources[0x41]	2052232	1			T1	1521		T2	15		T14	105
valid_sources[0x42]	1352691	1			T1	1326		T2	15		T3	5
valid_sources[0x43]	1353482	1			T1	1466		T2	9		T3	3
valid_sources[0x44]	3735165	1			T1	1387		T2	15		T3	1
valid_sources[0x45]	1378499	1			T1	1407		T2	12		T3	2
valid_sources[0x46]	1352311	1			T1	1365		T2	17		T3	4
valid_sources[0x47]	5804645	1			T1	1393		T2	17		T3	7
valid_sources[0x48]	3057473	1			T1	1335		T2	18		T3	7
valid_sources[0x49]	1534143	1			T1	1434		T2	14		T3	3
valid_sources[0x4a]	2210578	1			T1	1418		T2	18		T3	5
valid_sources[0x4b]	1344422	1			T1	1434		T2	19		T3	4
valid_sources[0x4c]	1354317	1			T1	1374		T2	15		T3	5
valid_sources[0x4d]	3385157	1			T1	1402		T2	20		T3	5
valid_sources[0x4e]	1350406	1			T1	1399		T2	11		T3	2
valid_sources[0x4f]	1446502	1			T1	1432		T2	17		T3	3
valid_sources[0x50]	2025948	1			T1	1445		T2	25		T3	4
valid_sources[0x51]	1804454	1			T1	1484		T2	18		T3	7
valid_sources[0x52]	1356780	1			T1	1454		T2	16		T3	4
valid_sources[0x53]	1346020	1			T1	1330		T2	10		T3	3
valid_sources[0x54]	2051717	1			T1	1365		T2	19		T3	2
valid_sources[0x55]	1356221	1			T1	1492		T2	10		T3	6
valid_sources[0x56]	1359572	1			T1	1394		T2	31		T3	3
valid_sources[0x57]	1352579	1			T1	1462		T2	10		T3	5
valid_sources[0x58]	1347881	1			T1	1446		T2	23		T3	3
valid_sources[0x59]	2016047	1			T1	1447		T2	11		T3	5
valid_sources[0x5a]	1369722	1			T1	1510		T2	20		T3	16994
valid_sources[0x5b]	2005703	1			T1	1469		T2	15		T3	5
valid_sources[0x5c]	1409110	1			T1	1302		T2	15		T3	3
valid_sources[0x5d]	1353121	1			T1	1350		T2	16		T3	6
valid_sources[0x5e]	1356354	1			T1	1554		T2	15		T3	8
valid_sources[0x5f]	1346437	1			T1	1361		T2	22		T3	3
valid_sources[0x60]	1355706	1			T1	1369		T2	27		T3	3
valid_sources[0x61]	1815782	1			T1	1486		T2	20		T3	1
valid_sources[0x62]	1352558	1			T1	1513		T2	10		T3	6
valid_sources[0x63]	1345093	1			T1	1396		T2	19		T3	5
valid_sources[0x64]	1360727	1			T1	1354		T2	21		T3	3
valid_sources[0x65]	3429439	1			T1	1419		T2	18		T3	7
valid_sources[0x66]	1816854	1			T1	1412		T2	16		T3	5
valid_sources[0x67]	4327454	1			T1	1428		T2	23		T3	2
valid_sources[0x68]	1446342	1			T1	1404		T2	18		T3	5
valid_sources[0x69]	1354227	1			T1	1343		T2	13		T3	5
valid_sources[0x6a]	1542312	1			T1	1450		T2	18		T3	4
valid_sources[0x6b]	1354437	1			T1	1447		T2	16		T3	4
valid_sources[0x6c]	3379911	1			T1	1438		T2	20		T3	5
valid_sources[0x6d]	1353843	1			T1	1383		T2	14		T3	8
valid_sources[0x6e]	1915638	1			T1	1401		T2	17		T3	5
valid_sources[0x6f]	2287673	1			T1	1321		T2	17		T3	7
valid_sources[0x70]	2206792	1			T1	1511		T2	16		T3	8
valid_sources[0x71]	1836505	1			T1	1406		T2	26		T3	6
valid_sources[0x72]	1385611	1			T1	1485		T2	22		T3	4
valid_sources[0x73]	2271032	1			T1	1408		T2	22		T3	2
valid_sources[0x74]	1682536	1			T1	1485		T2	18		T3	3
valid_sources[0x75]	2101302	1			T1	1360		T2	13		T3	4
valid_sources[0x76]	1405708	1			T1	1351		T2	16		T3	4
valid_sources[0x77]	4310689	1			T1	1355		T2	11		T3	3
valid_sources[0x78]	1395789	1			T1	1464		T2	21		T3	5
valid_sources[0x79]	1354459	1			T1	1406		T2	13		T3	7
valid_sources[0x7a]	1344291	1			T1	1388		T2	22		T3	3
valid_sources[0x7b]	1508201	1			T1	1426		T2	18		T3	5
valid_sources[0x7c]	1352665	1			T1	1393		T2	24		T3	2
valid_sources[0x7d]	1350065	1			T1	1353		T2	17		T3	7
valid_sources[0x7e]	1351103	1			T1	1466		T2	17		T3	6
valid_sources[0x7f]	1354598	1			T1	1333		T2	15		T3	6
valid_sources[0x80]	1448842	1			T1	1421		T2	16		T3	2

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

87012262

1

T1

118862

T2

2722

T3

8879

values[0x0]

all_enables

biggest_size

60585283

1

T1

40878

T2

508

T3

1644

values[0x1]

all_enables

biggest_size

52036398

1

T1

35308

T2

552

T3

1480