Group : kmac_env_pkg::app_cg_wrap::app_cfg_reg_cg
 
Group Instance : AppKeymgr_cg_(1)
| SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING | 
| 100.00 | 1 | 100 | 1 | 64 | 64 | 
 
Summary for Group Instance   AppKeymgr_cg_(1)
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Variables | 3 | 0 | 3 | 100.00 | 
Variables for Group Instance  AppKeymgr_cg_(1)
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT | 
| sw_configured_hash_mode | 3 | 0 | 3 | 100.00 | 100 | 1 | 1 | 0 |  | 
 
Group Instance : AppLc_cg_(1)
| SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING | 
| 100.00 | 1 | 100 | 1 | 64 | 64 | 
 
Summary for Group Instance   AppLc_cg_(1)
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Variables | 3 | 0 | 3 | 100.00 | 
Variables for Group Instance  AppLc_cg_(1)
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT | 
| sw_configured_hash_mode | 3 | 0 | 3 | 100.00 | 100 | 1 | 1 | 0 |  | 
 
Group Instance : AppRom_cg_(1)
| SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING | 
| 100.00 | 1 | 100 | 1 | 64 | 64 | 
 
Summary for Group Instance   AppRom_cg_(1)
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Variables | 3 | 0 | 3 | 100.00 | 
Variables for Group Instance  AppRom_cg_(1)
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT | 
| sw_configured_hash_mode | 3 | 0 | 3 | 100.00 | 100 | 1 | 1 | 0 |  | 
 
 
Summary for Variable sw_configured_hash_mode
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 3 | 0 | 3 | 100.00 | 
User Defined Bins for sw_configured_hash_mode
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| cshake | 1108 | 1 |  |  | T4 | 6 |  | T23 | 41 |  | T30 | 8 | 
| shake | 1177 | 1 |  |  | T4 | 12 |  | T16 | 1 |  | T23 | 20 | 
| sha3 | 1130 | 1 |  |  | T4 | 5 |  | T23 | 18 |  | T29 | 1 | 
 
Summary for Variable sw_configured_hash_mode
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 3 | 0 | 3 | 100.00 | 
User Defined Bins for sw_configured_hash_mode
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| cshake | 546 | 1 |  |  | T4 | 6 |  | T23 | 12 |  | T30 | 4 | 
| shake | 578 | 1 |  |  | T4 | 8 |  | T23 | 11 |  | T29 | 1 | 
| sha3 | 549 | 1 |  |  | T4 | 5 |  | T23 | 14 |  | T30 | 2 | 
 
Summary for Variable sw_configured_hash_mode
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 3 | 0 | 3 | 100.00 | 
User Defined Bins for sw_configured_hash_mode
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| cshake | 557 | 1 |  |  | T4 | 7 |  | T23 | 17 |  | T30 | 3 | 
| shake | 543 | 1 |  |  | T4 | 3 |  | T23 | 10 |  | T30 | 1 | 
| sha3 | 563 | 1 |  |  | T4 | 3 |  | T23 | 22 |  | T29 | 1 | 
 
 
 
| 0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |