Summary for Variable app_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for app_err
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
342908 |
1 |
|
|
T4 |
3126 |
|
T16 |
85 |
|
T23 |
4847 |
Summary for Variable data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
8 |
0 |
8 |
100.00 |
User Defined Bins for data_strb
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
165072 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
full_data_beat |
138602 |
1 |
|
|
T4 |
82 |
|
T16 |
84 |
|
T23 |
4768 |
seven_bytes |
5612 |
1 |
|
|
T4 |
92 |
|
T30 |
62 |
|
T27 |
64 |
six_bytes |
5528 |
1 |
|
|
T4 |
95 |
|
T30 |
56 |
|
T27 |
58 |
five_bytes |
5602 |
1 |
|
|
T4 |
82 |
|
T30 |
59 |
|
T27 |
79 |
four_bytes |
5661 |
1 |
|
|
T4 |
76 |
|
T30 |
80 |
|
T27 |
93 |
three_bytes |
5583 |
1 |
|
|
T4 |
95 |
|
T30 |
44 |
|
T27 |
76 |
two_bytes |
5570 |
1 |
|
|
T4 |
73 |
|
T30 |
75 |
|
T27 |
82 |
one_byte |
5678 |
1 |
|
|
T4 |
93 |
|
T30 |
79 |
|
T27 |
71 |
Summary for Variable done
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for done
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
336078 |
1 |
|
|
T4 |
3080 |
|
T16 |
83 |
|
T23 |
4689 |
auto[1] |
6830 |
1 |
|
|
T4 |
46 |
|
T16 |
2 |
|
T23 |
158 |
Summary for Variable in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for in_keccak_rounds
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
342908 |
1 |
|
|
T4 |
3126 |
|
T16 |
85 |
|
T23 |
4847 |
Summary for Variable single_data_beat
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for single_data_beat
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
342876 |
1 |
|
|
T4 |
3126 |
|
T16 |
85 |
|
T23 |
4844 |
auto[1] |
32 |
1 |
|
|
T23 |
3 |
|
T28 |
1 |
|
T168 |
1 |
Summary for Cross partial_data_on_last_beat
Samples crossed: done data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for partial_data_on_last_beat
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
2517 |
1 |
|
|
T4 |
8 |
|
T16 |
1 |
|
T23 |
79 |
Summary for Cross done_in_keccak_rounds
Samples crossed: done in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for done_in_keccak_rounds
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
6830 |
1 |
|
|
T4 |
46 |
|
T16 |
2 |
|
T23 |
158 |
Summary for Variable app_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for app_err
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
164372 |
1 |
|
|
T4 |
2488 |
|
T23 |
1992 |
|
T29 |
115 |
Summary for Variable data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
8 |
0 |
8 |
100.00 |
User Defined Bins for data_strb
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
78442 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
full_data_beat |
67365 |
1 |
|
|
T4 |
80 |
|
T23 |
1955 |
|
T29 |
114 |
seven_bytes |
2650 |
1 |
|
|
T4 |
60 |
|
T30 |
49 |
|
T27 |
21 |
six_bytes |
2557 |
1 |
|
|
T4 |
67 |
|
T30 |
42 |
|
T27 |
20 |
five_bytes |
2771 |
1 |
|
|
T4 |
69 |
|
T30 |
40 |
|
T27 |
33 |
four_bytes |
2620 |
1 |
|
|
T4 |
81 |
|
T30 |
40 |
|
T27 |
29 |
three_bytes |
2664 |
1 |
|
|
T4 |
66 |
|
T30 |
39 |
|
T27 |
30 |
two_bytes |
2651 |
1 |
|
|
T4 |
66 |
|
T30 |
54 |
|
T27 |
26 |
one_byte |
2652 |
1 |
|
|
T4 |
71 |
|
T30 |
48 |
|
T27 |
34 |
Summary for Variable done
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for done
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
161026 |
1 |
|
|
T4 |
2450 |
|
T23 |
1918 |
|
T29 |
113 |
auto[1] |
3346 |
1 |
|
|
T4 |
38 |
|
T23 |
74 |
|
T29 |
2 |
Summary for Variable in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for in_keccak_rounds
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
164372 |
1 |
|
|
T4 |
2488 |
|
T23 |
1992 |
|
T29 |
115 |
Summary for Variable single_data_beat
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for single_data_beat
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
164359 |
1 |
|
|
T4 |
2488 |
|
T23 |
1992 |
|
T29 |
115 |
auto[1] |
13 |
1 |
|
|
T169 |
1 |
|
T170 |
1 |
|
T171 |
1 |
Summary for Cross partial_data_on_last_beat
Samples crossed: done data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for partial_data_on_last_beat
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
1222 |
1 |
|
|
T4 |
5 |
|
T23 |
37 |
|
T29 |
1 |
Summary for Cross done_in_keccak_rounds
Samples crossed: done in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for done_in_keccak_rounds
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
3346 |
1 |
|
|
T4 |
38 |
|
T23 |
74 |
|
T29 |
2 |
Summary for Variable app_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for app_err
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
165893 |
1 |
|
|
T4 |
1957 |
|
T5 |
3 |
|
T23 |
3217 |
Summary for Variable data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
8 |
0 |
8 |
100.00 |
User Defined Bins for data_strb
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
79031 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
full_data_beat |
67864 |
1 |
|
|
T4 |
55 |
|
T5 |
3 |
|
T23 |
3168 |
seven_bytes |
2721 |
1 |
|
|
T4 |
45 |
|
T30 |
28 |
|
T27 |
49 |
six_bytes |
2704 |
1 |
|
|
T4 |
48 |
|
T30 |
31 |
|
T27 |
46 |
five_bytes |
2652 |
1 |
|
|
T4 |
65 |
|
T30 |
40 |
|
T27 |
53 |
four_bytes |
2689 |
1 |
|
|
T4 |
47 |
|
T30 |
35 |
|
T27 |
47 |
three_bytes |
2771 |
1 |
|
|
T4 |
45 |
|
T30 |
34 |
|
T27 |
56 |
two_bytes |
2752 |
1 |
|
|
T4 |
56 |
|
T30 |
32 |
|
T27 |
49 |
one_byte |
2709 |
1 |
|
|
T4 |
46 |
|
T30 |
26 |
|
T27 |
46 |
Summary for Variable done
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for done
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
162567 |
1 |
|
|
T4 |
1931 |
|
T5 |
3 |
|
T23 |
3119 |
auto[1] |
3326 |
1 |
|
|
T4 |
26 |
|
T23 |
98 |
|
T29 |
2 |
Summary for Variable in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for in_keccak_rounds
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
165893 |
1 |
|
|
T4 |
1957 |
|
T5 |
3 |
|
T23 |
3217 |
Summary for Variable single_data_beat
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for single_data_beat
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
165883 |
1 |
|
|
T4 |
1957 |
|
T5 |
3 |
|
T23 |
3217 |
auto[1] |
10 |
1 |
|
|
T168 |
1 |
|
T70 |
1 |
|
T172 |
1 |
Summary for Cross partial_data_on_last_beat
Samples crossed: done data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for partial_data_on_last_beat
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
1189 |
1 |
|
|
T4 |
3 |
|
T23 |
49 |
|
T29 |
1 |
Summary for Cross done_in_keccak_rounds
Samples crossed: done in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for done_in_keccak_rounds
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
3326 |
1 |
|
|
T4 |
26 |
|
T23 |
98 |
|
T29 |
2 |