Summary for Variable entropy_edn_mode_enabled
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 2 | 0 | 2 | 100.00 | 
Automatically Generated Bins for entropy_edn_mode_enabled
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| auto[0] | 226476 | 1 |  |  | T1 | 206 |  | T3 | 2 |  | T4 | 2 | 
| auto[1] | 182070 | 1 |  |  | T3 | 16 |  | T4 | 300 |  | T16 | 62 | 
Summary for Variable prescaler_val
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 3 | 0 | 3 | 100.00 | 
User Defined Bins for prescaler_val
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| higher_val | 102050 | 1 |  |  | T1 | 42 |  | T3 | 9 |  | T4 | 93 | 
| lower_val | 101139 | 1 |  |  | T1 | 54 |  | T4 | 62 |  | T15 | 8 | 
| zero_val | 1436 | 1 |  |  | T1 | 1 |  | T3 | 1 |  | T4 | 3 | 
Summary for Variable wait_timer_val
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 3 | 0 | 3 | 100.00 | 
User Defined Bins for wait_timer_val
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| higher_val | 204458 | 1 |  |  | T1 | 118 |  | T3 | 14 |  | T4 | 144 | 
| lower_val | 204082 | 1 |  |  | T1 | 88 |  | T3 | 4 |  | T4 | 158 | 
| zero_val | 6 | 1 |  |  | T166 | 2 |  | T167 | 2 |  | T168 | 2 | 
Summary for Cross entropy_timer_cross
Samples crossed: prescaler_val wait_timer_val entropy_edn_mode_enabled
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING | 
| Automatically Generated Cross Bins | 18 | 4 | 14 | 77.78 | 4 | 
Automatically Generated Cross Bins for entropy_timer_cross
Element holes
| prescaler_val | wait_timer_val | entropy_edn_mode_enabled | COUNT | AT LEAST | NUMBER | STATUS | 
| [higher_val] | [zero_val] | * | -- | -- | 2 |  | 
| [zero_val] | [zero_val] | * | -- | -- | 2 |  | 
Covered bins
| prescaler_val | wait_timer_val | entropy_edn_mode_enabled | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| higher_val | higher_val | auto[0] | 28132 | 1 |  |  | T1 | 23 |  | T4 | 1 |  | T14 | 4 | 
| higher_val | higher_val | auto[1] | 22987 | 1 |  |  | T3 | 8 |  | T4 | 42 |  | T16 | 8 | 
| higher_val | lower_val | auto[0] | 28289 | 1 |  |  | T1 | 19 |  | T14 | 3 |  | T15 | 2 | 
| higher_val | lower_val | auto[1] | 22642 | 1 |  |  | T3 | 1 |  | T4 | 50 |  | T16 | 7 | 
| lower_val | higher_val | auto[0] | 28039 | 1 |  |  | T1 | 32 |  | T15 | 4 |  | T19 | 100 | 
| lower_val | higher_val | auto[1] | 22484 | 1 |  |  | T4 | 31 |  | T16 | 10 |  | T17 | 73 | 
| lower_val | lower_val | auto[0] | 28053 | 1 |  |  | T1 | 22 |  | T15 | 4 |  | T16 | 1 | 
| lower_val | lower_val | auto[1] | 22561 | 1 |  |  | T4 | 31 |  | T16 | 7 |  | T17 | 57 | 
| lower_val | zero_val | auto[0] | 1 | 1 |  |  | T166 | 1 |  | - | - |  | - | - | 
| lower_val | zero_val | auto[1] | 1 | 1 |  |  | T168 | 1 |  | - | - |  | - | - | 
| zero_val | higher_val | auto[0] | 560 | 1 |  |  | T1 | 1 |  | T4 | 1 |  | T15 | 1 | 
| zero_val | higher_val | auto[1] | 151 | 1 |  |  | T4 | 1 |  | T28 | 1 |  | T154 | 1 | 
| zero_val | lower_val | auto[0] | 595 | 1 |  |  | T3 | 1 |  | T14 | 1 |  | T16 | 1 | 
| zero_val | lower_val | auto[1] | 130 | 1 |  |  | T4 | 1 |  | T28 | 1 |  | T169 | 2 |