Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	6005	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	6844	1			T4	32		T19	19		T67	38
len_5001_7500	11910	1			T4	65		T17	33		T19	18
len_2501_5000	7173	1			T4	11		T17	34		T19	18
len_1025_2500	4223	1			T4	15		T17	20		T19	11
len_769_1024	5597	1			T1	29		T4	3		T15	1
len_513_768	5947	1			T1	22		T4	1		T15	2
len_257_512	10960	1			T1	22		T4	2		T15	3
len_0_256	138904	1			T1	22		T3	9		T4	22
len_keccak_block_sizes[72]	537	1			T17	2		T19	2		T66	2
len_keccak_block_sizes[104]	437	1			T19	2		T67	3		T68	2
len_keccak_block_sizes[136]	345	1			T19	2		T67	3		T32	2
len_keccak_block_sizes[144]	236	1			T67	3		T29	1		T191	2
len_keccak_block_sizes[168]	141	1			T1	1		T67	3		T192	3
len_1	569	1			T17	2		T19	2		T66	2
len_0	982	1			T4	6		T17	2		T19	2