Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	0	14	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	0	14	100.00	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	0	14	100.00

User Defined Bins for output_digest_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	624	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	5161	1			T1	9		T4	25		T15	1
len_601_800	11427	1			T1	36		T4	55		T15	4
len_401_600	7566	1			T1	13		T4	40		T15	3
len_201_400	9625	1			T1	8		T4	17		T15	1
len_65_200	32435	1			T1	9		T4	7		T15	1
len_min_for_xof_require_squeeze	435	1			T1	1		T20	1		T67	10
len_keccak_block_sizes[72]	322	1			T67	5		T194	2		T192	5
len_keccak_block_sizes[104]	317	1			T67	5		T194	2		T192	5
len_keccak_block_sizes[136]	317	1			T67	5		T195	1		T192	5
len_keccak_block_sizes[144]	154	1			T67	5		T196	1		T192	5
len_keccak_block_sizes[168]	158	1			T67	5		T194	1		T192	5
len_datapath_width	13499	1			T3	3		T4	1		T14	3
len_2_63	122789	1			T1	7		T3	6		T4	5
len_1	49	1			T197	1		T198	1		T53	1