Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	159231260	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

129189754

1

T1

1402

T2

4145

T3

104519

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	151684218	1			T1	1105		T2	3657		T3	117540
values[0x0]	65766954	1			T1	476		T2	287		T3	26069
values[0x1]	70969842	1			T1	541		T2	333		T3	28485

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	124116105	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

164304909

1

T1

1568

T2

4179

T3

120390

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	2910378	1			T1	3		T3	659		T13	3421
valid_sources[0x01]	3929931	1			T1	10		T3	707		T13	3383
valid_sources[0x02]	838378	1			T1	3		T3	676		T13	3281
valid_sources[0x03]	1701319	1			T1	5		T3	719		T13	3399
valid_sources[0x04]	833673	1			T1	5		T3	672		T13	3478
valid_sources[0x05]	841216	1			T1	9		T3	676		T13	3564
valid_sources[0x06]	841806	1			T1	5		T3	661		T13	3428
valid_sources[0x07]	3249430	1			T1	10		T3	697		T13	3407
valid_sources[0x08]	836933	1			T1	8		T3	622		T13	3195
valid_sources[0x09]	852211	1			T1	5		T3	675		T13	3514
valid_sources[0x0a]	835196	1			T1	12		T3	686		T13	3300
valid_sources[0x0b]	835995	1			T1	3		T3	649		T13	3293
valid_sources[0x0c]	834274	1			T1	9		T3	677		T13	3344
valid_sources[0x0d]	1907639	1			T1	6		T3	666		T13	3205
valid_sources[0x0e]	839301	1			T1	8		T3	629		T13	3247
valid_sources[0x0f]	836613	1			T1	12		T3	646		T13	3257
valid_sources[0x10]	836207	1			T1	10		T3	623		T13	3330
valid_sources[0x11]	837671	1			T1	8		T3	679		T13	3169
valid_sources[0x12]	837189	1			T1	6		T3	660		T13	3232
valid_sources[0x13]	837885	1			T1	5		T3	606		T13	3433
valid_sources[0x14]	837448	1			T1	8		T3	692		T13	3338
valid_sources[0x15]	838825	1			T1	6		T3	694		T13	3454
valid_sources[0x16]	917536	1			T1	6		T3	615		T13	3236
valid_sources[0x17]	975866	1			T1	9		T3	632		T13	3473
valid_sources[0x18]	1163093	1			T1	8		T3	621		T13	3406
valid_sources[0x19]	2176089	1			T1	11		T3	698		T13	3365
valid_sources[0x1a]	834654	1			T1	4		T3	707		T13	3313
valid_sources[0x1b]	972822	1			T1	7		T3	618		T13	3152
valid_sources[0x1c]	838396	1			T1	8		T3	698		T13	3475
valid_sources[0x1d]	843342	1			T1	5		T3	719		T13	3205
valid_sources[0x1e]	837077	1			T1	7		T3	720		T13	3594
valid_sources[0x1f]	838069	1			T1	12		T3	678		T13	3457
valid_sources[0x20]	834793	1			T1	6		T3	690		T13	3386
valid_sources[0x21]	835645	1			T1	9		T3	629		T13	3325
valid_sources[0x22]	871135	1			T1	17		T3	702		T13	3329
valid_sources[0x23]	835598	1			T1	8		T3	637		T13	3172
valid_sources[0x24]	838508	1			T1	14		T3	718		T13	3333
valid_sources[0x25]	840044	1			T1	10		T3	656		T13	3418
valid_sources[0x26]	834324	1			T1	8		T3	686		T13	3274
valid_sources[0x27]	834018	1			T1	7		T3	675		T13	3317
valid_sources[0x28]	838866	1			T1	4		T3	617		T13	3227
valid_sources[0x29]	837146	1			T1	7		T3	669		T13	3337
valid_sources[0x2a]	1764556	1			T1	12		T3	642		T13	3414
valid_sources[0x2b]	836738	1			T1	10		T3	703		T13	3252
valid_sources[0x2c]	1299611	1			T1	9		T3	661		T13	3473
valid_sources[0x2d]	860449	1			T1	12		T3	663		T13	3577
valid_sources[0x2e]	3246354	1			T1	4		T3	627		T13	3329
valid_sources[0x2f]	2886431	1			T1	3		T3	722		T13	3424
valid_sources[0x30]	837095	1			T1	13		T3	668		T13	3623
valid_sources[0x31]	1740455	1			T1	10		T3	702		T13	3501
valid_sources[0x32]	838105	1			T1	6		T3	665		T13	3280
valid_sources[0x33]	836493	1			T1	10		T3	711		T13	3570
valid_sources[0x34]	894328	1			T1	9		T3	586		T13	3080
valid_sources[0x35]	1746637	1			T1	4		T3	693		T13	3373
valid_sources[0x36]	838980	1			T1	11		T3	610		T13	3344
valid_sources[0x37]	857489	1			T1	10		T3	699		T13	3474
valid_sources[0x38]	835347	1			T1	9		T3	674		T13	3321
valid_sources[0x39]	837614	1			T1	9		T3	652		T13	3576
valid_sources[0x3a]	833958	1			T1	12		T3	673		T13	3359
valid_sources[0x3b]	1735101	1			T1	7		T3	686		T13	3389
valid_sources[0x3c]	835750	1			T1	9		T3	665		T13	3533
valid_sources[0x3d]	915186	1			T1	8		T3	614		T13	3475
valid_sources[0x3e]	1062348	1			T1	7		T3	675		T13	3294
valid_sources[0x3f]	840845	1			T1	4		T3	619		T13	3374
valid_sources[0x40]	1710567	1			T1	3		T3	652		T13	3290
valid_sources[0x41]	841237	1			T1	5		T3	708		T13	3457
valid_sources[0x42]	837578	1			T1	6		T3	664		T13	3545
valid_sources[0x43]	2895969	1			T1	11		T3	637		T13	3491
valid_sources[0x44]	935946	1			T1	2		T3	686		T13	3429
valid_sources[0x45]	1288242	1			T1	1		T3	675		T13	3429
valid_sources[0x46]	3256038	1			T1	16		T3	717		T13	3267
valid_sources[0x47]	836940	1			T1	9		T3	676		T13	3620
valid_sources[0x48]	835111	1			T1	10		T3	627		T13	3376
valid_sources[0x49]	834095	1			T1	4		T3	691		T13	3308
valid_sources[0x4a]	961017	1			T1	7		T3	660		T13	3488
valid_sources[0x4b]	835939	1			T1	9		T3	657		T13	3221
valid_sources[0x4c]	836907	1			T1	9		T3	659		T13	3405
valid_sources[0x4d]	995512	1			T1	6		T3	670		T13	3517
valid_sources[0x4e]	835696	1			T1	7		T3	693		T13	3478
valid_sources[0x4f]	1038467	1			T1	8		T3	709		T13	3475
valid_sources[0x50]	841530	1			T1	7		T3	708		T13	3342
valid_sources[0x51]	840267	1			T1	9		T3	679		T13	3741
valid_sources[0x52]	837492	1			T1	8		T3	715		T13	3745
valid_sources[0x53]	3005570	1			T1	13		T3	640		T13	3290
valid_sources[0x54]	837388	1			T1	7		T3	645		T13	3392
valid_sources[0x55]	837373	1			T1	9		T3	620		T13	3356
valid_sources[0x56]	1691168	1			T1	11		T3	680		T13	3434
valid_sources[0x57]	841305	1			T1	9		T3	667		T13	3480
valid_sources[0x58]	852018	1			T1	10		T3	650		T13	3314
valid_sources[0x59]	837378	1			T1	7		T3	668		T13	3521
valid_sources[0x5a]	835871	1			T1	7		T3	677		T13	3323
valid_sources[0x5b]	884586	1			T1	8		T3	652		T13	3482
valid_sources[0x5c]	839716	1			T1	8		T3	614		T13	3192
valid_sources[0x5d]	841662	1			T1	11		T3	664		T13	3648
valid_sources[0x5e]	1493917	1			T1	9		T3	699		T13	3405
valid_sources[0x5f]	873619	1			T1	11		T3	700		T13	3479
valid_sources[0x60]	1420787	1			T1	17		T3	674		T13	3378
valid_sources[0x61]	870597	1			T1	5		T3	603		T13	3324
valid_sources[0x62]	836651	1			T1	5		T3	658		T13	2954
valid_sources[0x63]	938574	1			T1	13		T3	659		T13	3556
valid_sources[0x64]	836737	1			T1	7		T3	655		T13	3202
valid_sources[0x65]	838962	1			T1	10		T3	672		T13	3419
valid_sources[0x66]	3361441	1			T1	12		T3	662		T13	3541
valid_sources[0x67]	1489449	1			T1	9		T3	654		T13	3194
valid_sources[0x68]	1750304	1			T1	9		T3	709		T13	3356
valid_sources[0x69]	840630	1			T1	4		T3	646		T13	3388
valid_sources[0x6a]	836223	1			T1	7		T3	645		T13	3439
valid_sources[0x6b]	834497	1			T1	13		T3	608		T13	3507
valid_sources[0x6c]	836270	1			T1	9		T3	685		T13	3655
valid_sources[0x6d]	921927	1			T1	6		T3	685		T13	3275
valid_sources[0x6e]	840475	1			T1	5		T3	666		T13	3286
valid_sources[0x6f]	1505448	1			T1	5		T3	694		T13	3200
valid_sources[0x70]	837715	1			T1	14		T3	658		T13	3242
valid_sources[0x71]	834136	1			T1	11		T3	670		T13	3448
valid_sources[0x72]	982833	1			T1	9		T3	699		T13	3525
valid_sources[0x73]	3266208	1			T1	7		T3	709		T13	3291
valid_sources[0x74]	877663	1			T1	11		T3	669		T13	3422
valid_sources[0x75]	841299	1			T1	7		T3	646		T13	3177
valid_sources[0x76]	839906	1			T1	8		T3	701		T13	3465
valid_sources[0x77]	835610	1			T1	7		T3	645		T13	3561
valid_sources[0x78]	838742	1			T1	7		T3	663		T13	3225
valid_sources[0x79]	1291719	1			T1	14		T3	700		T13	3407
valid_sources[0x7a]	870714	1			T1	11		T3	668		T13	3377
valid_sources[0x7b]	2890159	1			T1	8		T3	672		T13	3464
valid_sources[0x7c]	1505074	1			T1	12		T3	592		T13	3585
valid_sources[0x7d]	1404188	1			T1	11		T3	648		T13	3227
valid_sources[0x7e]	1708503	1			T1	9		T3	673		T13	3506
valid_sources[0x7f]	918000	1			T1	6		T3	645		T13	3409
valid_sources[0x80]	861345	1			T1	10		T3	670		T13	3389

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

55791761

1

T1

692

T2

3593

T3

74411

values[0x0]

all_enables

biggest_size

39366120

1

T1

355

T2

259

T3

15896

values[0x1]

all_enables

biggest_size

34031873

1

T1

355

T2

293

T3

14212