Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	165101691	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

132827746

1

T1

7

T2

100324

T3

1405

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	156512474	1			T1	1		T2	127311		T3	1159
values[0x0]	68045684	1			T1	17		T2	551323		T3	538
values[0x1]	73371279	1			T1	8		T2	597933		T3	535

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	128725885	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

169203552

1

T1

8

T2

131433

T3

1605

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	946325	1			T2	9643		T3	14		T4	77
valid_sources[0x01]	932606	1			T2	9513		T3	7		T4	395
valid_sources[0x02]	935868	1			T2	9581		T3	11		T4	117
valid_sources[0x03]	1814025	1			T2	9664		T3	2		T4	74
valid_sources[0x04]	942848	1			T2	9381		T3	9		T4	127
valid_sources[0x05]	1405393	1			T2	9460		T3	9		T4	94
valid_sources[0x06]	1213029	1			T2	9701		T3	13		T4	99
valid_sources[0x07]	1065159	1			T2	9316		T3	7		T4	177
valid_sources[0x08]	936832	1			T2	9254		T3	10		T4	120
valid_sources[0x09]	1855938	1			T2	9547		T3	6		T4	118
valid_sources[0x0a]	980768	1			T2	9495		T3	11		T4	108
valid_sources[0x0b]	942053	1			T2	9386		T3	8		T4	736
valid_sources[0x0c]	3828745	1			T2	9615		T3	14		T4	715
valid_sources[0x0d]	1550691	1			T2	9501		T3	9		T4	76
valid_sources[0x0e]	939090	1			T2	9454		T3	12		T4	113
valid_sources[0x0f]	1093439	1			T2	9290		T3	15		T4	177
valid_sources[0x10]	931946	1			T2	9525		T3	5		T4	96
valid_sources[0x11]	1035773	1			T2	9436		T3	11		T4	57
valid_sources[0x12]	1802851	1			T2	9617		T3	9		T4	905
valid_sources[0x13]	945304	1			T2	9434		T3	8		T4	100
valid_sources[0x14]	939944	1			T2	9345		T3	9		T4	113
valid_sources[0x15]	1394042	1			T2	9526		T3	12		T4	156
valid_sources[0x16]	930496	1			T2	9470		T3	7		T4	113
valid_sources[0x17]	943384	1			T2	9572		T3	10		T4	93
valid_sources[0x18]	956662	1			T2	9381		T3	6		T4	564
valid_sources[0x19]	996454	1			T2	9415		T3	7		T4	131
valid_sources[0x1a]	947048	1			T1	24		T2	9598		T3	7
valid_sources[0x1b]	2285707	1			T2	9437		T3	6		T4	65
valid_sources[0x1c]	1366774	1			T2	9681		T3	7		T4	117
valid_sources[0x1d]	936398	1			T2	9508		T3	5		T4	150
valid_sources[0x1e]	933452	1			T2	9375		T3	16		T4	129
valid_sources[0x1f]	939222	1			T2	9401		T3	16		T4	113
valid_sources[0x20]	1813400	1			T2	9211		T3	11		T4	88
valid_sources[0x21]	1004970	1			T2	9644		T3	12		T4	133
valid_sources[0x22]	934650	1			T2	9313		T3	8		T4	88
valid_sources[0x23]	940538	1			T2	9652		T3	9		T4	127
valid_sources[0x24]	3379907	1			T2	9451		T3	7		T4	116
valid_sources[0x25]	936315	1			T2	9363		T3	13		T4	103
valid_sources[0x26]	940671	1			T2	9493		T3	12		T4	109
valid_sources[0x27]	931981	1			T2	9447		T3	13		T4	114
valid_sources[0x28]	938539	1			T2	9660		T3	8		T4	712
valid_sources[0x29]	1597647	1			T2	9655		T3	6		T4	89
valid_sources[0x2a]	2474557	1			T2	9364		T3	10		T4	90
valid_sources[0x2b]	935349	1			T2	9412		T3	7		T4	107
valid_sources[0x2c]	982383	1			T2	9400		T3	15		T4	101
valid_sources[0x2d]	935279	1			T2	9538		T3	10		T4	74
valid_sources[0x2e]	1083564	1			T2	9358		T3	8		T4	111
valid_sources[0x2f]	936518	1			T2	9374		T3	5		T4	124
valid_sources[0x30]	1596697	1			T2	9358		T3	11		T4	123
valid_sources[0x31]	934152	1			T2	9465		T3	4		T4	89
valid_sources[0x32]	984462	1			T2	9634		T3	8		T4	104
valid_sources[0x33]	943402	1			T2	9399		T3	6		T4	90
valid_sources[0x34]	936029	1			T2	9624		T3	10		T4	128
valid_sources[0x35]	938413	1			T2	9515		T3	11		T4	113
valid_sources[0x36]	1010781	1			T2	9338		T3	6		T4	145
valid_sources[0x37]	933697	1			T2	9527		T3	8		T4	107
valid_sources[0x38]	941341	1			T2	9384		T3	13		T4	114
valid_sources[0x39]	932602	1			T2	9458		T3	10		T4	103
valid_sources[0x3a]	933620	1			T2	9406		T3	11		T4	119
valid_sources[0x3b]	956174	1			T2	9341		T4	111		T13	27
valid_sources[0x3c]	951393	1			T2	9312		T3	11		T4	113
valid_sources[0x3d]	961635	1			T2	9733		T3	13		T4	110
valid_sources[0x3e]	935890	1			T2	9427		T3	10		T4	134
valid_sources[0x3f]	932695	1			T2	9381		T3	7		T4	91
valid_sources[0x40]	939498	1			T2	9453		T3	9		T4	70
valid_sources[0x41]	934940	1			T2	9399		T3	8		T4	93
valid_sources[0x42]	936074	1			T2	9649		T3	9		T4	124
valid_sources[0x43]	932530	1			T2	9385		T3	7		T4	105
valid_sources[0x44]	935964	1			T2	9435		T3	7		T4	93
valid_sources[0x45]	942510	1			T2	9316		T3	6		T4	66
valid_sources[0x46]	939437	1			T2	9488		T3	8		T4	128
valid_sources[0x47]	940532	1			T2	9257		T3	9		T4	72
valid_sources[0x48]	933928	1			T2	9513		T3	7		T4	113
valid_sources[0x49]	1124337	1			T2	9370		T3	13		T4	102
valid_sources[0x4a]	935757	1			T2	9585		T3	12		T4	118
valid_sources[0x4b]	932349	1			T2	9542		T3	12		T4	89
valid_sources[0x4c]	936089	1			T2	9469		T3	10		T4	65
valid_sources[0x4d]	978862	1			T2	9420		T3	7		T4	168
valid_sources[0x4e]	934319	1			T2	9489		T3	9		T4	115
valid_sources[0x4f]	943009	1			T2	9449		T3	14		T4	126
valid_sources[0x50]	1183909	1			T2	9253		T3	14		T4	115
valid_sources[0x51]	1399703	1			T2	9720		T3	10		T4	109
valid_sources[0x52]	1023012	1			T2	9589		T3	10		T4	103
valid_sources[0x53]	936653	1			T2	9445		T3	9		T4	187
valid_sources[0x54]	942804	1			T2	9533		T3	11		T4	70
valid_sources[0x55]	1121460	1			T2	9652		T3	16		T4	113
valid_sources[0x56]	940470	1			T2	9405		T3	11		T4	68
valid_sources[0x57]	942803	1			T2	9213		T3	10		T4	198
valid_sources[0x58]	937937	1			T2	9413		T3	8		T4	128
valid_sources[0x59]	1797746	1			T2	9553		T3	8		T4	77
valid_sources[0x5a]	940327	1			T2	9580		T3	8		T4	122
valid_sources[0x5b]	934868	1			T2	9267		T3	3		T4	103
valid_sources[0x5c]	941676	1			T2	9449		T3	7		T4	85
valid_sources[0x5d]	951529	1			T2	9413		T3	8		T4	103
valid_sources[0x5e]	946926	1			T2	9556		T3	12		T4	87
valid_sources[0x5f]	935770	1			T2	9508		T3	7		T4	65
valid_sources[0x60]	1406691	1			T2	9634		T3	12		T4	130
valid_sources[0x61]	940666	1			T2	9419		T3	9		T4	77
valid_sources[0x62]	933123	1			T2	9454		T3	10		T4	120
valid_sources[0x63]	937488	1			T2	9414		T3	11		T4	60
valid_sources[0x64]	991917	1			T2	9334		T3	11		T4	97
valid_sources[0x65]	933643	1			T2	9519		T3	12		T4	264
valid_sources[0x66]	935081	1			T2	9569		T3	9		T4	118
valid_sources[0x67]	1622937	1			T2	9453		T3	3		T4	103
valid_sources[0x68]	939923	1			T2	9337		T3	10		T4	94
valid_sources[0x69]	1843899	1			T2	9344		T3	6		T4	127
valid_sources[0x6a]	1403293	1			T2	9305		T3	8		T4	178
valid_sources[0x6b]	1013597	1			T2	9335		T3	9		T4	102
valid_sources[0x6c]	3162240	1			T2	9410		T3	11		T4	136
valid_sources[0x6d]	966731	1			T2	9381		T3	10		T4	128
valid_sources[0x6e]	1946187	1			T2	9396		T3	4		T4	101
valid_sources[0x6f]	1419068	1			T2	9606		T3	10		T4	117
valid_sources[0x70]	1027258	1			T2	9350		T3	6		T4	115
valid_sources[0x71]	936814	1			T2	9502		T3	8		T4	96
valid_sources[0x72]	939592	1			T2	9613		T3	13		T4	93
valid_sources[0x73]	1028401	1			T2	9532		T3	6		T4	108
valid_sources[0x74]	939307	1			T2	9546		T3	4		T4	66
valid_sources[0x75]	958448	1			T2	9519		T3	5		T4	112
valid_sources[0x76]	936211	1			T2	9270		T3	10		T4	90
valid_sources[0x77]	941654	1			T2	9633		T3	9		T4	457
valid_sources[0x78]	1026430	1			T2	9452		T3	7		T4	112
valid_sources[0x79]	962388	1			T2	9289		T3	8		T4	78
valid_sources[0x7a]	942525	1			T2	9452		T3	7		T4	71
valid_sources[0x7b]	937842	1			T2	9443		T3	6		T4	86
valid_sources[0x7c]	931165	1			T2	9291		T3	8		T4	363
valid_sources[0x7d]	931875	1			T2	9317		T3	9		T4	114
valid_sources[0x7e]	936192	1			T2	9461		T3	10		T4	73
valid_sources[0x7f]	1847989	1			T2	9504		T3	8		T4	124
valid_sources[0x80]	926730	1			T2	9184		T3	11		T4	54

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

57030138

1

T1

1

T2

427638

T3

714

values[0x0]

all_enables

biggest_size

40664793

1

T1

6

T2

311823

T3

389

values[0x1]

all_enables

biggest_size

35132815

1

T2

263787

T3

302

T4

13708