Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
dashboard | hierarchy | modlist | groups | tests | asserts

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 100.00 1 100 1 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64




Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 171271209 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 139291766 1 T1 12451 T2 101641 T3 300246



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 163075052 1 T1 13178 T2 108509 T3 385328
values[0x0] 70924766 1 T1 2691 T2 23477 T3 163999
values[0x1] 76563157 1 T1 2891 T2 25190 T3 177884



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 133434408 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 177128567 1 T1 13805 T2 113937 T3 394779



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 941794 1 T1 4 T2 640 T3 2817
valid_sources[0x01] 1047965 1 T1 11 T2 656 T3 2876
valid_sources[0x02] 1415972 1 T1 5 T2 651 T3 2874
valid_sources[0x03] 937882 1 T1 4 T2 607 T3 2785
valid_sources[0x04] 2250213 1 T1 8 T2 604 T3 2883
valid_sources[0x05] 2056543 1 T1 9 T2 645 T3 2826
valid_sources[0x06] 940233 1 T1 7 T2 608 T3 2756
valid_sources[0x07] 939065 1 T1 5 T2 597 T3 2879
valid_sources[0x08] 943013 1 T1 8 T2 604 T3 2884
valid_sources[0x09] 1224351 1 T1 8 T2 638 T3 2865
valid_sources[0x0a] 3366487 1 T1 8 T2 629 T3 2755
valid_sources[0x0b] 935049 1 T1 10 T2 658 T3 2898
valid_sources[0x0c] 936854 1 T1 10 T2 651 T3 2858
valid_sources[0x0d] 937409 1 T1 11 T2 592 T3 2924
valid_sources[0x0e] 973823 1 T1 8 T2 658 T3 2869
valid_sources[0x0f] 1398140 1 T1 12 T2 662 T3 2916
valid_sources[0x10] 949648 1 T1 8 T2 574 T3 2945
valid_sources[0x11] 942869 1 T1 7 T2 605 T3 2765
valid_sources[0x12] 932798 1 T1 7 T2 579 T3 2815
valid_sources[0x13] 932999 1 T1 7 T2 601 T3 2802
valid_sources[0x14] 980023 1 T1 6 T2 620 T3 2884
valid_sources[0x15] 939829 1 T1 7 T2 619 T3 2899
valid_sources[0x16] 939347 1 T1 7 T2 604 T3 2780
valid_sources[0x17] 938602 1 T1 6 T2 641 T3 2870
valid_sources[0x18] 943088 1 T1 6 T2 621 T3 2871
valid_sources[0x19] 939943 1 T1 3 T2 633 T3 2879
valid_sources[0x1a] 939242 1 T1 3 T2 643 T3 2881
valid_sources[0x1b] 1157524 1 T1 5 T2 636 T3 2920
valid_sources[0x1c] 931666 1 T1 8 T2 608 T3 2947
valid_sources[0x1d] 951784 1 T1 9 T2 615 T3 2894
valid_sources[0x1e] 939572 1 T1 4 T2 591 T3 2889
valid_sources[0x1f] 1863578 1 T1 7 T2 593 T3 2809
valid_sources[0x20] 1088221 1 T1 7 T2 600 T3 2929
valid_sources[0x21] 936921 1 T1 10 T2 652 T3 2859
valid_sources[0x22] 936113 1 T1 4 T2 622 T3 2684
valid_sources[0x23] 933856 1 T1 11 T2 620 T3 2886
valid_sources[0x24] 941293 1 T1 5 T2 593 T3 2818
valid_sources[0x25] 962339 1 T1 7 T2 636 T3 2817
valid_sources[0x26] 938363 1 T1 6 T2 627 T3 2858
valid_sources[0x27] 1042879 1 T1 3 T2 634 T3 2822
valid_sources[0x28] 946337 1 T1 4 T2 599 T3 2926
valid_sources[0x29] 1899118 1 T1 7 T2 617 T3 2786
valid_sources[0x2a] 949022 1 T1 7 T2 579 T3 2886
valid_sources[0x2b] 1180244 1 T1 9 T2 576 T3 2819
valid_sources[0x2c] 1050695 1 T1 7 T2 619 T3 2779
valid_sources[0x2d] 936725 1 T1 5 T2 602 T3 2801
valid_sources[0x2e] 1040121 1 T1 12 T2 632 T3 2786
valid_sources[0x2f] 1001417 1 T1 5 T2 586 T3 2925
valid_sources[0x30] 940330 1 T1 8 T2 561 T3 2868
valid_sources[0x31] 1408150 1 T1 2 T2 598 T3 2722
valid_sources[0x32] 938161 1 T1 4 T2 584 T3 2862
valid_sources[0x33] 937044 1 T1 4 T2 623 T3 2820
valid_sources[0x34] 3000794 1 T1 14 T2 655 T3 2842
valid_sources[0x35] 1400610 1 T1 8 T2 642 T3 2767
valid_sources[0x36] 944562 1 T1 9 T2 619 T3 2846
valid_sources[0x37] 937409 1 T1 6 T2 654 T3 2823
valid_sources[0x38] 934415 1 T1 4 T2 574 T3 2869
valid_sources[0x39] 943398 1 T1 10 T2 605 T3 2804
valid_sources[0x3a] 963160 1 T1 6 T2 608 T3 2875
valid_sources[0x3b] 930879 1 T1 6 T2 571 T3 2824
valid_sources[0x3c] 933934 1 T1 11 T2 634 T3 2936
valid_sources[0x3d] 940141 1 T1 5 T2 568 T3 2893
valid_sources[0x3e] 1125964 1 T1 5 T2 577 T3 2861
valid_sources[0x3f] 3322664 1 T1 9 T2 628 T3 2806
valid_sources[0x40] 939793 1 T1 5 T2 561 T3 2852
valid_sources[0x41] 1091822 1 T1 5 T2 590 T3 3014
valid_sources[0x42] 1034311 1 T1 5 T2 608 T3 2796
valid_sources[0x43] 986329 1 T1 7 T2 603 T3 2800
valid_sources[0x44] 933411 1 T1 6 T2 594 T3 2784
valid_sources[0x45] 937471 1 T1 8 T2 641 T3 2782
valid_sources[0x46] 3386548 1 T1 4 T2 596 T3 2831
valid_sources[0x47] 2994832 1 T1 4 T2 575 T3 2796
valid_sources[0x48] 935480 1 T1 4 T2 599 T3 2667
valid_sources[0x49] 934017 1 T1 4 T2 637 T3 2878
valid_sources[0x4a] 932933 1 T1 6 T2 609 T3 2943
valid_sources[0x4b] 934971 1 T1 2 T2 621 T3 2844
valid_sources[0x4c] 937557 1 T1 7 T2 608 T3 2928
valid_sources[0x4d] 3019668 1 T1 7 T2 607 T3 3014
valid_sources[0x4e] 938162 1 T1 7 T2 588 T3 2855
valid_sources[0x4f] 934465 1 T1 8 T2 676 T3 2949
valid_sources[0x50] 934943 1 T1 4 T2 646 T3 2803
valid_sources[0x51] 945199 1 T1 4 T2 624 T3 2929
valid_sources[0x52] 1397809 1 T1 5 T2 639 T3 2961
valid_sources[0x53] 935477 1 T1 12 T2 585 T3 2875
valid_sources[0x54] 967801 1 T1 8 T2 676 T3 2896
valid_sources[0x55] 2279797 1 T1 6 T2 594 T3 2834
valid_sources[0x56] 976802 1 T1 5 T2 604 T3 2911
valid_sources[0x57] 1864966 1 T1 6 T2 637 T3 2928
valid_sources[0x58] 986735 1 T1 3 T2 598 T3 2857
valid_sources[0x59] 937866 1 T1 8 T2 601 T3 2832
valid_sources[0x5a] 930985 1 T1 7 T2 589 T3 2846
valid_sources[0x5b] 2012357 1 T1 8 T2 649 T3 2843
valid_sources[0x5c] 943953 1 T1 7 T2 639 T3 2907
valid_sources[0x5d] 940628 1 T1 7 T2 600 T3 2909
valid_sources[0x5e] 950644 1 T1 8 T2 626 T3 2894
valid_sources[0x5f] 944742 1 T1 4 T2 576 T3 2754
valid_sources[0x60] 939332 1 T1 4 T2 632 T3 2917
valid_sources[0x61] 940090 1 T1 3 T2 647 T3 2933
valid_sources[0x62] 995906 1 T1 7 T2 619 T3 2796
valid_sources[0x63] 934514 1 T1 12 T2 601 T3 2874
valid_sources[0x64] 931908 1 T1 13 T2 626 T3 2873
valid_sources[0x65] 940449 1 T1 10 T2 618 T3 2765
valid_sources[0x66] 1394967 1 T1 5 T2 581 T3 2775
valid_sources[0x67] 1643770 1 T1 16964 T2 588 T3 2918
valid_sources[0x68] 942953 1 T1 10 T2 649 T3 2881
valid_sources[0x69] 2084712 1 T1 10 T2 619 T3 2818
valid_sources[0x6a] 938271 1 T1 3 T2 629 T3 2763
valid_sources[0x6b] 1036863 1 T1 3 T2 618 T3 2825
valid_sources[0x6c] 1816707 1 T1 3 T2 631 T3 2714
valid_sources[0x6d] 1864991 1 T1 5 T2 646 T3 2794
valid_sources[0x6e] 1054695 1 T1 5 T2 602 T3 2870
valid_sources[0x6f] 934162 1 T1 8 T2 620 T3 2840
valid_sources[0x70] 945741 1 T1 9 T2 621 T3 2736
valid_sources[0x71] 932672 1 T1 8 T2 655 T3 2816
valid_sources[0x72] 956067 1 T1 8 T2 622 T3 2771
valid_sources[0x73] 991575 1 T1 5 T2 645 T3 2835
valid_sources[0x74] 1321115 1 T1 3 T2 635 T3 2751
valid_sources[0x75] 1062561 1 T1 5 T2 577 T3 2783
valid_sources[0x76] 1390271 1 T1 7 T2 618 T3 2927
valid_sources[0x77] 961196 1 T1 8 T2 599 T3 2933
valid_sources[0x78] 976783 1 T1 11 T2 609 T3 2910
valid_sources[0x79] 1857048 1 T1 8 T2 601 T3 2953
valid_sources[0x7a] 936782 1 T1 8 T2 594 T3 2707
valid_sources[0x7b] 933517 1 T1 9 T2 590 T3 2826
valid_sources[0x7c] 1239627 1 T1 10 T2 601 T3 2791
valid_sources[0x7d] 938042 1 T1 5 T2 625 T3 2863
valid_sources[0x7e] 937059 1 T1 9 T2 593 T3 2873
valid_sources[0x7f] 940945 1 T1 8 T2 597 T3 2783
valid_sources[0x80] 942110 1 T1 5 T2 589 T3 2692



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 60013755 1 T1 9435 T2 74532 T3 127978
values[0x0] all_enables biggest_size 42507560 1 T1 1600 T2 14504 T3 93379
values[0x1] all_enables biggest_size 36770451 1 T1 1416 T2 12605 T3 78889

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%