Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
dashboard | hierarchy | modlist | groups | tests | asserts

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 100.00 1 100 1 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64




Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 169328979 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 138806252 1 T1 1947 T2 86422 T3 1405



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 161812238 1 T1 2207 T2 96080 T3 1029
values[0x0] 70388947 1 T1 445 T2 18646 T3 466
values[0x1] 75934046 1 T1 493 T2 19830 T3 476



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 131950209 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 176185022 1 T1 2251 T2 97814 T3 1523



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 902300 1 T1 6 T2 549 T3 3
valid_sources[0x01] 905381 1 T1 8 T2 541 T3 5
valid_sources[0x02] 930758 1 T1 18 T2 532 T3 11
valid_sources[0x03] 1038074 1 T1 11 T2 486 T3 6
valid_sources[0x04] 902300 1 T1 4 T2 515 T3 17
valid_sources[0x05] 1180098 1 T1 15 T2 575 T3 11
valid_sources[0x06] 1002106 1 T1 14 T2 520 T3 3
valid_sources[0x07] 3307278 1 T1 10 T2 528 T3 5
valid_sources[0x08] 897288 1 T1 12 T2 583 T3 9
valid_sources[0x09] 903930 1 T1 10 T2 587 T3 3
valid_sources[0x0a] 4216675 1 T1 12 T2 552 T3 3
valid_sources[0x0b] 901201 1 T1 12 T2 529 T3 13
valid_sources[0x0c] 1073665 1 T1 13 T2 554 T3 4
valid_sources[0x0d] 904462 1 T1 8 T2 566 T3 12
valid_sources[0x0e] 1497509 1 T1 4 T2 502 T3 10
valid_sources[0x0f] 1828065 1 T1 10 T2 516 T3 4
valid_sources[0x10] 943785 1 T1 10 T2 520 T3 2
valid_sources[0x11] 1524296 1 T1 13 T2 549 T3 9
valid_sources[0x12] 1558647 1 T1 9 T2 533 T12 253
valid_sources[0x13] 898629 1 T1 8 T2 492 T3 7
valid_sources[0x14] 2405762 1 T1 11 T2 484 T3 5
valid_sources[0x15] 898830 1 T1 5 T2 554 T3 8
valid_sources[0x16] 896798 1 T1 13 T2 490 T3 14
valid_sources[0x17] 1842381 1 T1 14 T2 489 T3 6
valid_sources[0x18] 901409 1 T1 9 T2 527 T3 4
valid_sources[0x19] 1594361 1 T1 10 T2 507 T3 3
valid_sources[0x1a] 897349 1 T1 18 T2 531 T3 2
valid_sources[0x1b] 1482419 1 T1 14 T2 482 T3 3
valid_sources[0x1c] 2975133 1 T1 31 T2 545 T3 6
valid_sources[0x1d] 902299 1 T1 18 T2 510 T3 3
valid_sources[0x1e] 1035139 1 T1 14 T2 557 T3 3
valid_sources[0x1f] 903604 1 T1 16 T2 500 T3 2
valid_sources[0x20] 2898161 1 T1 15 T2 536 T3 2
valid_sources[0x21] 906664 1 T1 7 T2 508 T12 267
valid_sources[0x22] 899606 1 T1 10 T2 576 T3 10
valid_sources[0x23] 897063 1 T1 9 T2 494 T3 2
valid_sources[0x24] 899376 1 T1 10 T2 506 T3 21
valid_sources[0x25] 961128 1 T1 10 T2 549 T3 8
valid_sources[0x26] 1043237 1 T1 12 T2 543 T3 4
valid_sources[0x27] 898865 1 T1 6 T2 552 T12 285
valid_sources[0x28] 922630 1 T1 13 T2 524 T3 12
valid_sources[0x29] 904619 1 T1 12 T2 559 T3 11
valid_sources[0x2a] 900003 1 T1 14 T2 482 T3 2
valid_sources[0x2b] 903337 1 T1 13 T2 493 T3 13
valid_sources[0x2c] 1754230 1 T1 9 T2 495 T3 1
valid_sources[0x2d] 1094235 1 T1 17 T2 505 T3 18
valid_sources[0x2e] 898129 1 T1 9 T2 540 T3 9
valid_sources[0x2f] 1028747 1 T1 13 T2 536 T3 17
valid_sources[0x30] 920817 1 T1 11 T2 546 T3 12
valid_sources[0x31] 1052272 1 T1 8 T2 482 T3 15
valid_sources[0x32] 4030931 1 T1 25 T2 503 T3 15
valid_sources[0x33] 898461 1 T1 9 T2 544 T3 2
valid_sources[0x34] 896846 1 T1 8 T2 505 T12 268
valid_sources[0x35] 903789 1 T1 14 T2 555 T3 6
valid_sources[0x36] 959608 1 T1 8 T2 503 T3 10
valid_sources[0x37] 902623 1 T1 7 T2 488 T3 19
valid_sources[0x38] 1548894 1 T1 17 T2 542 T3 10
valid_sources[0x39] 898737 1 T1 13 T2 537 T3 11
valid_sources[0x3a] 1116580 1 T1 27 T2 489 T3 16
valid_sources[0x3b] 1011686 1 T1 15 T2 511 T3 10
valid_sources[0x3c] 902021 1 T1 23 T2 528 T3 4
valid_sources[0x3d] 913684 1 T1 16 T2 552 T3 2
valid_sources[0x3e] 1702320 1 T1 11 T2 562 T3 1
valid_sources[0x3f] 894802 1 T1 16 T2 528 T3 6
valid_sources[0x40] 1831970 1 T1 21 T2 466 T3 1
valid_sources[0x41] 1590343 1 T1 12 T2 527 T3 6
valid_sources[0x42] 950923 1 T1 16 T2 577 T3 2
valid_sources[0x43] 901266 1 T1 11 T2 537 T3 2
valid_sources[0x44] 901253 1 T1 14 T2 543 T3 6
valid_sources[0x45] 899636 1 T1 18 T2 520 T12 302
valid_sources[0x46] 1062950 1 T1 13 T2 540 T3 18
valid_sources[0x47] 1977936 1 T1 10 T2 534 T3 10
valid_sources[0x48] 900065 1 T1 15 T2 518 T3 4
valid_sources[0x49] 945535 1 T1 15 T2 509 T3 2
valid_sources[0x4a] 898137 1 T1 15 T2 534 T3 21
valid_sources[0x4b] 956531 1 T1 17 T2 519 T3 1
valid_sources[0x4c] 1831181 1 T1 11 T2 537 T3 9
valid_sources[0x4d] 904473 1 T1 6 T2 478 T3 5
valid_sources[0x4e] 1003467 1 T1 14 T2 528 T3 10
valid_sources[0x4f] 899291 1 T1 12 T2 558 T3 1
valid_sources[0x50] 1811884 1 T1 7 T2 536 T3 2
valid_sources[0x51] 903371 1 T1 13 T2 518 T12 249
valid_sources[0x52] 898065 1 T1 5 T2 480 T3 1
valid_sources[0x53] 903165 1 T1 11 T2 519 T3 3
valid_sources[0x54] 903195 1 T1 7 T2 577 T3 15
valid_sources[0x55] 903224 1 T1 11 T2 616 T3 23
valid_sources[0x56] 900169 1 T1 5 T2 511 T3 13
valid_sources[0x57] 1029185 1 T1 14 T2 540 T12 328
valid_sources[0x58] 901785 1 T1 11 T2 493 T12 201
valid_sources[0x59] 1830158 1 T1 18 T2 600 T3 7
valid_sources[0x5a] 901665 1 T1 12 T2 564 T3 6
valid_sources[0x5b] 902103 1 T1 11 T2 538 T3 6
valid_sources[0x5c] 903139 1 T1 15 T2 540 T3 7
valid_sources[0x5d] 905498 1 T1 4 T2 501 T3 8
valid_sources[0x5e] 904637 1 T1 7 T2 548 T3 1
valid_sources[0x5f] 1801674 1 T1 9 T2 493 T3 1
valid_sources[0x60] 899106 1 T1 7 T2 532 T3 8
valid_sources[0x61] 920715 1 T1 20 T2 500 T3 7
valid_sources[0x62] 900912 1 T1 6 T2 553 T3 12
valid_sources[0x63] 1758952 1 T1 10 T2 603 T3 6
valid_sources[0x64] 3346165 1 T1 17 T2 533 T3 23
valid_sources[0x65] 1787207 1 T1 19 T2 532 T3 1
valid_sources[0x66] 1786641 1 T1 13 T2 567 T3 16
valid_sources[0x67] 918475 1 T1 16 T2 565 T3 12
valid_sources[0x68] 938357 1 T1 12 T2 555 T3 5
valid_sources[0x69] 921485 1 T1 16 T2 544 T3 7
valid_sources[0x6a] 963908 1 T1 12 T2 565 T3 12
valid_sources[0x6b] 1811767 1 T1 17 T2 518 T3 3
valid_sources[0x6c] 1840067 1 T1 17 T2 568 T3 5
valid_sources[0x6d] 905945 1 T1 12 T2 548 T3 10
valid_sources[0x6e] 1682621 1 T1 11 T2 460 T3 7
valid_sources[0x6f] 899489 1 T1 14 T2 542 T3 8
valid_sources[0x70] 1268686 1 T1 12 T2 520 T3 17
valid_sources[0x71] 905102 1 T1 15 T2 494 T3 4
valid_sources[0x72] 901688 1 T1 10 T2 509 T3 6
valid_sources[0x73] 895124 1 T1 11 T2 526 T3 5
valid_sources[0x74] 915935 1 T1 10 T2 530 T3 4
valid_sources[0x75] 909129 1 T1 14 T2 526 T3 3
valid_sources[0x76] 1766630 1 T1 18 T2 492 T3 4
valid_sources[0x77] 898234 1 T1 9 T2 474 T3 11
valid_sources[0x78] 900200 1 T1 12 T2 463 T3 17
valid_sources[0x79] 899147 1 T1 24 T2 489 T3 8
valid_sources[0x7a] 965254 1 T1 10 T2 499 T3 1
valid_sources[0x7b] 1570981 1 T1 10 T2 449 T3 12
valid_sources[0x7c] 897778 1 T1 15 T2 524 T3 4
valid_sources[0x7d] 904098 1 T1 10 T2 520 T3 6
valid_sources[0x7e] 905669 1 T1 5 T2 516 T3 5
valid_sources[0x7f] 901666 1 T1 8 T2 535 T3 22
valid_sources[0x80] 1365806 1 T1 13 T2 473 T3 3



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 59876324 1 T1 1427 T2 65358 T3 674
values[0x0] all_enables biggest_size 42295468 1 T1 277 T2 11390 T3 387
values[0x1] all_enables biggest_size 36634460 1 T1 243 T2 9674 T3 344

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%