Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	154495961	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

127492112

1

T1

6

T2

339446

T3

324576

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	148384570	1			T1	1		T2	451529		T3	299655
values[0x0]	64298189	1			T1	8		T2	206958		T3	121565
values[0x1]	69305314	1			T1	17		T2	226101		T3	128387

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	120427180	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

161560893

1

T1

9

T2

461169

T3

374390

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	882487	1			T2	3345		T3	2240		T4	3456
valid_sources[0x01]	933492	1			T2	3436		T3	2274		T4	3371
valid_sources[0x02]	1808998	1			T2	3483		T3	2148		T4	3373
valid_sources[0x03]	951143	1			T2	3620		T3	2103		T4	3298
valid_sources[0x04]	1546642	1			T2	3475		T3	2218		T4	3413
valid_sources[0x05]	1352679	1			T2	3574		T3	2284		T4	3339
valid_sources[0x06]	877358	1			T2	3494		T3	2273		T4	3432
valid_sources[0x07]	898972	1			T2	3458		T3	1896		T4	3372
valid_sources[0x08]	878010	1			T2	3463		T3	2237		T4	3557
valid_sources[0x09]	877863	1			T2	3522		T3	2220		T4	3479
valid_sources[0x0a]	1029932	1			T2	3445		T3	2150		T4	3312
valid_sources[0x0b]	878678	1			T2	3405		T3	2329		T4	3500
valid_sources[0x0c]	883376	1			T2	3428		T3	2086		T4	3530
valid_sources[0x0d]	881690	1			T2	3299		T3	1926		T4	3569
valid_sources[0x0e]	930740	1			T2	3522		T3	2362		T4	3448
valid_sources[0x0f]	876388	1			T2	3489		T3	1965		T4	3460
valid_sources[0x10]	880451	1			T2	3487		T3	1997		T4	3476
valid_sources[0x11]	877693	1			T2	3465		T3	2270		T4	3438
valid_sources[0x12]	884213	1			T2	3530		T3	2062		T4	3452
valid_sources[0x13]	878193	1			T2	3354		T3	2506		T4	3408
valid_sources[0x14]	884777	1			T2	3422		T3	2010		T4	3435
valid_sources[0x15]	888023	1			T2	3549		T3	1918		T4	3357
valid_sources[0x16]	880311	1			T2	3434		T3	2120		T4	3428
valid_sources[0x17]	874877	1			T2	3413		T3	2237		T4	3427
valid_sources[0x18]	1348687	1			T2	3424		T3	2359		T4	3422
valid_sources[0x19]	1054952	1			T2	3430		T3	1851		T4	3353
valid_sources[0x1a]	1091502	1			T2	3445		T3	1969		T4	3413
valid_sources[0x1b]	881750	1			T2	3425		T3	1986		T4	3325
valid_sources[0x1c]	876635	1			T2	3547		T3	2097		T4	3463
valid_sources[0x1d]	3322548	1			T2	3527		T3	2012		T4	3498
valid_sources[0x1e]	882128	1			T2	3513		T3	2162		T4	3328
valid_sources[0x1f]	896666	1			T2	3343		T3	2304		T4	3460
valid_sources[0x20]	873225	1			T2	3495		T3	2147		T4	3409
valid_sources[0x21]	963921	1			T2	3458		T3	2058		T4	3558
valid_sources[0x22]	1555003	1			T2	3547		T3	2065		T4	3585
valid_sources[0x23]	1036868	1			T2	3419		T3	1877		T4	3420
valid_sources[0x24]	1037553	1			T2	3299		T3	2345		T4	3483
valid_sources[0x25]	876947	1			T2	3352		T3	2317		T4	3375
valid_sources[0x26]	1020033	1			T2	3413		T3	2219		T4	3490
valid_sources[0x27]	875345	1			T2	3582		T3	2219		T4	3386
valid_sources[0x28]	1515278	1			T2	3492		T3	2382		T4	3435
valid_sources[0x29]	1337299	1			T2	3408		T3	1919		T4	3467
valid_sources[0x2a]	1807070	1			T2	3438		T3	1933		T4	3360
valid_sources[0x2b]	876449	1			T2	3510		T3	1997		T4	3483
valid_sources[0x2c]	906804	1			T2	3468		T3	1940		T4	3373
valid_sources[0x2d]	879227	1			T2	3437		T3	2072		T4	3397
valid_sources[0x2e]	882235	1			T2	3374		T3	2104		T4	3373
valid_sources[0x2f]	1431632	1			T2	3522		T3	2141		T4	3474
valid_sources[0x30]	880236	1			T2	3430		T3	2007		T4	3529
valid_sources[0x31]	879983	1			T2	3386		T3	2250		T4	3491
valid_sources[0x32]	878646	1			T2	3483		T3	2057		T4	3473
valid_sources[0x33]	880170	1			T2	3625		T3	2047		T4	3404
valid_sources[0x34]	874427	1			T2	3459		T3	1975		T4	3403
valid_sources[0x35]	880306	1			T2	3454		T3	2362		T4	3398
valid_sources[0x36]	876652	1			T2	3374		T3	1937		T4	3501
valid_sources[0x37]	949987	1			T2	3495		T3	2142		T4	3474
valid_sources[0x38]	880666	1			T2	3436		T3	2010		T4	3506
valid_sources[0x39]	880602	1			T1	26		T2	3580		T3	2054
valid_sources[0x3a]	884830	1			T2	3430		T3	1939		T4	3341
valid_sources[0x3b]	967929	1			T2	3563		T3	2090		T4	3403
valid_sources[0x3c]	914194	1			T2	3500		T3	2185		T4	3430
valid_sources[0x3d]	879090	1			T2	3357		T3	1864		T4	3417
valid_sources[0x3e]	878406	1			T2	3475		T3	2156		T4	3546
valid_sources[0x3f]	883325	1			T2	3439		T3	2023		T4	3405
valid_sources[0x40]	1769245	1			T2	3393		T3	2128		T4	3476
valid_sources[0x41]	884664	1			T2	3448		T3	2058		T4	3465
valid_sources[0x42]	991462	1			T2	3505		T3	2110		T4	3339
valid_sources[0x43]	879714	1			T2	3359		T3	2330		T4	3422
valid_sources[0x44]	1542467	1			T2	3525		T3	2179		T4	3521
valid_sources[0x45]	902931	1			T2	3421		T3	2218		T4	3336
valid_sources[0x46]	878366	1			T2	3436		T3	2406		T4	3543
valid_sources[0x47]	894197	1			T2	3487		T3	2190		T4	3469
valid_sources[0x48]	942916	1			T2	3476		T3	2012		T4	3396
valid_sources[0x49]	1796560	1			T2	3526		T3	2056		T4	3444
valid_sources[0x4a]	880264	1			T2	3434		T3	2027		T4	3430
valid_sources[0x4b]	914230	1			T2	3349		T3	2247		T4	3480
valid_sources[0x4c]	881103	1			T2	3521		T3	2079		T4	3456
valid_sources[0x4d]	898847	1			T2	3453		T3	2572		T4	3463
valid_sources[0x4e]	880136	1			T2	3416		T3	2359		T4	3491
valid_sources[0x4f]	929225	1			T2	3405		T3	2162		T4	3321
valid_sources[0x50]	872093	1			T2	3509		T3	2103		T4	3511
valid_sources[0x51]	881039	1			T2	3625		T3	2134		T4	3381
valid_sources[0x52]	881090	1			T2	3507		T3	2139		T4	3496
valid_sources[0x53]	886133	1			T2	3477		T3	2266		T4	3515
valid_sources[0x54]	878411	1			T2	3531		T3	2231		T4	3365
valid_sources[0x55]	878891	1			T2	3410		T3	1706		T4	3375
valid_sources[0x56]	2177723	1			T2	3497		T3	1889		T4	3534
valid_sources[0x57]	885095	1			T2	3294		T3	2293		T4	3396
valid_sources[0x58]	877628	1			T2	3454		T3	2371		T4	3443
valid_sources[0x59]	876168	1			T2	3462		T3	2219		T4	3462
valid_sources[0x5a]	877072	1			T2	3519		T3	2193		T4	3419
valid_sources[0x5b]	1734481	1			T2	3533		T3	1838		T4	3490
valid_sources[0x5c]	911158	1			T2	3392		T3	2214		T4	3358
valid_sources[0x5d]	881799	1			T2	3403		T3	2298		T4	3472
valid_sources[0x5e]	876778	1			T2	3471		T3	2247		T4	3411
valid_sources[0x5f]	2944173	1			T2	3428		T3	2297		T4	3479
valid_sources[0x60]	880712	1			T2	3502		T3	2295		T4	3404
valid_sources[0x61]	884943	1			T2	3353		T3	2150		T4	3437
valid_sources[0x62]	880054	1			T2	3415		T3	2204		T4	3540
valid_sources[0x63]	881897	1			T2	3585		T3	2125		T4	3343
valid_sources[0x64]	882291	1			T2	3398		T3	2479		T4	3391
valid_sources[0x65]	1002686	1			T2	3432		T3	2462		T4	3357
valid_sources[0x66]	873544	1			T2	3563		T3	2394		T4	3460
valid_sources[0x67]	881243	1			T2	3479		T3	1963		T4	3384
valid_sources[0x68]	884860	1			T2	3349		T3	2108		T4	3365
valid_sources[0x69]	2203241	1			T2	3449		T3	2128		T4	3385
valid_sources[0x6a]	1760563	1			T2	3486		T3	2271		T4	3471
valid_sources[0x6b]	881622	1			T2	3448		T3	2030		T4	3449
valid_sources[0x6c]	1020010	1			T2	3254		T3	2044		T4	3408
valid_sources[0x6d]	882468	1			T2	3348		T3	2064		T4	3593
valid_sources[0x6e]	1208574	1			T2	3431		T3	2094		T4	3467
valid_sources[0x6f]	879444	1			T2	3528		T3	2348		T4	3450
valid_sources[0x70]	1000997	1			T2	3580		T3	2097		T4	3476
valid_sources[0x71]	881555	1			T2	3428		T3	2216		T4	3486
valid_sources[0x72]	1315415	1			T2	3426		T3	2318		T4	3505
valid_sources[0x73]	880545	1			T2	3440		T3	2048		T4	3433
valid_sources[0x74]	2641184	1			T2	3478		T3	2243		T4	3434
valid_sources[0x75]	1116488	1			T2	3374		T3	2159		T4	3451
valid_sources[0x76]	1762487	1			T2	3453		T3	2225		T4	3482
valid_sources[0x77]	960835	1			T2	3476		T3	2534		T4	3401
valid_sources[0x78]	3529611	1			T2	3519		T3	1893		T4	3431
valid_sources[0x79]	1850357	1			T2	3397		T3	2370		T4	3521
valid_sources[0x7a]	894689	1			T2	3570		T3	2150		T4	3349
valid_sources[0x7b]	900577	1			T2	3371		T3	1825		T4	3414
valid_sources[0x7c]	881209	1			T2	3389		T3	2044		T4	3402
valid_sources[0x7d]	1335986	1			T2	3481		T3	2118		T4	3458
valid_sources[0x7e]	883150	1			T2	3540		T3	2232		T4	3472
valid_sources[0x7f]	879557	1			T2	3539		T3	2119		T4	3428
valid_sources[0x80]	889191	1			T2	3421		T3	2170		T4	3455

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

55316693

1

T1

1

T2

129639

T3

162505

values[0x0]

all_enables

biggest_size

38675487

1

T1

1

T2

114174

T3

84597

values[0x1]

all_enables

biggest_size

33499932

1

T1

4

T2

95633

T3

77474