Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	8028	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	7716	1			T2	24		T3	37		T13	24
len_5001_7500	12591	1			T2	24		T3	81		T13	24
len_2501_5000	8177	1			T2	24		T3	19		T13	24
len_1025_2500	4853	1			T2	14		T3	13		T13	14
len_769_1024	5984	1			T2	2		T3	5		T13	2
len_513_768	6421	1			T2	3		T13	3		T15	2
len_257_512	14325	1			T2	2		T3	1		T13	2
len_0_256	203770	1			T1	133		T2	211		T3	22
len_keccak_block_sizes[72]	633	1			T2	2		T13	2		T15	2
len_keccak_block_sizes[104]	545	1			T2	2		T13	2		T15	2
len_keccak_block_sizes[136]	440	1			T15	2		T17	3		T18	3
len_keccak_block_sizes[144]	336	1			T15	2		T17	3		T18	3
len_keccak_block_sizes[168]	232	1			T17	3		T18	3		T169	3
len_1	678	1			T1	3		T2	2		T13	2
len_0	1093	1			T1	8		T2	2		T3	5