Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	7944	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	8060	1			T13	38		T15	19		T16	24
len_5001_7500	13236	1			T13	36		T15	18		T16	43
len_2501_5000	8267	1			T13	36		T15	18		T16	14
len_1025_2500	4898	1			T13	22		T15	11		T16	5
len_769_1024	5955	1			T3	19		T13	4		T15	2
len_513_768	6284	1			T3	34		T13	4		T15	2
len_257_512	13919	1			T3	31		T13	52		T15	2
len_0_256	202450	1			T1	9		T2	9		T3	24
len_keccak_block_sizes[72]	642	1			T13	3		T15	2		T40	2
len_keccak_block_sizes[104]	531	1			T13	3		T15	2		T40	2
len_keccak_block_sizes[136]	433	1			T13	3		T15	2		T96	3
len_keccak_block_sizes[144]	334	1			T13	3		T96	3		T158	3
len_keccak_block_sizes[168]	233	1			T13	3		T96	3		T158	3
len_1	669	1			T13	3		T14	2		T15	2
len_0	1126	1			T13	3		T15	2		T16	2