Group : kmac_env_pkg::kmac_env_cov::msg_len_cg
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Group : kmac_env_pkg::kmac_env_cov::msg_len_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv



Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 15 0 15 100.00


Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
msg_len 15 0 15 100.00 100 1 1 0


Summary for Variable msg_len

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 15 0 15 100.00


User Defined Bins for msg_len

Excluded/Illegal bins
NAMECOUNTSTATUS
remainder 403 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
len_7501_10000 2690 1 T1 30 T15 17 T19 15
len_5001_7500 6239 1 T1 124 T15 50 T19 15
len_2501_5000 1492 1 T1 17 T15 13 T19 15
len_1025_2500 934 1 T1 14 T15 6 T19 8
len_769_1024 5323 1 T1 49 T15 1 T18 36
len_513_768 5802 1 T1 58 T18 32 T19 1
len_257_512 5998 1 T1 50 T15 1 T18 25
len_0_256 19797 1 T1 69 T15 8 T16 75
len_keccak_block_sizes[72] 30 1 T185 1 T186 1 T163 1
len_keccak_block_sizes[104] 26 1 T18 1 T187 1 T103 1
len_keccak_block_sizes[136] 26 1 T185 1 T48 3 T188 1
len_keccak_block_sizes[144] 23 1 T18 1 T29 1 T160 1
len_keccak_block_sizes[168] 32 1 T25 1 T23 1 T162 1
len_1 63 1 T143 1 T189 1 T190 1
len_0 483 1 T1 6 T15 2 T16 1

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