Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	0	14	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	0	14	100.00	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	0	14	100.00

User Defined Bins for output_digest_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	631	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	5270	1			T1	53		T15	15		T18	17
len_601_800	12020	1			T1	147		T15	31		T18	41
len_401_600	8071	1			T1	98		T15	27		T18	35
len_201_400	4659	1			T1	43		T15	11		T18	10
len_65_200	8011	1			T1	27		T15	7		T16	34
len_min_for_xof_require_squeeze	86	1			T20	1		T191	9		T192	10
len_keccak_block_sizes[72]	75	1			T191	9		T143	1		T193	1
len_keccak_block_sizes[104]	75	1			T1	1		T16	1		T17	1
len_keccak_block_sizes[136]	69	1			T191	9		T189	1		T190	1
len_keccak_block_sizes[144]	50	1			T143	2		T104	1		T187	1
len_keccak_block_sizes[168]	47	1			T26	1		T143	1		T104	1
len_datapath_width	1070	1			T1	5		T16	5		T17	2
len_2_63	14865	1			T1	96		T15	4		T16	35
len_1	53	1			T1	1		T16	1		T17	1