Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	41578728	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

49311817

1

T1

340719

T2

15142

T3

25297

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	49355520	1			T1	432648		T2	15961		T3	11352
values[0x0]	20114748	1			T1	186336		T2	3585		T3	9216
values[0x1]	21420277	1			T1	202396		T2	3681		T3	9356

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	32301267	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

58589278

1

T1

445864

T2

16948

T3

26573

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	297101	1			T1	3172		T2	87		T3	110
valid_sources[0x01]	296879	1			T1	3241		T2	82		T3	122
valid_sources[0x02]	295367	1			T1	3135		T2	83		T3	116
valid_sources[0x03]	301130	1			T1	3003		T2	89		T3	108
valid_sources[0x04]	295232	1			T1	3146		T2	84		T3	98
valid_sources[0x05]	304850	1			T1	3260		T2	90		T3	109
valid_sources[0x06]	298105	1			T1	3288		T2	79		T3	108
valid_sources[0x07]	298987	1			T1	3337		T2	73		T3	107
valid_sources[0x08]	298157	1			T1	3103		T2	101		T3	103
valid_sources[0x09]	299959	1			T1	3302		T2	99		T3	131
valid_sources[0x0a]	303087	1			T1	3239		T2	83		T3	115
valid_sources[0x0b]	303689	1			T1	3276		T2	108		T3	117
valid_sources[0x0c]	683750	1			T1	3258		T2	115		T3	129
valid_sources[0x0d]	299288	1			T1	3194		T2	96		T3	111
valid_sources[0x0e]	302479	1			T1	3314		T2	81		T3	124
valid_sources[0x0f]	300418	1			T1	3221		T2	81		T3	112
valid_sources[0x10]	300383	1			T1	3213		T2	97		T3	105
valid_sources[0x11]	298356	1			T1	3203		T2	94		T3	130
valid_sources[0x12]	301005	1			T1	3255		T2	75		T3	109
valid_sources[0x13]	1044332	1			T1	3370		T2	90		T3	120
valid_sources[0x14]	359030	1			T1	3259		T2	89		T3	117
valid_sources[0x15]	1175531	1			T1	3116		T2	73		T3	119
valid_sources[0x16]	302609	1			T1	3239		T2	89		T3	123
valid_sources[0x17]	299861	1			T1	3130		T2	89		T3	118
valid_sources[0x18]	297445	1			T1	3171		T2	96		T3	113
valid_sources[0x19]	299929	1			T1	3245		T2	95		T3	122
valid_sources[0x1a]	298963	1			T1	3348		T2	99		T3	112
valid_sources[0x1b]	296676	1			T1	3315		T2	91		T3	146
valid_sources[0x1c]	298281	1			T1	3153		T2	89		T3	127
valid_sources[0x1d]	300413	1			T1	3325		T2	83		T3	106
valid_sources[0x1e]	498387	1			T1	3138		T2	97		T3	108
valid_sources[0x1f]	304875	1			T1	3218		T2	75		T3	100
valid_sources[0x20]	315273	1			T1	3234		T2	89		T3	127
valid_sources[0x21]	300004	1			T1	3183		T2	77		T3	121
valid_sources[0x22]	299266	1			T1	3245		T2	67		T3	122
valid_sources[0x23]	299668	1			T1	3330		T2	94		T3	105
valid_sources[0x24]	297351	1			T1	3068		T2	84		T3	89
valid_sources[0x25]	301808	1			T1	3184		T2	98		T3	123
valid_sources[0x26]	299310	1			T1	3218		T2	98		T3	117
valid_sources[0x27]	298518	1			T1	3092		T2	109		T3	128
valid_sources[0x28]	297364	1			T1	3267		T2	90		T3	102
valid_sources[0x29]	300548	1			T1	3253		T2	92		T3	128
valid_sources[0x2a]	299713	1			T1	3220		T2	100		T3	128
valid_sources[0x2b]	300641	1			T1	3014		T2	90		T3	106
valid_sources[0x2c]	301942	1			T1	3281		T2	76		T3	124
valid_sources[0x2d]	298072	1			T1	3222		T2	98		T3	129
valid_sources[0x2e]	325814	1			T1	3173		T2	91		T3	107
valid_sources[0x2f]	303272	1			T1	3315		T2	97		T3	113
valid_sources[0x30]	296378	1			T1	3093		T2	96		T3	113
valid_sources[0x31]	294824	1			T1	3256		T2	84		T3	114
valid_sources[0x32]	298102	1			T1	3155		T2	108		T3	106
valid_sources[0x33]	295059	1			T1	3106		T2	96		T3	116
valid_sources[0x34]	301042	1			T1	3193		T2	108		T3	112
valid_sources[0x35]	323575	1			T1	3274		T2	86		T3	121
valid_sources[0x36]	750755	1			T1	3125		T2	77		T3	122
valid_sources[0x37]	710518	1			T1	3268		T2	99		T3	111
valid_sources[0x38]	299118	1			T1	3172		T2	106		T3	122
valid_sources[0x39]	338460	1			T1	3289		T2	88		T3	122
valid_sources[0x3a]	313561	1			T1	3238		T2	89		T3	118
valid_sources[0x3b]	294840	1			T1	3195		T2	84		T3	127
valid_sources[0x3c]	300158	1			T1	3193		T2	98		T3	136
valid_sources[0x3d]	306634	1			T1	3212		T2	100		T3	114
valid_sources[0x3e]	304768	1			T1	3274		T2	88		T3	128
valid_sources[0x3f]	299049	1			T1	3229		T2	97		T3	100
valid_sources[0x40]	311411	1			T1	3197		T2	82		T3	121
valid_sources[0x41]	297693	1			T1	3223		T2	86		T3	127
valid_sources[0x42]	303897	1			T1	3256		T2	98		T3	103
valid_sources[0x43]	295835	1			T1	3088		T2	102		T3	125
valid_sources[0x44]	356026	1			T1	3305		T2	90		T3	105
valid_sources[0x45]	304040	1			T1	3167		T2	101		T3	137
valid_sources[0x46]	317052	1			T1	3342		T2	110		T3	137
valid_sources[0x47]	303801	1			T1	3226		T2	84		T3	120
valid_sources[0x48]	478955	1			T1	3125		T2	103		T3	117
valid_sources[0x49]	318447	1			T1	3232		T2	88		T3	116
valid_sources[0x4a]	401047	1			T1	3229		T2	91		T3	143
valid_sources[0x4b]	297299	1			T1	3098		T2	84		T3	138
valid_sources[0x4c]	304524	1			T1	3275		T2	108		T3	121
valid_sources[0x4d]	522526	1			T1	3221		T2	91		T3	114
valid_sources[0x4e]	300010	1			T1	3116		T2	81		T3	105
valid_sources[0x4f]	741009	1			T1	3124		T2	98		T3	117
valid_sources[0x50]	298347	1			T1	3098		T2	94		T3	106
valid_sources[0x51]	322495	1			T1	3205		T2	85		T3	110
valid_sources[0x52]	313660	1			T1	3117		T2	95		T3	113
valid_sources[0x53]	298091	1			T1	3207		T2	66		T3	99
valid_sources[0x54]	542819	1			T1	3256		T2	90		T3	113
valid_sources[0x55]	297795	1			T1	3159		T2	93		T3	129
valid_sources[0x56]	296446	1			T1	3227		T2	91		T3	97
valid_sources[0x57]	300111	1			T1	3121		T2	73		T3	104
valid_sources[0x58]	301297	1			T1	3263		T2	65		T3	120
valid_sources[0x59]	300341	1			T1	3320		T2	87		T3	119
valid_sources[0x5a]	303300	1			T1	3257		T2	82		T3	139
valid_sources[0x5b]	307864	1			T1	3175		T2	113		T3	110
valid_sources[0x5c]	303339	1			T1	3290		T2	101		T3	140
valid_sources[0x5d]	294873	1			T1	3242		T2	80		T3	120
valid_sources[0x5e]	298233	1			T1	3238		T2	74		T3	102
valid_sources[0x5f]	325239	1			T1	3152		T2	98		T3	112
valid_sources[0x60]	303068	1			T1	3212		T2	87		T3	103
valid_sources[0x61]	298400	1			T1	3201		T2	96		T3	131
valid_sources[0x62]	302844	1			T1	3229		T2	100		T3	98
valid_sources[0x63]	480216	1			T1	3141		T2	103		T3	122
valid_sources[0x64]	387491	1			T1	3231		T2	90		T3	123
valid_sources[0x65]	303248	1			T1	3164		T2	91		T3	124
valid_sources[0x66]	298194	1			T1	3109		T2	105		T3	100
valid_sources[0x67]	333169	1			T1	3142		T2	92		T3	134
valid_sources[0x68]	299061	1			T1	3215		T2	104		T3	123
valid_sources[0x69]	297506	1			T1	3304		T2	89		T3	116
valid_sources[0x6a]	296981	1			T1	3138		T2	75		T3	116
valid_sources[0x6b]	373259	1			T1	3244		T2	104		T3	118
valid_sources[0x6c]	298918	1			T1	3284		T2	80		T3	112
valid_sources[0x6d]	359718	1			T1	3258		T2	102		T3	121
valid_sources[0x6e]	294934	1			T1	3179		T2	76		T3	123
valid_sources[0x6f]	296884	1			T1	3149		T2	91		T3	99
valid_sources[0x70]	298895	1			T1	3143		T2	99		T3	113
valid_sources[0x71]	431888	1			T1	3220		T2	77		T3	121
valid_sources[0x72]	299252	1			T1	3367		T2	79		T3	120
valid_sources[0x73]	311291	1			T1	3168		T2	98		T3	125
valid_sources[0x74]	299952	1			T1	3230		T2	97		T3	115
valid_sources[0x75]	300044	1			T1	3200		T2	76		T3	121
valid_sources[0x76]	299771	1			T1	3192		T2	76		T3	122
valid_sources[0x77]	312004	1			T1	3165		T2	108		T3	105
valid_sources[0x78]	295286	1			T1	3090		T2	83		T3	116
valid_sources[0x79]	297861	1			T1	3199		T2	81		T3	148
valid_sources[0x7a]	298327	1			T1	3151		T2	96		T3	120
valid_sources[0x7b]	299161	1			T1	3206		T2	84		T3	103
valid_sources[0x7c]	301201	1			T1	3297		T2	89		T3	105
valid_sources[0x7d]	444322	1			T1	3243		T2	70		T3	135
valid_sources[0x7e]	623060	1			T1	3167		T2	102		T3	114
valid_sources[0x7f]	357950	1			T1	3088		T2	85		T3	104
valid_sources[0x80]	299288	1			T1	3185		T2	95		T3	115

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

23807055

1

T1

143968

T2

11002

T3

7056

values[0x0]

all_enables

biggest_size

13422466

1

T1

105997

T2

2244

T3

9088

values[0x1]

all_enables

biggest_size

12082296

1

T1

90754

T2

1896

T3

9153