Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
dashboard | hierarchy | modlist | groups | tests | asserts

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 100.00 1 100 1 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64




Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 34013723 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 44201172 1 T1 158 T2 69919 T3 264748



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 42555627 1 T1 74 T2 75714 T3 76808
values[0x0] 17299054 1 T1 48 T2 17583 T3 102577
values[0x1] 18360214 1 T1 45 T2 19192 T3 103271



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 26406206 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 51808689 1 T1 160 T2 79735 T3 269244



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 273528 1 T2 460 T3 1056 T9 11
valid_sources[0x01] 248922 1 T2 407 T3 1151 T9 60
valid_sources[0x02] 247394 1 T2 391 T3 1131 T9 24
valid_sources[0x03] 248460 1 T2 377 T3 1066 T9 31
valid_sources[0x04] 247565 1 T2 461 T3 1022 T9 11
valid_sources[0x05] 354790 1 T2 374 T3 1152 T9 74
valid_sources[0x06] 247942 1 T2 464 T3 984 T9 112
valid_sources[0x07] 247370 1 T2 438 T3 1218 T9 113
valid_sources[0x08] 245019 1 T2 428 T3 1115 T9 93
valid_sources[0x09] 246949 1 T2 423 T3 982 T9 131
valid_sources[0x0a] 273043 1 T2 438 T3 1132 T9 40
valid_sources[0x0b] 245548 1 T2 412 T3 1235 T9 72
valid_sources[0x0c] 248084 1 T2 484 T3 1136 T9 96
valid_sources[0x0d] 392156 1 T2 402 T3 1002 T9 49
valid_sources[0x0e] 248830 1 T2 444 T3 1096 T9 64
valid_sources[0x0f] 246627 1 T2 391 T3 1126 T9 36
valid_sources[0x10] 284580 1 T2 376 T3 1158 T9 70
valid_sources[0x11] 283057 1 T2 454 T3 1071 T9 27
valid_sources[0x12] 246088 1 T2 474 T3 1067 T9 22
valid_sources[0x13] 246305 1 T2 476 T3 1206 T9 75
valid_sources[0x14] 249983 1 T2 395 T3 1195 T9 92
valid_sources[0x15] 387158 1 T2 446 T3 1063 T9 90
valid_sources[0x16] 251338 1 T2 470 T3 1087 T9 123
valid_sources[0x17] 250731 1 T2 415 T3 1086 T9 30
valid_sources[0x18] 352906 1 T2 513 T3 1146 T9 50
valid_sources[0x19] 404460 1 T2 479 T3 1097 T9 57
valid_sources[0x1a] 245817 1 T2 372 T3 1105 T9 92
valid_sources[0x1b] 268512 1 T2 452 T3 1100 T9 97
valid_sources[0x1c] 625708 1 T2 410 T3 1120 T9 33
valid_sources[0x1d] 245392 1 T2 407 T3 1016 T9 72
valid_sources[0x1e] 250314 1 T2 436 T3 1045 T9 70
valid_sources[0x1f] 1106641 1 T2 418 T3 1165 T9 102
valid_sources[0x20] 256928 1 T2 401 T3 1038 T9 62
valid_sources[0x21] 247209 1 T1 8 T2 509 T3 1179
valid_sources[0x22] 342810 1 T2 478 T3 1130 T9 73
valid_sources[0x23] 369157 1 T2 443 T3 1114 T9 148
valid_sources[0x24] 248683 1 T2 409 T3 1138 T9 36
valid_sources[0x25] 245967 1 T2 542 T3 1105 T9 113
valid_sources[0x26] 306961 1 T2 382 T3 1099 T9 97
valid_sources[0x27] 249504 1 T2 409 T3 1059 T9 33
valid_sources[0x28] 249469 1 T2 479 T3 1041 T9 46
valid_sources[0x29] 549213 1 T2 392 T3 1066 T9 97
valid_sources[0x2a] 1251763 1 T2 397 T3 1164 T9 22
valid_sources[0x2b] 250495 1 T2 455 T3 1121 T9 26
valid_sources[0x2c] 245864 1 T2 409 T3 1153 T9 186
valid_sources[0x2d] 253004 1 T2 430 T3 1049 T9 84
valid_sources[0x2e] 249536 1 T2 464 T3 1078 T9 121
valid_sources[0x2f] 247588 1 T2 418 T3 1059 T9 41
valid_sources[0x30] 268779 1 T2 432 T3 1012 T9 36
valid_sources[0x31] 248364 1 T2 354 T3 1219 T9 81
valid_sources[0x32] 252470 1 T2 387 T3 1066 T9 43
valid_sources[0x33] 249583 1 T2 401 T3 1085 T9 103
valid_sources[0x34] 250616 1 T2 400 T3 1155 T9 39
valid_sources[0x35] 259185 1 T2 428 T3 1055 T9 49
valid_sources[0x36] 332923 1 T2 340 T3 1119 T9 57
valid_sources[0x37] 248781 1 T2 432 T3 1091 T9 72
valid_sources[0x38] 250157 1 T2 456 T3 1079 T9 139
valid_sources[0x39] 375050 1 T2 484 T3 1079 T9 104
valid_sources[0x3a] 249303 1 T2 348 T3 1146 T9 55
valid_sources[0x3b] 532600 1 T2 401 T3 1096 T9 104
valid_sources[0x3c] 245932 1 T2 469 T3 1030 T9 90
valid_sources[0x3d] 249061 1 T2 459 T3 1076 T9 72
valid_sources[0x3e] 246576 1 T2 504 T3 1083 T9 87
valid_sources[0x3f] 248965 1 T2 411 T3 1055 T9 78
valid_sources[0x40] 408126 1 T2 479 T3 1132 T9 107
valid_sources[0x41] 244490 1 T2 459 T3 1157 T9 77
valid_sources[0x42] 394694 1 T2 424 T3 1101 T9 76
valid_sources[0x43] 350142 1 T2 384 T3 1043 T9 53
valid_sources[0x44] 247238 1 T2 501 T3 1042 T9 18
valid_sources[0x45] 249432 1 T2 432 T3 1182 T9 75
valid_sources[0x46] 245874 1 T2 434 T3 1094 T9 49
valid_sources[0x47] 880979 1 T2 434 T3 1060 T9 123
valid_sources[0x48] 393561 1 T2 522 T3 1114 T9 49
valid_sources[0x49] 880485 1 T2 503 T3 1111 T9 44
valid_sources[0x4a] 250042 1 T2 370 T3 1050 T9 71
valid_sources[0x4b] 248722 1 T2 418 T3 1103 T9 166
valid_sources[0x4c] 250118 1 T2 404 T3 1136 T9 60
valid_sources[0x4d] 248441 1 T2 400 T3 1119 T9 25
valid_sources[0x4e] 299778 1 T2 448 T3 1144 T9 53
valid_sources[0x4f] 249575 1 T2 374 T3 1174 T9 30
valid_sources[0x50] 261808 1 T2 443 T3 1062 T9 49
valid_sources[0x51] 248124 1 T2 490 T3 1075 T9 59
valid_sources[0x52] 964037 1 T2 553 T3 1073 T9 87
valid_sources[0x53] 247409 1 T2 471 T3 1086 T9 92
valid_sources[0x54] 244908 1 T2 387 T3 1064 T9 57
valid_sources[0x55] 675416 1 T2 503 T3 1029 T9 48
valid_sources[0x56] 258170 1 T2 474 T3 1128 T9 96
valid_sources[0x57] 368636 1 T2 481 T3 1116 T9 100
valid_sources[0x58] 310974 1 T2 421 T3 1076 T9 94
valid_sources[0x59] 392513 1 T2 419 T3 1095 T9 93
valid_sources[0x5a] 245966 1 T2 413 T3 1111 T9 97
valid_sources[0x5b] 266303 1 T2 453 T3 1057 T9 183
valid_sources[0x5c] 264299 1 T2 391 T3 1160 T9 64
valid_sources[0x5d] 249819 1 T2 401 T3 1105 T9 66
valid_sources[0x5e] 248732 1 T2 400 T3 1115 T9 62
valid_sources[0x5f] 263944 1 T2 428 T3 1101 T9 47
valid_sources[0x60] 247787 1 T2 336 T3 1086 T9 72
valid_sources[0x61] 248150 1 T2 512 T3 1071 T9 95
valid_sources[0x62] 248269 1 T2 514 T3 1144 T9 94
valid_sources[0x63] 246843 1 T2 386 T3 1132 T9 38
valid_sources[0x64] 430443 1 T2 439 T3 1138 T9 46
valid_sources[0x65] 248169 1 T2 455 T3 1132 T9 18
valid_sources[0x66] 396153 1 T2 451 T3 1090 T9 167
valid_sources[0x67] 353589 1 T2 401 T3 1070 T9 162
valid_sources[0x68] 244245 1 T2 430 T3 1182 T9 115
valid_sources[0x69] 295434 1 T2 384 T3 1049 T9 107
valid_sources[0x6a] 249514 1 T2 454 T3 1127 T9 53
valid_sources[0x6b] 248039 1 T2 388 T3 1054 T9 126
valid_sources[0x6c] 246299 1 T2 441 T3 1078 T9 87
valid_sources[0x6d] 452342 1 T2 414 T3 1034 T9 125
valid_sources[0x6e] 250175 1 T2 445 T3 1082 T9 66
valid_sources[0x6f] 247536 1 T2 426 T3 1079 T9 15
valid_sources[0x70] 245472 1 T2 463 T3 1117 T9 72
valid_sources[0x71] 246179 1 T2 482 T3 1052 T9 99
valid_sources[0x72] 246499 1 T2 471 T3 1014 T9 30
valid_sources[0x73] 251227 1 T2 490 T3 1087 T9 47
valid_sources[0x74] 265637 1 T2 486 T3 1041 T9 38
valid_sources[0x75] 311945 1 T2 516 T3 1040 T9 83
valid_sources[0x76] 278183 1 T2 390 T3 1045 T9 57
valid_sources[0x77] 251273 1 T2 388 T3 1066 T9 54
valid_sources[0x78] 245918 1 T2 443 T3 1118 T9 47
valid_sources[0x79] 359056 1 T2 395 T3 1079 T9 62
valid_sources[0x7a] 245158 1 T2 508 T3 1126 T9 149
valid_sources[0x7b] 245742 1 T2 388 T3 1136 T9 81
valid_sources[0x7c] 248866 1 T2 411 T3 1113 T9 110
valid_sources[0x7d] 387381 1 T2 494 T3 1082 T9 66
valid_sources[0x7e] 265939 1 T2 486 T3 1171 T9 88
valid_sources[0x7f] 346754 1 T2 418 T3 1115 T9 39
valid_sources[0x80] 285961 1 T2 481 T3 1129 T9 123



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 21603112 1 T1 70 T2 50200 T3 61842
values[0x0] all_enables biggest_size 11846396 1 T1 45 T2 10520 T3 101318
values[0x1] all_enables biggest_size 10751664 1 T1 43 T2 9199 T3 101588

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%