Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	38031110	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

48759498

1

T1

5

T2

6217

T3

36921

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	46749384	1			T1	1		T2	7041		T3	40747
values[0x0]	19422068	1			T1	10		T2	1413		T3	9452
values[0x1]	20619156	1			T1	10		T2	1509		T3	10198

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	29513996	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

57276612

1

T1

9

T2

7119

T3

42310

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	398098	1			T2	44		T3	238		T4	15
valid_sources[0x01]	305326	1			T2	38		T3	249		T4	22
valid_sources[0x02]	288055	1			T2	34		T3	229		T4	26
valid_sources[0x03]	290967	1			T2	45		T3	230		T4	21
valid_sources[0x04]	289990	1			T2	35		T3	222		T4	22
valid_sources[0x05]	289821	1			T2	69		T3	214		T4	21
valid_sources[0x06]	287011	1			T2	49		T3	224		T4	30
valid_sources[0x07]	287445	1			T2	24		T3	222		T4	18
valid_sources[0x08]	289871	1			T2	39		T3	230		T4	19
valid_sources[0x09]	285477	1			T2	39		T3	218		T4	18
valid_sources[0x0a]	365412	1			T2	37		T3	206		T4	78229
valid_sources[0x0b]	288182	1			T2	38		T3	252		T4	22
valid_sources[0x0c]	289816	1			T2	32		T3	234		T4	23
valid_sources[0x0d]	288987	1			T2	41		T3	255		T4	19
valid_sources[0x0e]	289029	1			T2	33		T3	198		T4	14
valid_sources[0x0f]	345846	1			T2	35		T3	219		T4	19
valid_sources[0x10]	328611	1			T2	42		T3	243		T4	17
valid_sources[0x11]	287869	1			T2	31		T3	218		T4	32
valid_sources[0x12]	285948	1			T2	46		T3	227		T4	17
valid_sources[0x13]	439216	1			T2	38		T3	222		T4	16
valid_sources[0x14]	288071	1			T2	54		T3	243		T4	19
valid_sources[0x15]	376329	1			T2	42		T3	229		T4	17
valid_sources[0x16]	286840	1			T2	46		T3	235		T4	16
valid_sources[0x17]	290634	1			T2	50		T3	221		T4	24
valid_sources[0x18]	288611	1			T2	72		T3	242		T4	26
valid_sources[0x19]	290888	1			T2	50		T3	245		T4	25
valid_sources[0x1a]	1519861	1			T2	38		T3	217		T4	20
valid_sources[0x1b]	632717	1			T2	28		T3	232		T4	17
valid_sources[0x1c]	289251	1			T2	39		T3	238		T4	20
valid_sources[0x1d]	283946	1			T2	36		T3	226		T4	17
valid_sources[0x1e]	289978	1			T2	49		T3	251		T4	16
valid_sources[0x1f]	286398	1			T2	33		T3	226		T4	13
valid_sources[0x20]	286663	1			T2	41		T3	226		T4	9
valid_sources[0x21]	293052	1			T2	36		T3	210		T4	19
valid_sources[0x22]	288832	1			T2	42		T3	252		T4	17
valid_sources[0x23]	285720	1			T2	37		T3	230		T4	16
valid_sources[0x24]	288315	1			T2	27		T3	270		T4	18
valid_sources[0x25]	288589	1			T2	34		T3	252		T4	18
valid_sources[0x26]	292127	1			T2	35		T3	239		T4	20
valid_sources[0x27]	310029	1			T2	43		T3	266		T4	15
valid_sources[0x28]	519272	1			T2	63		T3	252		T4	20
valid_sources[0x29]	309195	1			T2	36		T3	237		T4	16
valid_sources[0x2a]	289351	1			T2	36		T3	236		T4	22
valid_sources[0x2b]	1427325	1			T2	34		T3	252		T4	18
valid_sources[0x2c]	289821	1			T2	42		T3	202		T4	18
valid_sources[0x2d]	299354	1			T2	41		T3	244		T4	12
valid_sources[0x2e]	332612	1			T2	36		T3	232		T4	27
valid_sources[0x2f]	285097	1			T2	26		T3	250		T4	18
valid_sources[0x30]	410202	1			T2	51		T3	248		T4	20
valid_sources[0x31]	289326	1			T2	38		T3	224		T4	15
valid_sources[0x32]	619531	1			T2	57		T3	233		T4	21
valid_sources[0x33]	285233	1			T2	31		T3	262		T4	21
valid_sources[0x34]	289766	1			T2	41		T3	241		T4	13
valid_sources[0x35]	730137	1			T2	43		T3	236		T4	18
valid_sources[0x36]	288708	1			T2	54		T3	234		T4	15
valid_sources[0x37]	290821	1			T2	40		T3	231		T4	26
valid_sources[0x38]	290870	1			T2	33		T3	214		T4	19
valid_sources[0x39]	290039	1			T2	42		T3	240		T4	17
valid_sources[0x3a]	427287	1			T2	36		T3	229		T4	13
valid_sources[0x3b]	287325	1			T2	32		T3	215		T4	21
valid_sources[0x3c]	287885	1			T2	41		T3	249		T4	14
valid_sources[0x3d]	292196	1			T2	49		T3	208		T4	22
valid_sources[0x3e]	656082	1			T2	36		T3	243		T4	18
valid_sources[0x3f]	774868	1			T2	44		T3	237		T4	17
valid_sources[0x40]	455600	1			T2	39		T3	245		T4	11
valid_sources[0x41]	284485	1			T2	27		T3	246		T4	17
valid_sources[0x42]	289147	1			T2	42		T3	199		T4	14
valid_sources[0x43]	303377	1			T2	47		T3	239		T4	18
valid_sources[0x44]	289060	1			T2	40		T3	199		T4	20
valid_sources[0x45]	296749	1			T2	29		T3	224		T4	24
valid_sources[0x46]	1132380	1			T2	43		T3	223		T4	23
valid_sources[0x47]	296265	1			T2	30		T3	222		T4	10
valid_sources[0x48]	307897	1			T2	48		T3	275		T4	25
valid_sources[0x49]	300320	1			T2	36		T3	221		T4	16
valid_sources[0x4a]	450984	1			T2	24		T3	227		T4	19
valid_sources[0x4b]	418003	1			T2	24		T3	233		T4	17
valid_sources[0x4c]	289393	1			T2	22		T3	256		T4	17
valid_sources[0x4d]	287985	1			T2	47		T3	230		T4	28
valid_sources[0x4e]	289741	1			T2	43		T3	219		T4	12
valid_sources[0x4f]	293645	1			T2	23		T3	218		T4	25
valid_sources[0x50]	291266	1			T2	32		T3	240		T4	22
valid_sources[0x51]	282805	1			T2	41		T3	237		T4	19
valid_sources[0x52]	288981	1			T2	56		T3	244		T4	29
valid_sources[0x53]	290201	1			T2	27		T3	224		T4	19
valid_sources[0x54]	285088	1			T2	50		T3	240		T4	17
valid_sources[0x55]	329186	1			T2	53		T3	243		T4	16
valid_sources[0x56]	284582	1			T2	23		T3	239		T4	23
valid_sources[0x57]	1122103	1			T2	49		T3	231		T4	22
valid_sources[0x58]	292110	1			T2	56		T3	222		T4	21
valid_sources[0x59]	308828	1			T2	41		T3	219		T4	17
valid_sources[0x5a]	292340	1			T2	26		T3	223		T4	24
valid_sources[0x5b]	289525	1			T2	41		T3	217		T4	21
valid_sources[0x5c]	285459	1			T2	36		T3	232		T4	21
valid_sources[0x5d]	286600	1			T2	46		T3	239		T4	22
valid_sources[0x5e]	288865	1			T2	40		T3	244		T4	13
valid_sources[0x5f]	288831	1			T2	28		T3	249		T4	16
valid_sources[0x60]	299827	1			T2	37		T3	234		T4	17
valid_sources[0x61]	293775	1			T2	47		T3	283		T4	15
valid_sources[0x62]	289749	1			T2	53		T3	232		T4	18
valid_sources[0x63]	284616	1			T2	33		T3	232		T4	15
valid_sources[0x64]	290445	1			T2	33		T3	240		T4	16
valid_sources[0x65]	457912	1			T2	50		T3	233		T4	17
valid_sources[0x66]	290302	1			T2	32		T3	228		T4	16
valid_sources[0x67]	286122	1			T2	44		T3	248		T4	20
valid_sources[0x68]	285730	1			T2	47		T3	240		T4	26
valid_sources[0x69]	289141	1			T2	36		T3	225		T4	21
valid_sources[0x6a]	287239	1			T2	50		T3	226		T4	20
valid_sources[0x6b]	290854	1			T2	46		T3	284		T4	20
valid_sources[0x6c]	289861	1			T2	43		T3	250		T4	14
valid_sources[0x6d]	414072	1			T2	46		T3	266		T4	15
valid_sources[0x6e]	490633	1			T2	40		T3	253		T4	8
valid_sources[0x6f]	285982	1			T1	21		T2	31		T3	206
valid_sources[0x70]	290393	1			T2	41		T3	256		T4	22
valid_sources[0x71]	377635	1			T2	37		T3	218		T4	17
valid_sources[0x72]	291626	1			T2	75		T3	243		T4	19
valid_sources[0x73]	289335	1			T2	27		T3	223		T4	25
valid_sources[0x74]	401033	1			T2	39		T3	228		T4	17
valid_sources[0x75]	287304	1			T2	38		T3	247		T4	14
valid_sources[0x76]	286654	1			T2	56		T3	244		T4	25
valid_sources[0x77]	287825	1			T2	28		T3	253		T4	12
valid_sources[0x78]	288934	1			T2	39		T3	254		T4	19
valid_sources[0x79]	286330	1			T2	46		T3	251		T4	18
valid_sources[0x7a]	353689	1			T2	29		T3	242		T4	19
valid_sources[0x7b]	288901	1			T2	23		T3	242		T4	24
valid_sources[0x7c]	284862	1			T2	51		T3	237		T4	14
valid_sources[0x7d]	285083	1			T2	64		T3	201		T4	17
valid_sources[0x7e]	290639	1			T2	54		T3	260		T4	18
valid_sources[0x7f]	291539	1			T2	51		T3	235		T4	13
valid_sources[0x80]	307889	1			T2	46		T3	259		T4	15

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

23324940

1

T2

4698

T3

26884

T4

36086

values[0x0]

all_enables

biggest_size

13326650

1

T1

3

T2

828

T3

5425

values[0x1]

all_enables

biggest_size

12107908

1

T1

2

T2

691

T3

4612