Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/kmac_unmasked-sim-vcs/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	43625804	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

51741523

1

T1

42519

T2

430

T3

435

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	51600560	1			T1	45658		T2	339		T3	307
values[0x0]	21185701	1			T1	11304		T2	146		T3	140
values[0x1]	22581066	1			T1	11749		T2	170		T3	147

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	33855543	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

61511784

1

T1

48172

T2

487

T3

471

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	293707	1			T1	328		T2	4		T3	3
valid_sources[0x01]	400165	1			T1	166		T3	5		T14	2
valid_sources[0x02]	292501	1			T1	547		T3	5		T12	1
valid_sources[0x03]	1055549	1			T1	186		T2	8		T3	2
valid_sources[0x04]	360095	1			T1	27		T2	5		T3	1
valid_sources[0x05]	279197	1			T1	86		T3	2		T12	2
valid_sources[0x06]	284283	1			T1	158		T2	4		T3	1
valid_sources[0x07]	277700	1			T1	473		T3	7		T4	1
valid_sources[0x08]	278019	1			T1	431		T12	1		T14	3
valid_sources[0x09]	427906	1			T1	349		T2	6		T3	1
valid_sources[0x0a]	292333	1			T1	238		T2	9		T4	1
valid_sources[0x0b]	280420	1			T1	569		T3	4		T12	5
valid_sources[0x0c]	294267	1			T1	381		T2	3		T3	1
valid_sources[0x0d]	276951	1			T1	273		T14	1		T15	9
valid_sources[0x0e]	277332	1			T1	119		T3	1		T14	3
valid_sources[0x0f]	276199	1			T1	146		T2	2		T12	1
valid_sources[0x10]	310937	1			T1	187		T2	2		T12	2
valid_sources[0x11]	302624	1			T1	240		T2	2		T3	4
valid_sources[0x12]	538728	1			T1	188		T2	3		T3	1
valid_sources[0x13]	278504	1			T1	261		T2	3		T3	5
valid_sources[0x14]	277587	1			T1	213		T2	3		T4	1
valid_sources[0x15]	279112	1			T1	29		T2	4		T3	1
valid_sources[0x16]	274835	1			T1	232		T2	5		T3	3
valid_sources[0x17]	279852	1			T1	1029		T2	1		T3	4
valid_sources[0x18]	277779	1			T1	263		T2	1		T3	2
valid_sources[0x19]	274530	1			T1	218		T2	7		T3	5
valid_sources[0x1a]	334416	1			T1	294		T2	8		T12	1
valid_sources[0x1b]	275595	1			T1	32		T2	3		T3	4
valid_sources[0x1c]	284373	1			T1	365		T2	2		T12	1
valid_sources[0x1d]	273904	1			T1	191		T2	1		T3	3
valid_sources[0x1e]	275671	1			T1	313		T2	1		T3	2
valid_sources[0x1f]	298331	1			T1	50		T3	1		T4	1
valid_sources[0x20]	279638	1			T1	519		T2	2		T3	4
valid_sources[0x21]	914916	1			T1	254		T2	4		T3	1
valid_sources[0x22]	280529	1			T1	57		T2	1		T3	1
valid_sources[0x23]	289071	1			T1	263		T2	2		T12	5
valid_sources[0x24]	300446	1			T1	29		T2	4		T3	4
valid_sources[0x25]	1233706	1			T1	55		T4	2		T16	7
valid_sources[0x26]	274980	1			T1	132		T2	5		T3	3
valid_sources[0x27]	683011	1			T1	288		T2	1		T3	1
valid_sources[0x28]	279794	1			T1	46		T2	11		T3	3
valid_sources[0x29]	278216	1			T1	383		T3	3		T12	5
valid_sources[0x2a]	1086492	1			T1	353		T2	4		T3	1
valid_sources[0x2b]	1221171	1			T1	460		T2	3		T3	4
valid_sources[0x2c]	279611	1			T1	176		T2	1		T3	1
valid_sources[0x2d]	277645	1			T1	179		T2	1		T3	4
valid_sources[0x2e]	279598	1			T1	398		T2	1		T4	1
valid_sources[0x2f]	320720	1			T1	995		T3	1		T12	2
valid_sources[0x30]	429836	1			T1	571		T2	5		T4	4
valid_sources[0x31]	275201	1			T1	303		T2	1		T4	3
valid_sources[0x32]	280912	1			T1	239		T4	2		T12	1
valid_sources[0x33]	275875	1			T1	94		T3	5		T4	1
valid_sources[0x34]	275262	1			T1	255		T2	1		T4	1
valid_sources[0x35]	276829	1			T1	88		T2	2		T3	6
valid_sources[0x36]	278569	1			T1	432		T2	13		T3	2
valid_sources[0x37]	276669	1			T1	494		T2	1		T3	1
valid_sources[0x38]	1030924	1			T1	210		T2	4		T12	2
valid_sources[0x39]	558472	1			T1	317		T2	4		T3	3
valid_sources[0x3a]	282498	1			T1	333		T2	3		T3	1
valid_sources[0x3b]	410355	1			T1	598		T2	2		T4	1
valid_sources[0x3c]	290147	1			T1	316		T4	2		T12	1
valid_sources[0x3d]	281691	1			T1	53		T2	1		T3	3
valid_sources[0x3e]	279495	1			T1	212		T2	2		T3	1
valid_sources[0x3f]	509907	1			T1	197		T2	2		T3	2
valid_sources[0x40]	288277	1			T1	277		T2	4		T3	3
valid_sources[0x41]	395916	1			T1	345		T2	1		T3	4
valid_sources[0x42]	277017	1			T1	186		T12	5		T14	1
valid_sources[0x43]	280723	1			T1	623		T2	7		T3	3
valid_sources[0x44]	276630	1			T1	279		T2	1		T3	5
valid_sources[0x45]	284888	1			T1	863		T2	6		T12	3
valid_sources[0x46]	277840	1			T1	88		T3	1		T4	2
valid_sources[0x47]	283640	1			T1	439		T2	2		T3	2
valid_sources[0x48]	589838	1			T1	23		T2	3		T4	2
valid_sources[0x49]	314944	1			T1	21		T2	2		T3	1
valid_sources[0x4a]	280360	1			T1	96		T2	5		T3	3
valid_sources[0x4b]	391903	1			T1	76		T2	3		T3	4
valid_sources[0x4c]	281830	1			T1	267		T2	1		T3	1
valid_sources[0x4d]	278000	1			T1	421		T12	2		T14	1
valid_sources[0x4e]	278863	1			T1	21		T2	1		T4	4
valid_sources[0x4f]	278873	1			T1	24		T2	2		T3	8
valid_sources[0x50]	276533	1			T1	247		T3	1		T12	3
valid_sources[0x51]	408831	1			T1	176		T2	9		T3	1
valid_sources[0x52]	349379	1			T1	216		T3	1		T12	4
valid_sources[0x53]	576545	1			T1	661		T2	1		T12	5
valid_sources[0x54]	375996	1			T1	462		T2	4		T3	1
valid_sources[0x55]	275177	1			T1	204		T3	1		T4	1
valid_sources[0x56]	1171113	1			T1	61		T12	3		T14	1
valid_sources[0x57]	401753	1			T1	507		T3	5		T4	1
valid_sources[0x58]	2152677	1			T1	222		T2	3		T4	1
valid_sources[0x59]	293113	1			T1	373		T4	2		T15	2
valid_sources[0x5a]	455802	1			T1	163		T3	1		T12	1
valid_sources[0x5b]	278963	1			T1	202		T2	1		T3	1
valid_sources[0x5c]	1102727	1			T1	471		T2	5		T3	5
valid_sources[0x5d]	318940	1			T1	78		T3	2		T4	2
valid_sources[0x5e]	1213423	1			T1	563		T2	3		T3	9
valid_sources[0x5f]	275521	1			T1	230		T2	3		T3	8
valid_sources[0x60]	281144	1			T1	32		T2	2		T3	4
valid_sources[0x61]	275640	1			T1	72		T2	3		T3	1
valid_sources[0x62]	295447	1			T1	182		T2	3		T3	3
valid_sources[0x63]	281302	1			T1	133		T2	4		T3	1
valid_sources[0x64]	277731	1			T1	143		T2	7		T3	3
valid_sources[0x65]	298573	1			T1	604		T3	7		T12	3
valid_sources[0x66]	423438	1			T1	201		T2	3		T3	3
valid_sources[0x67]	275748	1			T1	64		T2	8		T3	3
valid_sources[0x68]	308584	1			T1	134		T3	2		T12	1
valid_sources[0x69]	279315	1			T1	712		T2	7		T3	10
valid_sources[0x6a]	274634	1			T1	668		T2	14		T3	6
valid_sources[0x6b]	277749	1			T1	28		T3	4		T12	1
valid_sources[0x6c]	277978	1			T1	186		T2	13		T3	8
valid_sources[0x6d]	277463	1			T1	497		T2	5		T12	1
valid_sources[0x6e]	277652	1			T1	349		T2	5		T3	11
valid_sources[0x6f]	534152	1			T1	444		T2	1		T3	3
valid_sources[0x70]	279628	1			T1	521		T2	3		T12	4
valid_sources[0x71]	468093	1			T1	229		T2	1		T3	6
valid_sources[0x72]	278994	1			T1	222		T2	3		T3	2
valid_sources[0x73]	294678	1			T1	296		T3	2		T12	3
valid_sources[0x74]	276037	1			T1	200		T2	7		T4	1
valid_sources[0x75]	281142	1			T1	707		T3	8		T12	1
valid_sources[0x76]	481425	1			T1	146		T2	4		T3	1
valid_sources[0x77]	276211	1			T1	193		T3	5		T14	2
valid_sources[0x78]	277059	1			T1	23		T2	3		T12	7
valid_sources[0x79]	293602	1			T1	29		T4	4		T12	2
valid_sources[0x7a]	280026	1			T1	78		T2	3		T3	3
valid_sources[0x7b]	323750	1			T1	392		T2	4		T3	1
valid_sources[0x7c]	311075	1			T1	224		T2	3		T3	8
valid_sources[0x7d]	280132	1			T1	454		T2	3		T12	7
valid_sources[0x7e]	276711	1			T1	221		T3	3		T4	1
valid_sources[0x7f]	454768	1			T1	34		T4	1		T16	9
valid_sources[0x80]	276945	1			T1	290		T3	1		T12	10

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

24786079

1

T1

29584

T2

225

T3

211

values[0x0]

all_enables

biggest_size

14178668

1

T1

6955

T2

105

T3

113

values[0x1]

all_enables

biggest_size

12776776

1

T1

5980

T2

100

T3

111