Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspaces/repo/scratch/os_regression_2024_08_26/kmac_unmasked-sim-vcs/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	210	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	2676	1			T37	2		T52	14		T42	1
len_5001_7500	6402	1			T37	1		T52	39		T42	9
len_2501_5000	1403	1			T52	9		T42	3		T53	13
len_1025_2500	850	1			T52	6		T42	2		T53	7
len_769_1024	5150	1			T13	2		T4	1		T21	14
len_513_768	5719	1			T13	2		T4	2		T31	1
len_257_512	5975	1			T13	1		T4	2		T21	11
len_0_256	18796	1			T1	3		T2	3		T12	73
len_keccak_block_sizes[72]	36	1			T12	1		T16	1		T50	1
len_keccak_block_sizes[104]	33	1			T16	1		T76	1		T174	1
len_keccak_block_sizes[136]	30	1			T16	1		T76	1		T174	1
len_keccak_block_sizes[144]	35	1			T76	1		T89	1		T175	1
len_keccak_block_sizes[168]	29	1			T38	1		T175	1		T176	1
len_1	67	1			T12	1		T16	1		T49	1
len_0	495	1			T12	1		T16	1		T49	3