Group : kmac_env_pkg::app_cg_wrap::app_cg
dashboard | hierarchy | modlist | groups | tests | asserts

Group : kmac_env_pkg::app_cg_wrap::app_cg
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
88.89 88.89 1 100 1 1 64 64


Source File(s) :
/workspaces/repo/scratch/os_regression_2024_09_17/kmac_unmasked-sim-vcs/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

3 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
AppKeymgr_cg 88.89 1 100 1 64 64
AppLc_cg 88.89 1 100 1 64 64
AppRom_cg 88.89 1 100 1 64 64




Group Instance : AppKeymgr_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
88.89 1 100 1 64 64




Summary for Group Instance AppKeymgr_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 16 2 14 87.50
Crosses 2 0 2 100.00


Variables for Group Instance AppKeymgr_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
app_err 2 1 1 50.00 100 1 1 2
data_strb 8 0 8 100.00 100 1 1 0
done 2 0 2 100.00 100 1 1 2
in_keccak_rounds 2 1 1 50.00 100 1 1 2
single_data_beat 2 0 2 100.00 100 1 1 2


Crosses for Group Instance AppKeymgr_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
partial_data_on_last_beat 1 0 1 100.00 100 1 1 0
done_in_keccak_rounds 1 0 1 100.00 100 1 1 0



Group Instance : AppLc_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
88.89 1 100 1 64 64




Summary for Group Instance AppLc_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 16 2 14 87.50
Crosses 2 0 2 100.00


Variables for Group Instance AppLc_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
app_err 2 1 1 50.00 100 1 1 2
data_strb 8 0 8 100.00 100 1 1 0
done 2 0 2 100.00 100 1 1 2
in_keccak_rounds 2 1 1 50.00 100 1 1 2
single_data_beat 2 0 2 100.00 100 1 1 2


Crosses for Group Instance AppLc_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
partial_data_on_last_beat 1 0 1 100.00 100 1 1 0
done_in_keccak_rounds 1 0 1 100.00 100 1 1 0



Group Instance : AppRom_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
88.89 1 100 1 64 64




Summary for Group Instance AppRom_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 16 2 14 87.50
Crosses 2 0 2 100.00


Variables for Group Instance AppRom_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
app_err 2 1 1 50.00 100 1 1 2
data_strb 8 0 8 100.00 100 1 1 0
done 2 0 2 100.00 100 1 1 2
in_keccak_rounds 2 1 1 50.00 100 1 1 2
single_data_beat 2 0 2 100.00 100 1 1 2


Crosses for Group Instance AppRom_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
partial_data_on_last_beat 1 0 1 100.00 100 1 1 0
done_in_keccak_rounds 1 0 1 100.00 100 1 1 0


Summary for Variable app_err

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 1 1 50.00


Automatically Generated Bins for app_err

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
[auto[1]] 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 351089 1 T12 842 T21 3020 T22 1202



Summary for Variable data_strb

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 8 0 8 100.00


User Defined Bins for data_strb

Excluded/Illegal bins
NAMECOUNTSTATUS
invalid 190777 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
full_data_beat 114791 1 T12 825 T21 2971 T22 30
seven_bytes 6403 1 T22 29 T61 3 T23 48
six_bytes 6665 1 T22 33 T61 9 T23 67
five_bytes 6487 1 T22 36 T61 8 T23 62
four_bytes 6483 1 T22 34 T61 1 T23 54
three_bytes 6663 1 T22 42 T61 5 T23 61
two_bytes 6448 1 T22 39 T61 6 T23 49
one_byte 6372 1 T22 42 T61 6 T23 53



Summary for Variable done

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for done

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 344569 1 T12 808 T21 2922 T22 1188
auto[1] 6520 1 T12 34 T21 98 T22 14



Summary for Variable in_keccak_rounds

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 1 1 50.00


Automatically Generated Bins for in_keccak_rounds

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
[auto[1]] 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 351089 1 T12 842 T21 3020 T22 1202



Summary for Variable single_data_beat

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for single_data_beat

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 351071 1 T12 842 T21 3020 T22 1202
auto[1] 18 1 T37 1 T150 1 T156 1



Summary for Cross partial_data_on_last_beat

Samples crossed: done data_strb
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
User Defined Cross Bins 1 0 1 100.00


User Defined Cross Bins for partial_data_on_last_beat

Excluded/Illegal bins
NAMECOUNTSTATUS
invalid 0 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid 2181 1 T12 17 T21 49 T22 2



Summary for Cross done_in_keccak_rounds

Samples crossed: done in_keccak_rounds
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
User Defined Cross Bins 1 0 1 100.00


User Defined Cross Bins for done_in_keccak_rounds

Excluded/Illegal bins
NAMECOUNTSTATUS
invalid 0 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid 6520 1 T12 34 T21 98 T22 14


Summary for Variable app_err

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 1 1 50.00


Automatically Generated Bins for app_err

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
[auto[1]] 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 173898 1 T12 634 T21 1584 T22 884



Summary for Variable data_strb

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 8 0 8 100.00


User Defined Bins for data_strb

Excluded/Illegal bins
NAMECOUNTSTATUS
invalid 93731 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
full_data_beat 57868 1 T12 624 T21 1558 T22 16
seven_bytes 3183 1 T22 21 T62 2 T61 1
six_bytes 3245 1 T22 35 T61 3 T23 37
five_bytes 3261 1 T22 31 T62 1 T61 5
four_bytes 3117 1 T22 14 T62 1 T61 1
three_bytes 3201 1 T22 33 T62 1 T23 42
two_bytes 3115 1 T22 23 T61 3 T23 29
one_byte 3177 1 T22 19 T62 1 T61 2



Summary for Variable done

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for done

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 170608 1 T12 614 T21 1532 T22 876
auto[1] 3290 1 T12 20 T21 52 T22 8



Summary for Variable in_keccak_rounds

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 1 1 50.00


Automatically Generated Bins for in_keccak_rounds

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
[auto[1]] 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 173898 1 T12 634 T21 1584 T22 884



Summary for Variable single_data_beat

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for single_data_beat

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 173890 1 T12 634 T21 1584 T22 884
auto[1] 8 1 T47 1 T157 1 T158 1



Summary for Cross partial_data_on_last_beat

Samples crossed: done data_strb
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
User Defined Cross Bins 1 0 1 100.00


User Defined Cross Bins for partial_data_on_last_beat

Excluded/Illegal bins
NAMECOUNTSTATUS
invalid 0 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid 1076 1 T12 10 T21 26 T22 1



Summary for Cross done_in_keccak_rounds

Samples crossed: done in_keccak_rounds
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
User Defined Cross Bins 1 0 1 100.00


User Defined Cross Bins for done_in_keccak_rounds

Excluded/Illegal bins
NAMECOUNTSTATUS
invalid 0 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid 3290 1 T12 20 T21 52 T22 8


Summary for Variable app_err

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 1 1 50.00


Automatically Generated Bins for app_err

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
[auto[1]] 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 171999 1 T12 340 T21 1473 T22 1962



Summary for Variable data_strb

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 8 0 8 100.00


User Defined Bins for data_strb

Excluded/Illegal bins
NAMECOUNTSTATUS
invalid 96252 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
full_data_beat 52804 1 T12 335 T21 1451 T22 44
seven_bytes 3247 1 T22 57 T62 2 T61 6
six_bytes 3289 1 T22 61 T62 8 T61 10
five_bytes 3218 1 T22 46 T62 13 T61 14
four_bytes 3314 1 T22 46 T62 9 T61 8
three_bytes 3168 1 T22 52 T62 6 T61 9
two_bytes 3321 1 T22 50 T62 7 T61 6
one_byte 3386 1 T22 55 T62 7 T61 15



Summary for Variable done

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for done

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 168913 1 T12 330 T21 1429 T22 1938
auto[1] 3086 1 T12 10 T21 44 T22 24



Summary for Variable in_keccak_rounds

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 1 1 50.00


Automatically Generated Bins for in_keccak_rounds

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
[auto[1]] 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 171999 1 T12 340 T21 1473 T22 1962



Summary for Variable single_data_beat

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for single_data_beat

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 171987 1 T12 340 T21 1473 T22 1962
auto[1] 12 1 T24 1 T159 1 T160 1



Summary for Cross partial_data_on_last_beat

Samples crossed: done data_strb
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
User Defined Cross Bins 1 0 1 100.00


User Defined Cross Bins for partial_data_on_last_beat

Excluded/Illegal bins
NAMECOUNTSTATUS
invalid 0 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid 1009 1 T12 5 T21 22 T22 4



Summary for Cross done_in_keccak_rounds

Samples crossed: done in_keccak_rounds
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
User Defined Cross Bins 1 0 1 100.00


User Defined Cross Bins for done_in_keccak_rounds

Excluded/Illegal bins
NAMECOUNTSTATUS
invalid 0 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid 3086 1 T12 10 T21 44 T22 24

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%