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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
92.25 95.87 92.34 100.00 68.60 94.08 98.87 96.01


Total test records in report: 869
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html

T558 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/37.kmac_error.1418822910 Oct 03 11:10:41 AM UTC 24 Oct 03 11:14:17 AM UTC 24 22783920698 ps
T559 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/40.kmac_key_error.1919487437 Oct 03 11:14:18 AM UTC 24 Oct 03 11:14:24 AM UTC 24 429458394 ps
T102 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/40.kmac_lc_escalation.2420545117 Oct 03 11:14:25 AM UTC 24 Oct 03 11:14:28 AM UTC 24 45068157 ps
T560 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/40.kmac_entropy_refresh.2479734109 Oct 03 11:14:04 AM UTC 24 Oct 03 11:14:28 AM UTC 24 1264576354 ps
T561 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/40.kmac_alert_test.1009587098 Oct 03 11:14:29 AM UTC 24 Oct 03 11:14:31 AM UTC 24 19950905 ps
T562 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/39.kmac_error.1497138257 Oct 03 11:12:45 AM UTC 24 Oct 03 11:14:36 AM UTC 24 6756730076 ps
T563 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/36.kmac_app.1351272746 Oct 03 11:09:08 AM UTC 24 Oct 03 11:14:39 AM UTC 24 45653660235 ps
T564 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/38.kmac_entropy_refresh.897752567 Oct 03 11:11:20 AM UTC 24 Oct 03 11:14:40 AM UTC 24 10162762901 ps
T565 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/41.kmac_smoke.2985521244 Oct 03 11:14:32 AM UTC 24 Oct 03 11:14:51 AM UTC 24 1092655233 ps
T566 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/38.kmac_error.984456484 Oct 03 11:11:22 AM UTC 24 Oct 03 11:15:12 AM UTC 24 22196261448 ps
T567 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/37.kmac_app.4088309102 Oct 03 11:10:09 AM UTC 24 Oct 03 11:15:23 AM UTC 24 10348766359 ps
T568 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/37.kmac_stress_all.1942087740 Oct 03 11:10:50 AM UTC 24 Oct 03 11:15:44 AM UTC 24 8848735527 ps
T569 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/41.kmac_key_error.2777031484 Oct 03 11:15:45 AM UTC 24 Oct 03 11:15:49 AM UTC 24 914719251 ps
T570 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/41.kmac_lc_escalation.2276992412 Oct 03 11:15:50 AM UTC 24 Oct 03 11:15:53 AM UTC 24 153574205 ps
T571 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/35.kmac_error.307633955 Oct 03 11:08:15 AM UTC 24 Oct 03 11:15:55 AM UTC 24 46813958950 ps
T572 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/41.kmac_alert_test.569589834 Oct 03 11:15:56 AM UTC 24 Oct 03 11:15:58 AM UTC 24 30206063 ps
T573 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/31.kmac_burst_write.2224264240 Oct 03 11:02:22 AM UTC 24 Oct 03 11:16:05 AM UTC 24 8889716305 ps
T574 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/37.kmac_burst_write.153403719 Oct 03 11:10:05 AM UTC 24 Oct 03 11:16:13 AM UTC 24 3995580375 ps
T575 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/41.kmac_error.352145054 Oct 03 11:15:24 AM UTC 24 Oct 03 11:16:17 AM UTC 24 1629481659 ps
T576 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/42.kmac_sideload.115630161 Oct 03 11:16:14 AM UTC 24 Oct 03 11:16:19 AM UTC 24 155966102 ps
T577 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/41.kmac_app.2441429069 Oct 03 11:14:53 AM UTC 24 Oct 03 11:16:22 AM UTC 24 8049042120 ps
T578 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/42.kmac_smoke.141550017 Oct 03 11:15:59 AM UTC 24 Oct 03 11:16:25 AM UTC 24 1009012220 ps
T579 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/40.kmac_error.2339351835 Oct 03 11:14:13 AM UTC 24 Oct 03 11:16:35 AM UTC 24 5181386427 ps
T580 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/42.kmac_key_error.3582311941 Oct 03 11:16:36 AM UTC 24 Oct 03 11:16:49 AM UTC 24 1187734055 ps
T581 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/38.kmac_app.1792060633 Oct 03 11:11:13 AM UTC 24 Oct 03 11:16:52 AM UTC 24 9200715148 ps
T582 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/42.kmac_lc_escalation.45082826 Oct 03 11:16:50 AM UTC 24 Oct 03 11:16:53 AM UTC 24 433567729 ps
T583 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/42.kmac_entropy_refresh.190447027 Oct 03 11:16:23 AM UTC 24 Oct 03 11:16:54 AM UTC 24 2373230257 ps
T584 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/42.kmac_alert_test.424493319 Oct 03 11:16:54 AM UTC 24 Oct 03 11:16:56 AM UTC 24 17519243 ps
T585 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/33.kmac_long_msg_and_output.4052739531 Oct 03 11:04:41 AM UTC 24 Oct 03 11:16:57 AM UTC 24 74566702504 ps
T586 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/40.kmac_app.2683587348 Oct 03 11:13:49 AM UTC 24 Oct 03 11:16:59 AM UTC 24 7543493219 ps
T587 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/42.kmac_stress_all.2940834279 Oct 03 11:16:53 AM UTC 24 Oct 03 11:17:00 AM UTC 24 701025198 ps
T588 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/34.kmac_stress_all.783487935 Oct 03 11:07:05 AM UTC 24 Oct 03 11:17:04 AM UTC 24 13215699681 ps
T589 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/34.kmac_burst_write.3711993008 Oct 03 11:06:23 AM UTC 24 Oct 03 11:17:05 AM UTC 24 59850608944 ps
T590 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/35.kmac_burst_write.728078170 Oct 03 11:07:31 AM UTC 24 Oct 03 11:17:12 AM UTC 24 18322699814 ps
T591 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/43.kmac_key_error.2832637711 Oct 03 11:17:13 AM UTC 24 Oct 03 11:17:25 AM UTC 24 1144220390 ps
T592 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/43.kmac_lc_escalation.1141048682 Oct 03 11:17:26 AM UTC 24 Oct 03 11:17:29 AM UTC 24 91553255 ps
T593 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/43.kmac_smoke.721134300 Oct 03 11:16:55 AM UTC 24 Oct 03 11:17:33 AM UTC 24 2425395634 ps
T594 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/43.kmac_alert_test.1611521911 Oct 03 11:17:34 AM UTC 24 Oct 03 11:17:37 AM UTC 24 24431028 ps
T595 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/39.kmac_app.2441135007 Oct 03 11:12:35 AM UTC 24 Oct 03 11:17:40 AM UTC 24 10864695012 ps
T596 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/38.kmac_sideload.4083565640 Oct 03 11:11:04 AM UTC 24 Oct 03 11:17:48 AM UTC 24 4768727229 ps
T597 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/27.kmac_long_msg_and_output.1673275169 Oct 03 10:57:13 AM UTC 24 Oct 03 11:17:49 AM UTC 24 47057788815 ps
T598 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/41.kmac_entropy_refresh.2641897301 Oct 03 11:15:13 AM UTC 24 Oct 03 11:17:58 AM UTC 24 10793103679 ps
T599 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/43.kmac_app.1055581381 Oct 03 11:17:00 AM UTC 24 Oct 03 11:18:04 AM UTC 24 1044249615 ps
T600 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/31.kmac_stress_all.2460427068 Oct 03 11:03:30 AM UTC 24 Oct 03 11:18:04 AM UTC 24 11277556179 ps
T601 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/29.kmac_stress_all.499506952 Oct 03 11:00:16 AM UTC 24 Oct 03 11:18:36 AM UTC 24 30599780355 ps
T602 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/38.kmac_burst_write.1360765652 Oct 03 11:11:07 AM UTC 24 Oct 03 11:18:39 AM UTC 24 23211425745 ps
T603 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/44.kmac_smoke.1529033739 Oct 03 11:17:37 AM UTC 24 Oct 03 11:18:41 AM UTC 24 3678528303 ps
T604 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/44.kmac_key_error.4265835656 Oct 03 11:18:36 AM UTC 24 Oct 03 11:18:53 AM UTC 24 10318115037 ps
T67 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/44.kmac_lc_escalation.2535368886 Oct 03 11:18:40 AM UTC 24 Oct 03 11:18:55 AM UTC 24 1624624352 ps
T605 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/44.kmac_alert_test.2311701186 Oct 03 11:18:54 AM UTC 24 Oct 03 11:18:56 AM UTC 24 43065935 ps
T606 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/39.kmac_entropy_refresh.3759415536 Oct 03 11:12:37 AM UTC 24 Oct 03 11:19:12 AM UTC 24 30263165701 ps
T607 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/39.kmac_sideload.3742622001 Oct 03 11:12:32 AM UTC 24 Oct 03 11:19:26 AM UTC 24 4701892978 ps
T608 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/8.kmac_long_msg_and_output.3669655962 Oct 03 10:35:39 AM UTC 24 Oct 03 11:19:27 AM UTC 24 243013745050 ps
T609 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/30.kmac_stress_all.2479323979 Oct 03 11:01:52 AM UTC 24 Oct 03 11:19:33 AM UTC 24 25022117747 ps
T610 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/45.kmac_smoke.2778834332 Oct 03 11:18:56 AM UTC 24 Oct 03 11:19:35 AM UTC 24 661556653 ps
T611 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/45.kmac_entropy_refresh.3516330562 Oct 03 11:19:34 AM UTC 24 Oct 03 11:19:49 AM UTC 24 691734635 ps
T612 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/32.kmac_stress_all.2437342317 Oct 03 11:04:24 AM UTC 24 Oct 03 11:20:00 AM UTC 24 51508661794 ps
T613 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/44.kmac_entropy_refresh.3307996971 Oct 03 11:18:04 AM UTC 24 Oct 03 11:20:01 AM UTC 24 1701755401 ps
T614 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/45.kmac_key_error.3209047830 Oct 03 11:19:50 AM UTC 24 Oct 03 11:20:02 AM UTC 24 973892011 ps
T615 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/45.kmac_lc_escalation.3649074210 Oct 03 11:20:00 AM UTC 24 Oct 03 11:20:04 AM UTC 24 83035113 ps
T616 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/45.kmac_alert_test.606491123 Oct 03 11:20:02 AM UTC 24 Oct 03 11:20:05 AM UTC 24 26331781 ps
T617 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/46.kmac_smoke.2409709434 Oct 03 11:20:04 AM UTC 24 Oct 03 11:20:18 AM UTC 24 777614762 ps
T618 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/39.kmac_long_msg_and_output.1288412051 Oct 03 11:12:16 AM UTC 24 Oct 03 11:20:25 AM UTC 24 45625531515 ps
T619 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/45.kmac_app.1182697863 Oct 03 11:19:29 AM UTC 24 Oct 03 11:20:28 AM UTC 24 2338726877 ps
T620 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/44.kmac_sideload.4218165109 Oct 03 11:17:49 AM UTC 24 Oct 03 11:20:35 AM UTC 24 24931582124 ps
T621 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/43.kmac_entropy_refresh.1697978605 Oct 03 11:17:06 AM UTC 24 Oct 03 11:20:45 AM UTC 24 6010250638 ps
T622 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/43.kmac_burst_write.1398271467 Oct 03 11:16:59 AM UTC 24 Oct 03 11:20:54 AM UTC 24 2730693961 ps
T623 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/42.kmac_long_msg_and_output.1352909549 Oct 03 11:16:06 AM UTC 24 Oct 03 11:20:58 AM UTC 24 10731131642 ps
T624 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/46.kmac_key_error.4227981676 Oct 03 11:20:55 AM UTC 24 Oct 03 11:20:59 AM UTC 24 313377569 ps
T625 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/4.kmac_test_vectors_shake_128.985494411 Oct 03 10:31:43 AM UTC 24 Oct 03 11:21:00 AM UTC 24 244022381523 ps
T626 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/46.kmac_lc_escalation.92749536 Oct 03 11:20:58 AM UTC 24 Oct 03 11:21:02 AM UTC 24 176470927 ps
T627 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/46.kmac_alert_test.1811752941 Oct 03 11:21:01 AM UTC 24 Oct 03 11:21:03 AM UTC 24 22512544 ps
T628 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/45.kmac_stress_all.3163378123 Oct 03 11:20:02 AM UTC 24 Oct 03 11:21:09 AM UTC 24 8503966359 ps
T629 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/41.kmac_sideload.3108005057 Oct 03 11:14:39 AM UTC 24 Oct 03 11:21:26 AM UTC 24 17772895091 ps
T630 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/47.kmac_smoke.941690951 Oct 03 11:21:03 AM UTC 24 Oct 03 11:21:32 AM UTC 24 571712901 ps
T631 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/40.kmac_sideload.3691948482 Oct 03 11:13:17 AM UTC 24 Oct 03 11:21:36 AM UTC 24 97551597865 ps
T632 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/42.kmac_app.2996219493 Oct 03 11:16:20 AM UTC 24 Oct 03 11:21:39 AM UTC 24 11205075720 ps
T633 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/42.kmac_error.1130900590 Oct 03 11:16:26 AM UTC 24 Oct 03 11:21:40 AM UTC 24 22312194703 ps
T634 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/23.kmac_stress_all.862492291 Oct 03 10:53:47 AM UTC 24 Oct 03 11:21:44 AM UTC 24 84531675074 ps
T635 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/47.kmac_key_error.2575735092 Oct 03 11:21:41 AM UTC 24 Oct 03 11:21:47 AM UTC 24 1644451741 ps
T636 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/47.kmac_lc_escalation.2219381569 Oct 03 11:21:45 AM UTC 24 Oct 03 11:21:48 AM UTC 24 235569541 ps
T637 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/47.kmac_alert_test.2196512925 Oct 03 11:21:49 AM UTC 24 Oct 03 11:21:51 AM UTC 24 101799577 ps
T638 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/13.kmac_stress_all.620858708 Oct 03 10:41:32 AM UTC 24 Oct 03 11:22:04 AM UTC 24 47117538388 ps
T639 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/47.kmac_sideload.2191210068 Oct 03 11:21:10 AM UTC 24 Oct 03 11:22:11 AM UTC 24 7444742089 ps
T640 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/44.kmac_app.2303888885 Oct 03 11:17:59 AM UTC 24 Oct 03 11:22:16 AM UTC 24 22568965326 ps
T641 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/48.kmac_sideload.3135789736 Oct 03 11:22:12 AM UTC 24 Oct 03 11:22:33 AM UTC 24 181961232 ps
T642 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/48.kmac_smoke.1622206675 Oct 03 11:21:52 AM UTC 24 Oct 03 11:22:46 AM UTC 24 2282798491 ps
T643 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/46.kmac_entropy_refresh.2789864617 Oct 03 11:20:37 AM UTC 24 Oct 03 11:22:53 AM UTC 24 14617553820 ps
T644 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/45.kmac_error.3944794201 Oct 03 11:19:36 AM UTC 24 Oct 03 11:23:04 AM UTC 24 16192569550 ps
T645 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/48.kmac_key_error.3555476588 Oct 03 11:23:04 AM UTC 24 Oct 03 11:23:14 AM UTC 24 2637002450 ps
T646 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/3.kmac_test_vectors_shake_128.3555577499 Oct 03 10:30:39 AM UTC 24 Oct 03 11:23:19 AM UTC 24 157476586813 ps
T647 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/43.kmac_error.700314796 Oct 03 11:17:06 AM UTC 24 Oct 03 11:23:34 AM UTC 24 18666001335 ps
T648 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/48.kmac_alert_test.3095409935 Oct 03 11:23:36 AM UTC 24 Oct 03 11:23:39 AM UTC 24 47998267 ps
T649 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/48.kmac_app.2927859389 Oct 03 11:22:34 AM UTC 24 Oct 03 11:23:40 AM UTC 24 8518888571 ps
T650 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/48.kmac_lc_escalation.2460904335 Oct 03 11:23:15 AM UTC 24 Oct 03 11:23:43 AM UTC 24 856399283 ps
T651 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/45.kmac_sideload.925988305 Oct 03 11:19:13 AM UTC 24 Oct 03 11:23:45 AM UTC 24 3091302943 ps
T652 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/43.kmac_sideload.1245034344 Oct 03 11:16:58 AM UTC 24 Oct 03 11:24:04 AM UTC 24 13875812151 ps
T653 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/46.kmac_app.3312005213 Oct 03 11:20:29 AM UTC 24 Oct 03 11:24:29 AM UTC 24 7044638775 ps
T654 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/49.kmac_smoke.2796352833 Oct 03 11:23:40 AM UTC 24 Oct 03 11:24:29 AM UTC 24 3031886408 ps
T655 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/48.kmac_entropy_refresh.1130142690 Oct 03 11:22:47 AM UTC 24 Oct 03 11:24:35 AM UTC 24 7217599103 ps
T656 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/46.kmac_long_msg_and_output.2262720877 Oct 03 11:20:06 AM UTC 24 Oct 03 11:24:37 AM UTC 24 11291940609 ps
T657 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/42.kmac_burst_write.2748710591 Oct 03 11:16:18 AM UTC 24 Oct 03 11:24:38 AM UTC 24 24102478609 ps
T658 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/49.kmac_lc_escalation.2513271060 Oct 03 11:24:36 AM UTC 24 Oct 03 11:24:40 AM UTC 24 53150152 ps
T659 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/49.kmac_key_error.1760868090 Oct 03 11:24:30 AM UTC 24 Oct 03 11:24:41 AM UTC 24 944136564 ps
T660 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/49.kmac_alert_test.2387601181 Oct 03 11:24:39 AM UTC 24 Oct 03 11:24:41 AM UTC 24 14714656 ps
T661 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/46.kmac_error.3801795616 Oct 03 11:20:46 AM UTC 24 Oct 03 11:24:47 AM UTC 24 16476102389 ps
T662 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/41.kmac_stress_all.128860186 Oct 03 11:15:54 AM UTC 24 Oct 03 11:24:50 AM UTC 24 5942558462 ps
T663 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/41.kmac_burst_write.299796552 Oct 03 11:14:41 AM UTC 24 Oct 03 11:24:56 AM UTC 24 16616791888 ps
T664 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/36.kmac_stress_all.1234926056 Oct 03 11:09:59 AM UTC 24 Oct 03 11:24:57 AM UTC 24 304136194011 ps
T665 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/49.kmac_app.796683762 Oct 03 11:24:05 AM UTC 24 Oct 03 11:25:05 AM UTC 24 10746127552 ps
T666 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/47.kmac_entropy_refresh.3698759394 Oct 03 11:21:37 AM UTC 24 Oct 03 11:25:10 AM UTC 24 61148044615 ps
T667 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/24.kmac_long_msg_and_output.3294713380 Oct 03 10:53:49 AM UTC 24 Oct 03 11:25:31 AM UTC 24 69568808448 ps
T668 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/35.kmac_stress_all.1266182908 Oct 03 11:08:38 AM UTC 24 Oct 03 11:25:38 AM UTC 24 9748368622 ps
T669 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/46.kmac_sideload.1342598246 Oct 03 11:20:20 AM UTC 24 Oct 03 11:25:44 AM UTC 24 52180660808 ps
T670 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/22.kmac_long_msg_and_output.2575070328 Oct 03 10:51:10 AM UTC 24 Oct 03 11:25:46 AM UTC 24 49384827895 ps
T671 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/48.kmac_burst_write.3229062562 Oct 03 11:22:17 AM UTC 24 Oct 03 11:26:00 AM UTC 24 24420272898 ps
T672 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/16.kmac_stress_all.2560026095 Oct 03 10:45:08 AM UTC 24 Oct 03 11:26:20 AM UTC 24 341266266124 ps
T673 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/40.kmac_burst_write.142243456 Oct 03 11:13:45 AM UTC 24 Oct 03 11:26:26 AM UTC 24 48690279825 ps
T674 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/49.kmac_sideload.1771766558 Oct 03 11:23:44 AM UTC 24 Oct 03 11:26:35 AM UTC 24 12861571172 ps
T675 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/10.kmac_long_msg_and_output.3041218055 Oct 03 10:38:34 AM UTC 24 Oct 03 11:26:48 AM UTC 24 138062674803 ps
T676 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/48.kmac_error.1769183440 Oct 03 11:22:53 AM UTC 24 Oct 03 11:26:58 AM UTC 24 3236632401 ps
T677 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/11.kmac_long_msg_and_output.3409055733 Oct 03 10:39:06 AM UTC 24 Oct 03 11:27:00 AM UTC 24 138213062778 ps
T678 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/49.kmac_error.4195366582 Oct 03 11:24:29 AM UTC 24 Oct 03 11:27:01 AM UTC 24 20539497269 ps
T679 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/26.kmac_long_msg_and_output.1682487105 Oct 03 10:56:13 AM UTC 24 Oct 03 11:27:01 AM UTC 24 74694919050 ps
T680 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/49.kmac_entropy_refresh.2521696061 Oct 03 11:24:20 AM UTC 24 Oct 03 11:27:52 AM UTC 24 20267086303 ps
T681 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/47.kmac_app.1945698387 Oct 03 11:21:33 AM UTC 24 Oct 03 11:28:19 AM UTC 24 64927631168 ps
T682 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/47.kmac_error.3697101031 Oct 03 11:21:40 AM UTC 24 Oct 03 11:28:24 AM UTC 24 46095749744 ps
T683 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/44.kmac_burst_write.1987884651 Oct 03 11:17:50 AM UTC 24 Oct 03 11:28:28 AM UTC 24 15790730701 ps
T684 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/26.kmac_stress_all.635055067 Oct 03 10:57:12 AM UTC 24 Oct 03 11:29:52 AM UTC 24 94678650165 ps
T685 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/47.kmac_burst_write.3769942915 Oct 03 11:21:27 AM UTC 24 Oct 03 11:30:59 AM UTC 24 61813312645 ps
T686 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/14.kmac_stress_all.2148123835 Oct 03 10:42:49 AM UTC 24 Oct 03 11:31:09 AM UTC 24 143695864279 ps
T687 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/49.kmac_burst_write.627588365 Oct 03 11:23:46 AM UTC 24 Oct 03 11:32:31 AM UTC 24 28803916090 ps
T688 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/46.kmac_burst_write.1762008862 Oct 03 11:20:26 AM UTC 24 Oct 03 11:32:40 AM UTC 24 297510437967 ps
T689 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/43.kmac_stress_all.948334059 Oct 03 11:17:30 AM UTC 24 Oct 03 11:32:44 AM UTC 24 30026335830 ps
T690 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/49.kmac_long_msg_and_output.3916327398 Oct 03 11:23:41 AM UTC 24 Oct 03 11:33:54 AM UTC 24 26282501641 ps
T691 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/44.kmac_stress_all.3150376734 Oct 03 11:18:42 AM UTC 24 Oct 03 11:35:10 AM UTC 24 15545393512 ps
T692 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/19.kmac_long_msg_and_output.263433017 Oct 03 10:47:27 AM UTC 24 Oct 03 11:35:23 AM UTC 24 446916366130 ps
T693 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/38.kmac_long_msg_and_output.4103436570 Oct 03 11:10:59 AM UTC 24 Oct 03 11:35:55 AM UTC 24 106282360890 ps
T694 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/40.kmac_long_msg_and_output.853305790 Oct 03 11:13:17 AM UTC 24 Oct 03 11:36:15 AM UTC 24 24586379738 ps
T695 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/30.kmac_long_msg_and_output.1047349266 Oct 03 11:00:31 AM UTC 24 Oct 03 11:36:52 AM UTC 24 19300874719 ps
T696 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/45.kmac_burst_write.2659998587 Oct 03 11:19:26 AM UTC 24 Oct 03 11:37:24 AM UTC 24 56216389570 ps
T697 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/47.kmac_stress_all.1924221873 Oct 03 11:21:48 AM UTC 24 Oct 03 11:37:42 AM UTC 24 66088624886 ps
T698 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/40.kmac_stress_all.1205689976 Oct 03 11:14:29 AM UTC 24 Oct 03 11:38:23 AM UTC 24 56231520718 ps
T699 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/41.kmac_long_msg_and_output.3084986359 Oct 03 11:14:36 AM UTC 24 Oct 03 11:38:42 AM UTC 24 179102459631 ps
T700 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/39.kmac_stress_all.2369620414 Oct 03 11:12:58 AM UTC 24 Oct 03 11:38:55 AM UTC 24 440788563525 ps
T701 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/46.kmac_stress_all.1716052224 Oct 03 11:21:00 AM UTC 24 Oct 03 11:40:42 AM UTC 24 62251739852 ps
T702 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/34.kmac_long_msg_and_output.3970262555 Oct 03 11:06:04 AM UTC 24 Oct 03 11:43:38 AM UTC 24 92188464920 ps
T703 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/29.kmac_long_msg_and_output.1742153708 Oct 03 10:59:17 AM UTC 24 Oct 03 11:45:07 AM UTC 24 109779881352 ps
T704 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/25.kmac_long_msg_and_output.4048903988 Oct 03 10:55:19 AM UTC 24 Oct 03 11:45:31 AM UTC 24 288538204111 ps
T705 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/17.kmac_long_msg_and_output.4065856252 Oct 03 10:45:11 AM UTC 24 Oct 03 11:45:46 AM UTC 24 167193861710 ps
T706 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/18.kmac_long_msg_and_output.1234268549 Oct 03 10:46:13 AM UTC 24 Oct 03 11:48:26 AM UTC 24 414244951819 ps
T707 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/49.kmac_stress_all.2968267045 Oct 03 11:24:37 AM UTC 24 Oct 03 11:48:28 AM UTC 24 237305892784 ps
T708 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/43.kmac_long_msg_and_output.2635253031 Oct 03 11:16:57 AM UTC 24 Oct 03 11:48:33 AM UTC 24 74564641321 ps
T709 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/6.kmac_long_msg_and_output.3369205810 Oct 03 10:33:30 AM UTC 24 Oct 03 11:48:42 AM UTC 24 497533305284 ps
T710 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/38.kmac_stress_all.291431858 Oct 03 11:11:46 AM UTC 24 Oct 03 11:50:11 AM UTC 24 89112953989 ps
T711 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/20.kmac_long_msg_and_output.2861658409 Oct 03 10:48:48 AM UTC 24 Oct 03 11:51:01 AM UTC 24 326744771175 ps
T712 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/23.kmac_long_msg_and_output.895123671 Oct 03 10:52:27 AM UTC 24 Oct 03 11:51:42 AM UTC 24 302333506704 ps
T713 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/45.kmac_long_msg_and_output.2134122480 Oct 03 11:18:57 AM UTC 24 Oct 03 12:02:19 PM UTC 24 296640626307 ps
T714 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/36.kmac_long_msg_and_output.2694245601 Oct 03 11:08:48 AM UTC 24 Oct 03 12:05:06 PM UTC 24 77090733007 ps
T715 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/37.kmac_long_msg_and_output.4095488727 Oct 03 11:10:04 AM UTC 24 Oct 03 12:05:07 PM UTC 24 102887508548 ps
T716 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/32.kmac_long_msg_and_output.1293513072 Oct 03 11:03:51 AM UTC 24 Oct 03 12:05:15 PM UTC 24 211607167329 ps
T717 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/48.kmac_stress_all.2581536542 Oct 03 11:23:20 AM UTC 24 Oct 03 12:07:10 PM UTC 24 112453064496 ps
T718 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/47.kmac_long_msg_and_output.3847813395 Oct 03 11:21:04 AM UTC 24 Oct 03 12:29:25 PM UTC 24 179071649837 ps
T719 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/48.kmac_long_msg_and_output.81165569 Oct 03 11:22:05 AM UTC 24 Oct 03 12:41:33 PM UTC 24 503648902445 ps
T720 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/default/44.kmac_long_msg_and_output.2830552737 Oct 03 11:17:42 AM UTC 24 Oct 03 12:55:28 PM UTC 24 1287447878855 ps
T721 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/cover_reg_top/0.kmac_mem_walk.605830149 Oct 03 10:28:46 AM UTC 24 Oct 03 10:28:48 AM UTC 24 31504527 ps
T125 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/cover_reg_top/0.kmac_intr_test.1537395389 Oct 03 10:28:47 AM UTC 24 Oct 03 10:28:48 AM UTC 24 42343515 ps
T103 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/cover_reg_top/0.kmac_shadow_reg_errors.2370238226 Oct 03 10:28:46 AM UTC 24 Oct 03 10:28:49 AM UTC 24 32228049 ps
T722 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/cover_reg_top/0.kmac_mem_partial_access.3835741052 Oct 03 10:28:46 AM UTC 24 Oct 03 10:28:49 AM UTC 24 27655465 ps
T104 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/cover_reg_top/0.kmac_shadow_reg_errors_with_csr_rw.3582767644 Oct 03 10:28:46 AM UTC 24 Oct 03 10:28:51 AM UTC 24 402455950 ps
T129 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/cover_reg_top/0.kmac_tl_errors.3384990644 Oct 03 10:28:46 AM UTC 24 Oct 03 10:28:51 AM UTC 24 509064791 ps
T126 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/cover_reg_top/0.kmac_csr_hw_reset.1789677474 Oct 03 10:28:50 AM UTC 24 Oct 03 10:28:51 AM UTC 24 49940039 ps
T723 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/cover_reg_top/1.kmac_mem_walk.1717106717 Oct 03 10:28:50 AM UTC 24 Oct 03 10:28:52 AM UTC 24 10989543 ps
T127 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/cover_reg_top/7.kmac_intr_test.3950060139 Oct 03 10:28:58 AM UTC 24 Oct 03 10:29:00 AM UTC 24 26378328 ps
T146 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/cover_reg_top/0.kmac_csr_rw.2537343736 Oct 03 10:28:50 AM UTC 24 Oct 03 10:28:52 AM UTC 24 449126530 ps
T121 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/cover_reg_top/0.kmac_tl_intg_err.593133514 Oct 03 10:28:46 AM UTC 24 Oct 03 10:28:52 AM UTC 24 201550587 ps
T166 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/cover_reg_top/1.kmac_intr_test.3192602900 Oct 03 10:28:50 AM UTC 24 Oct 03 10:28:52 AM UTC 24 19433797 ps
T147 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/cover_reg_top/1.kmac_csr_rw.2943609740 Oct 03 10:28:50 AM UTC 24 Oct 03 10:28:52 AM UTC 24 99594791 ps
T724 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/cover_reg_top/1.kmac_mem_partial_access.2548415623 Oct 03 10:28:50 AM UTC 24 Oct 03 10:28:52 AM UTC 24 30312161 ps
T106 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/cover_reg_top/7.kmac_shadow_reg_errors.1382765964 Oct 03 10:28:58 AM UTC 24 Oct 03 10:29:00 AM UTC 24 53812001 ps
T148 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/cover_reg_top/1.kmac_csr_hw_reset.2200724769 Oct 03 10:28:50 AM UTC 24 Oct 03 10:28:52 AM UTC 24 177018000 ps
T105 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/cover_reg_top/1.kmac_shadow_reg_errors.1725763716 Oct 03 10:28:50 AM UTC 24 Oct 03 10:28:52 AM UTC 24 219503238 ps
T169 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/cover_reg_top/2.kmac_intr_test.570727994 Oct 03 10:28:50 AM UTC 24 Oct 03 10:28:52 AM UTC 24 45044326 ps
T725 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/cover_reg_top/2.kmac_mem_walk.2478884142 Oct 03 10:28:50 AM UTC 24 Oct 03 10:28:52 AM UTC 24 21692244 ps
T115 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/cover_reg_top/2.kmac_shadow_reg_errors.4013810699 Oct 03 10:28:50 AM UTC 24 Oct 03 10:28:52 AM UTC 24 77838170 ps
T116 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/cover_reg_top/1.kmac_shadow_reg_errors_with_csr_rw.2296262534 Oct 03 10:28:50 AM UTC 24 Oct 03 10:28:52 AM UTC 24 36427847 ps
T726 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/cover_reg_top/2.kmac_csr_hw_reset.756915369 Oct 03 10:28:51 AM UTC 24 Oct 03 10:28:53 AM UTC 24 82610038 ps
T727 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/cover_reg_top/0.kmac_same_csr_outstanding.2062413927 Oct 03 10:28:50 AM UTC 24 Oct 03 10:28:53 AM UTC 24 138717072 ps
T728 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/cover_reg_top/1.kmac_same_csr_outstanding.1346289850 Oct 03 10:28:50 AM UTC 24 Oct 03 10:28:53 AM UTC 24 27196045 ps
T729 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/cover_reg_top/2.kmac_csr_rw.1392300669 Oct 03 10:28:51 AM UTC 24 Oct 03 10:28:53 AM UTC 24 27094780 ps
T134 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/cover_reg_top/2.kmac_mem_partial_access.1514723331 Oct 03 10:28:50 AM UTC 24 Oct 03 10:28:53 AM UTC 24 53361540 ps
T149 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/cover_reg_top/2.kmac_shadow_reg_errors_with_csr_rw.238295381 Oct 03 10:28:50 AM UTC 24 Oct 03 10:28:53 AM UTC 24 119329108 ps
T130 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/cover_reg_top/0.kmac_csr_mem_rw_with_rand_reset.4275872323 Oct 03 10:28:50 AM UTC 24 Oct 03 10:28:53 AM UTC 24 35729000 ps
T122 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/cover_reg_top/1.kmac_tl_intg_err.1530730998 Oct 03 10:28:50 AM UTC 24 Oct 03 10:28:53 AM UTC 24 199716596 ps
T131 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/cover_reg_top/1.kmac_csr_mem_rw_with_rand_reset.3326534357 Oct 03 10:28:50 AM UTC 24 Oct 03 10:28:54 AM UTC 24 71038053 ps
T132 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/cover_reg_top/2.kmac_tl_errors.1311313195 Oct 03 10:28:50 AM UTC 24 Oct 03 10:28:54 AM UTC 24 95768035 ps
T133 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/cover_reg_top/1.kmac_tl_errors.153345272 Oct 03 10:28:50 AM UTC 24 Oct 03 10:28:54 AM UTC 24 625287506 ps
T730 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/cover_reg_top/3.kmac_mem_walk.4238234908 Oct 03 10:28:53 AM UTC 24 Oct 03 10:28:55 AM UTC 24 65006130 ps
T107 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/cover_reg_top/3.kmac_shadow_reg_errors.67140605 Oct 03 10:28:53 AM UTC 24 Oct 03 10:28:55 AM UTC 24 110914813 ps
T731 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/cover_reg_top/3.kmac_csr_hw_reset.2640341824 Oct 03 10:28:53 AM UTC 24 Oct 03 10:28:55 AM UTC 24 29287116 ps
T167 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/cover_reg_top/3.kmac_intr_test.2483593072 Oct 03 10:28:53 AM UTC 24 Oct 03 10:28:55 AM UTC 24 16203537 ps
T732 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/cover_reg_top/2.kmac_same_csr_outstanding.2347406174 Oct 03 10:28:53 AM UTC 24 Oct 03 10:28:55 AM UTC 24 51148133 ps
T135 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/cover_reg_top/3.kmac_mem_partial_access.989000583 Oct 03 10:28:53 AM UTC 24 Oct 03 10:28:55 AM UTC 24 36629439 ps
T150 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/cover_reg_top/3.kmac_csr_rw.3067408975 Oct 03 10:28:53 AM UTC 24 Oct 03 10:28:55 AM UTC 24 110489171 ps
T733 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/cover_reg_top/3.kmac_same_csr_outstanding.4030317432 Oct 03 10:28:53 AM UTC 24 Oct 03 10:28:56 AM UTC 24 44712190 ps
T123 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/cover_reg_top/2.kmac_tl_intg_err.3601401469 Oct 03 10:28:50 AM UTC 24 Oct 03 10:28:56 AM UTC 24 229226728 ps
T734 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/cover_reg_top/4.kmac_mem_walk.1114347826 Oct 03 10:28:54 AM UTC 24 Oct 03 10:28:56 AM UTC 24 31772370 ps
T735 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/cover_reg_top/4.kmac_shadow_reg_errors.679756722 Oct 03 10:28:54 AM UTC 24 Oct 03 10:28:56 AM UTC 24 66986023 ps
T736 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/cover_reg_top/2.kmac_csr_mem_rw_with_rand_reset.2345128188 Oct 03 10:28:53 AM UTC 24 Oct 03 10:28:56 AM UTC 24 398024742 ps
T110 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/cover_reg_top/3.kmac_shadow_reg_errors_with_csr_rw.4214354824 Oct 03 10:28:53 AM UTC 24 Oct 03 10:28:56 AM UTC 24 345813858 ps
T174 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/cover_reg_top/3.kmac_tl_intg_err.2996265211 Oct 03 10:28:53 AM UTC 24 Oct 03 10:28:56 AM UTC 24 250817117 ps
T168 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/cover_reg_top/4.kmac_intr_test.384060199 Oct 03 10:28:55 AM UTC 24 Oct 03 10:28:56 AM UTC 24 28602300 ps
T737 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/cover_reg_top/4.kmac_csr_hw_reset.3820682345 Oct 03 10:28:55 AM UTC 24 Oct 03 10:28:57 AM UTC 24 46376606 ps
T738 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/cover_reg_top/4.kmac_csr_rw.2296546851 Oct 03 10:28:55 AM UTC 24 Oct 03 10:28:57 AM UTC 24 54826824 ps
T739 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/cover_reg_top/5.kmac_shadow_reg_errors.3741256416 Oct 03 10:28:55 AM UTC 24 Oct 03 10:28:57 AM UTC 24 69084776 ps
T151 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/cover_reg_top/3.kmac_csr_mem_rw_with_rand_reset.2343290162 Oct 03 10:28:54 AM UTC 24 Oct 03 10:28:57 AM UTC 24 171102196 ps
T740 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/cover_reg_top/3.kmac_tl_errors.4132040616 Oct 03 10:28:53 AM UTC 24 Oct 03 10:28:57 AM UTC 24 1679876604 ps
T741 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/cover_reg_top/4.kmac_tl_errors.3786566655 Oct 03 10:28:54 AM UTC 24 Oct 03 10:28:57 AM UTC 24 104518732 ps
T136 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/cover_reg_top/4.kmac_mem_partial_access.318606930 Oct 03 10:28:54 AM UTC 24 Oct 03 10:28:57 AM UTC 24 133089207 ps
T742 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/cover_reg_top/4.kmac_shadow_reg_errors_with_csr_rw.1093673052 Oct 03 10:28:54 AM UTC 24 Oct 03 10:28:57 AM UTC 24 347473776 ps
T743 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/cover_reg_top/4.kmac_csr_aliasing.1958700251 Oct 03 10:28:55 AM UTC 24 Oct 03 10:29:00 AM UTC 24 96508238 ps
T172 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/cover_reg_top/4.kmac_tl_intg_err.2897570843 Oct 03 10:28:54 AM UTC 24 Oct 03 10:28:58 AM UTC 24 109434735 ps
T170 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/cover_reg_top/5.kmac_intr_test.2024006029 Oct 03 10:28:56 AM UTC 24 Oct 03 10:28:58 AM UTC 24 19945621 ps
T152 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/cover_reg_top/4.kmac_same_csr_outstanding.685090470 Oct 03 10:28:55 AM UTC 24 Oct 03 10:28:58 AM UTC 24 411540799 ps
T744 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/cover_reg_top/1.kmac_csr_bit_bash.4001161569 Oct 03 10:28:50 AM UTC 24 Oct 03 10:28:58 AM UTC 24 160431740 ps
T153 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/cover_reg_top/2.kmac_csr_aliasing.3119725221 Oct 03 10:28:52 AM UTC 24 Oct 03 10:28:58 AM UTC 24 499479629 ps
T154 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/cover_reg_top/5.kmac_csr_rw.1091502353 Oct 03 10:28:56 AM UTC 24 Oct 03 10:28:58 AM UTC 24 127093712 ps
T155 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/cover_reg_top/4.kmac_csr_mem_rw_with_rand_reset.3825719438 Oct 03 10:28:55 AM UTC 24 Oct 03 10:28:59 AM UTC 24 159161129 ps
T745 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/cover_reg_top/5.kmac_shadow_reg_errors_with_csr_rw.2851522519 Oct 03 10:28:56 AM UTC 24 Oct 03 10:28:59 AM UTC 24 60077687 ps
T108 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/cover_reg_top/6.kmac_shadow_reg_errors.1846487897 Oct 03 10:28:56 AM UTC 24 Oct 03 10:28:59 AM UTC 24 172125877 ps
T746 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/cover_reg_top/5.kmac_same_csr_outstanding.1194691393 Oct 03 10:28:56 AM UTC 24 Oct 03 10:28:59 AM UTC 24 219095312 ps
T747 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/cover_reg_top/5.kmac_csr_mem_rw_with_rand_reset.1267516998 Oct 03 10:28:56 AM UTC 24 Oct 03 10:28:59 AM UTC 24 51013402 ps
T748 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/cover_reg_top/1.kmac_csr_aliasing.4069916571 Oct 03 10:28:50 AM UTC 24 Oct 03 10:28:59 AM UTC 24 285354555 ps
T749 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/cover_reg_top/6.kmac_intr_test.622408924 Oct 03 10:28:57 AM UTC 24 Oct 03 10:29:00 AM UTC 24 31210654 ps
T750 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/cover_reg_top/3.kmac_csr_aliasing.907999708 Oct 03 10:28:53 AM UTC 24 Oct 03 10:28:59 AM UTC 24 203113944 ps
T751 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/cover_reg_top/5.kmac_tl_errors.4029548153 Oct 03 10:28:56 AM UTC 24 Oct 03 10:29:00 AM UTC 24 161358480 ps
T752 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/cover_reg_top/6.kmac_csr_rw.467985795 Oct 03 10:28:57 AM UTC 24 Oct 03 10:29:00 AM UTC 24 111248258 ps
T753 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/cover_reg_top/8.kmac_csr_rw.2449916741 Oct 03 10:28:59 AM UTC 24 Oct 03 10:29:01 AM UTC 24 71846244 ps
T754 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/cover_reg_top/0.kmac_csr_aliasing.1583333892 Oct 03 10:28:50 AM UTC 24 Oct 03 10:29:00 AM UTC 24 1063344853 ps
T120 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/cover_reg_top/7.kmac_shadow_reg_errors_with_csr_rw.1498933899 Oct 03 10:28:58 AM UTC 24 Oct 03 10:29:01 AM UTC 24 196208878 ps
T173 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/cover_reg_top/5.kmac_tl_intg_err.343670318 Oct 03 10:28:56 AM UTC 24 Oct 03 10:29:01 AM UTC 24 520557239 ps
T755 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/cover_reg_top/8.kmac_intr_test.1973495748 Oct 03 10:28:59 AM UTC 24 Oct 03 10:29:01 AM UTC 24 45763002 ps
T756 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/cover_reg_top/7.kmac_tl_errors.534598079 Oct 03 10:28:58 AM UTC 24 Oct 03 10:29:01 AM UTC 24 301026154 ps
T109 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/cover_reg_top/8.kmac_shadow_reg_errors.1494091252 Oct 03 10:28:59 AM UTC 24 Oct 03 10:29:01 AM UTC 24 30542114 ps
T757 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/cover_reg_top/7.kmac_same_csr_outstanding.3787483130 Oct 03 10:28:59 AM UTC 24 Oct 03 10:29:01 AM UTC 24 181036580 ps
T758 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/cover_reg_top/7.kmac_csr_rw.3676662032 Oct 03 10:28:59 AM UTC 24 Oct 03 10:29:01 AM UTC 24 127602470 ps
T759 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/cover_reg_top/6.kmac_same_csr_outstanding.1434891806 Oct 03 10:28:58 AM UTC 24 Oct 03 10:29:01 AM UTC 24 372820478 ps
T760 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/cover_reg_top/9.kmac_intr_test.2371211610 Oct 03 10:29:00 AM UTC 24 Oct 03 10:29:02 AM UTC 24 174036728 ps
T761 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/cover_reg_top/6.kmac_csr_mem_rw_with_rand_reset.2229656142 Oct 03 10:28:58 AM UTC 24 Oct 03 10:29:01 AM UTC 24 271939005 ps
T111 /workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/coverage/cover_reg_top/6.kmac_shadow_reg_errors_with_csr_rw.649332448 Oct 03 10:28:57 AM UTC 24 Oct 03 10:29:02 AM UTC 24 200311769 ps
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