Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspaces/repo/scratch/os_regression_2024_10_11/kmac_unmasked-sim-vcs/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	0	14	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	0	14	100.00	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	0	14	100.00

User Defined Bins for output_digest_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	648	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	5297	1			T80	1		T23	2		T96	3
len_601_800	12052	1			T14	1		T18	2		T80	7
len_401_600	7974	1			T14	2		T80	6		T23	8
len_201_400	4331	1			T80	2		T23	1		T24	2
len_65_200	7284	1			T14	1		T64	50		T65	89
len_min_for_xof_require_squeeze	78	1			T36	1		T184	9		T52	1
len_keccak_block_sizes[72]	88	1			T65	2		T83	2		T33	1
len_keccak_block_sizes[104]	76	1			T83	1		T23	1		T185	1
len_keccak_block_sizes[136]	73	1			T83	1		T185	1		T119	1
len_keccak_block_sizes[144]	44	1			T65	1		T87	1		T186	5
len_keccak_block_sizes[168]	43	1			T65	1		T83	1		T185	1
len_datapath_width	1011	1			T64	4		T65	9		T81	3
len_2_63	15365	1			T1	6		T2	3		T3	3
len_1	43	1			T65	1		T83	1		T187	1