Group : kmac_env_pkg::kmac_env_cov::state_read_mask_cg
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Summary for Group kmac_env_pkg::kmac_env_cov::state_read_mask_cg

CATEGORY   EXPECTED   UNCOVERED   COVERED   PERCENT   
Variables 6 0 6 100.00
Crosses 8 3 5 62.50


Variables for Group kmac_env_pkg::kmac_env_cov::state_read_mask_cg
VARIABLE   EXPECTED   UNCOVERED   COVERED   PERCENT   GOAL   WEIGHT   AT LEAST   AUTO BIN MAX   COMMENT   
share 2 0 2 100.00 100 1 1 2
state_read_mask 4 0 4 100.00 100 1 1 0


Crosses for Group kmac_env_pkg::kmac_env_cov::state_read_mask_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
state_mask_share_cross 8 3 5 62.50 100 1 1 0


Summary for Variable share

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for share

Bins
NAME   COUNT   AT LEAST   STATUS   TEST   COUNT   TEST   COUNT   TEST   COUNT   
auto[0] 6216444 1 T1 228 T2 24 T3 24
auto[1] 9517085 1 T1 228 T2 150 T3 150



Summary for Variable state_read_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 4 0 4 100.00


User Defined Bins for state_read_mask

Bins
NAME   COUNT   AT LEAST   STATUS   TEST   COUNT   TEST   COUNT   TEST   COUNT   
word_access 15701666 1 T1 456 T2 174 T3 174
triple_byte_access 10642 1 T14 2 T18 1 T64 30
halfword_access 10495 1 T64 17 T65 39 T80 4
byte_access 10726 1 T14 1 T18 1 T64 20



Summary for Cross state_mask_share_cross

Samples crossed: share state_read_mask
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 8 3 5 62.50 3


Automatically Generated Cross Bins for state_mask_share_cross

Uncovered bins
sharestate_read_maskCOUNTAT LEASTNUMBERSTATUS
[auto[1]] [triple_byte_access , halfword_access , byte_access] -- -- 3


Covered bins
share   state_read_mask   COUNT   AT LEAST   STATUS   TEST   COUNT   TEST   COUNT   TEST   COUNT   
auto[0] word_access 6184581 1 T1 228 T2 24 T3 24
auto[0] triple_byte_access 10642 1 T14 2 T18 1 T64 30
auto[0] halfword_access 10495 1 T64 17 T65 39 T80 4
auto[0] byte_access 10726 1 T14 1 T18 1 T64 20
auto[1] word_access 9517085 1 T1 228 T2 150 T3 150