T1579 |
/workspace/coverage/default/4.lc_ctrl_security_escalation.2768180380 |
|
|
Mar 07 01:28:49 PM PST 24 |
Mar 07 01:28:57 PM PST 24 |
1442764589 ps |
T1580 |
/workspace/coverage/default/25.lc_ctrl_state_failure.1268892609 |
|
|
Mar 07 01:31:02 PM PST 24 |
Mar 07 01:31:30 PM PST 24 |
981611231 ps |
T1581 |
/workspace/coverage/default/13.lc_ctrl_sec_token_digest.449565724 |
|
|
Mar 07 01:30:01 PM PST 24 |
Mar 07 01:30:11 PM PST 24 |
1172577202 ps |
T1582 |
/workspace/coverage/default/9.lc_ctrl_prog_failure.1065183645 |
|
|
Mar 07 01:55:21 PM PST 24 |
Mar 07 01:55:24 PM PST 24 |
47514478 ps |
T1583 |
/workspace/coverage/default/10.lc_ctrl_state_failure.2979482387 |
|
|
Mar 07 01:55:21 PM PST 24 |
Mar 07 01:55:37 PM PST 24 |
183100264 ps |
T1584 |
/workspace/coverage/default/7.lc_ctrl_jtag_access.4001394209 |
|
|
Mar 07 01:54:59 PM PST 24 |
Mar 07 01:55:01 PM PST 24 |
165155107 ps |
T1585 |
/workspace/coverage/default/22.lc_ctrl_sec_token_mux.3587821059 |
|
|
Mar 07 01:56:38 PM PST 24 |
Mar 07 01:56:52 PM PST 24 |
605912903 ps |
T1586 |
/workspace/coverage/default/1.lc_ctrl_jtag_prog_failure.2668941403 |
|
|
Mar 07 01:28:14 PM PST 24 |
Mar 07 01:28:18 PM PST 24 |
334142292 ps |
T1587 |
/workspace/coverage/default/38.lc_ctrl_volatile_unlock_smoke.597719003 |
|
|
Mar 07 01:57:46 PM PST 24 |
Mar 07 01:57:47 PM PST 24 |
12622496 ps |
T1588 |
/workspace/coverage/default/49.lc_ctrl_jtag_access.1385917689 |
|
|
Mar 07 01:58:39 PM PST 24 |
Mar 07 01:58:59 PM PST 24 |
3905397049 ps |
T1589 |
/workspace/coverage/default/1.lc_ctrl_prog_failure.2376498070 |
|
|
Mar 07 01:53:42 PM PST 24 |
Mar 07 01:53:46 PM PST 24 |
67741381 ps |
T1590 |
/workspace/coverage/default/46.lc_ctrl_state_post_trans.2182236730 |
|
|
Mar 07 01:58:34 PM PST 24 |
Mar 07 01:58:43 PM PST 24 |
69805295 ps |
T1591 |
/workspace/coverage/default/48.lc_ctrl_security_escalation.76435324 |
|
|
Mar 07 01:58:40 PM PST 24 |
Mar 07 01:58:50 PM PST 24 |
222159686 ps |
T1592 |
/workspace/coverage/default/44.lc_ctrl_stress_all.4105005264 |
|
|
Mar 07 01:58:18 PM PST 24 |
Mar 07 02:05:37 PM PST 24 |
87255011288 ps |
T1593 |
/workspace/coverage/default/40.lc_ctrl_state_failure.3858130507 |
|
|
Mar 07 01:57:53 PM PST 24 |
Mar 07 01:58:13 PM PST 24 |
864506664 ps |
T1594 |
/workspace/coverage/default/43.lc_ctrl_smoke.1269495156 |
|
|
Mar 07 01:32:07 PM PST 24 |
Mar 07 01:32:14 PM PST 24 |
229254523 ps |
T1595 |
/workspace/coverage/default/45.lc_ctrl_sec_token_digest.1287179926 |
|
|
Mar 07 01:32:15 PM PST 24 |
Mar 07 01:32:29 PM PST 24 |
369143315 ps |
T1596 |
/workspace/coverage/default/6.lc_ctrl_jtag_access.3317776540 |
|
|
Mar 07 01:29:12 PM PST 24 |
Mar 07 01:29:17 PM PST 24 |
368735361 ps |
T1597 |
/workspace/coverage/default/4.lc_ctrl_sec_mubi.717773167 |
|
|
Mar 07 01:29:03 PM PST 24 |
Mar 07 01:29:14 PM PST 24 |
1092073293 ps |
T1598 |
/workspace/coverage/default/10.lc_ctrl_state_post_trans.861209832 |
|
|
Mar 07 01:55:20 PM PST 24 |
Mar 07 01:55:24 PM PST 24 |
70645216 ps |
T1599 |
/workspace/coverage/default/46.lc_ctrl_jtag_access.4290256393 |
|
|
Mar 07 01:32:22 PM PST 24 |
Mar 07 01:32:24 PM PST 24 |
102131127 ps |
T1600 |
/workspace/coverage/default/44.lc_ctrl_stress_all.933082875 |
|
|
Mar 07 01:32:12 PM PST 24 |
Mar 07 01:34:28 PM PST 24 |
16779118218 ps |
T1601 |
/workspace/coverage/default/38.lc_ctrl_security_escalation.26583424 |
|
|
Mar 07 01:31:44 PM PST 24 |
Mar 07 01:31:52 PM PST 24 |
1108034909 ps |
T1602 |
/workspace/coverage/default/26.lc_ctrl_security_escalation.3093393197 |
|
|
Mar 07 01:56:53 PM PST 24 |
Mar 07 01:57:05 PM PST 24 |
1064846244 ps |
T1603 |
/workspace/coverage/default/41.lc_ctrl_state_post_trans.2496270392 |
|
|
Mar 07 01:58:10 PM PST 24 |
Mar 07 01:58:13 PM PST 24 |
48675206 ps |
T1604 |
/workspace/coverage/default/12.lc_ctrl_alert_test.1932713615 |
|
|
Mar 07 01:55:44 PM PST 24 |
Mar 07 01:55:45 PM PST 24 |
22462737 ps |
T1605 |
/workspace/coverage/default/22.lc_ctrl_sec_token_digest.3332661129 |
|
|
Mar 07 01:30:48 PM PST 24 |
Mar 07 01:31:03 PM PST 24 |
739430123 ps |
T1606 |
/workspace/coverage/default/15.lc_ctrl_smoke.2236363884 |
|
|
Mar 07 01:55:51 PM PST 24 |
Mar 07 01:55:53 PM PST 24 |
43041964 ps |
T1607 |
/workspace/coverage/default/3.lc_ctrl_stress_all.1150511168 |
|
|
Mar 07 01:54:21 PM PST 24 |
Mar 07 01:54:48 PM PST 24 |
3433129800 ps |
T1608 |
/workspace/coverage/default/1.lc_ctrl_prog_failure.2623277608 |
|
|
Mar 07 01:28:12 PM PST 24 |
Mar 07 01:28:15 PM PST 24 |
59058769 ps |
T1609 |
/workspace/coverage/default/35.lc_ctrl_sec_token_mux.2527570521 |
|
|
Mar 07 01:57:37 PM PST 24 |
Mar 07 01:57:46 PM PST 24 |
276474355 ps |
T1610 |
/workspace/coverage/default/8.lc_ctrl_jtag_state_post_trans.302434905 |
|
|
Mar 07 01:29:29 PM PST 24 |
Mar 07 01:29:51 PM PST 24 |
1818185056 ps |
T1611 |
/workspace/coverage/default/9.lc_ctrl_alert_test.3309000846 |
|
|
Mar 07 01:29:38 PM PST 24 |
Mar 07 01:29:39 PM PST 24 |
86694340 ps |
T1612 |
/workspace/coverage/default/13.lc_ctrl_alert_test.3666573463 |
|
|
Mar 07 01:55:41 PM PST 24 |
Mar 07 01:55:42 PM PST 24 |
14859572 ps |
T1613 |
/workspace/coverage/default/27.lc_ctrl_errors.131432298 |
|
|
Mar 07 01:31:16 PM PST 24 |
Mar 07 01:31:25 PM PST 24 |
255674381 ps |
T1614 |
/workspace/coverage/default/46.lc_ctrl_stress_all.4158367398 |
|
|
Mar 07 01:32:21 PM PST 24 |
Mar 07 01:34:18 PM PST 24 |
16757266881 ps |
T1615 |
/workspace/coverage/default/8.lc_ctrl_state_failure.3953793460 |
|
|
Mar 07 01:29:26 PM PST 24 |
Mar 07 01:29:51 PM PST 24 |
192429994 ps |
T1616 |
/workspace/coverage/default/8.lc_ctrl_sec_token_mux.3108654617 |
|
|
Mar 07 01:55:11 PM PST 24 |
Mar 07 01:55:21 PM PST 24 |
330921040 ps |
T1617 |
/workspace/coverage/default/28.lc_ctrl_stress_all.817421951 |
|
|
Mar 07 01:57:08 PM PST 24 |
Mar 07 01:58:05 PM PST 24 |
1523323864 ps |
T1618 |
/workspace/coverage/default/26.lc_ctrl_sec_mubi.1378085944 |
|
|
Mar 07 01:56:56 PM PST 24 |
Mar 07 01:57:15 PM PST 24 |
1137920469 ps |
T1619 |
/workspace/coverage/default/13.lc_ctrl_jtag_prog_failure.3016413422 |
|
|
Mar 07 01:30:01 PM PST 24 |
Mar 07 01:30:09 PM PST 24 |
1528115054 ps |
T1620 |
/workspace/coverage/default/28.lc_ctrl_sec_token_mux.1347867073 |
|
|
Mar 07 01:57:09 PM PST 24 |
Mar 07 01:57:20 PM PST 24 |
452537574 ps |
T1621 |
/workspace/coverage/default/15.lc_ctrl_jtag_access.81278609 |
|
|
Mar 07 01:30:09 PM PST 24 |
Mar 07 01:30:11 PM PST 24 |
90024209 ps |
T1622 |
/workspace/coverage/default/7.lc_ctrl_jtag_state_post_trans.3011566775 |
|
|
Mar 07 01:29:16 PM PST 24 |
Mar 07 01:29:35 PM PST 24 |
415773388 ps |
T1623 |
/workspace/coverage/default/34.lc_ctrl_sec_token_mux.3119945491 |
|
|
Mar 07 01:57:35 PM PST 24 |
Mar 07 01:57:44 PM PST 24 |
467209472 ps |
T1624 |
/workspace/coverage/default/29.lc_ctrl_smoke.1076731214 |
|
|
Mar 07 01:31:08 PM PST 24 |
Mar 07 01:31:11 PM PST 24 |
88989843 ps |
T1625 |
/workspace/coverage/default/23.lc_ctrl_alert_test.2968511631 |
|
|
Mar 07 01:56:43 PM PST 24 |
Mar 07 01:56:44 PM PST 24 |
16566767 ps |
T1626 |
/workspace/coverage/default/1.lc_ctrl_jtag_regwen_during_op.2467375798 |
|
|
Mar 07 01:53:57 PM PST 24 |
Mar 07 01:54:27 PM PST 24 |
12422909135 ps |
T1627 |
/workspace/coverage/default/2.lc_ctrl_jtag_regwen_during_op.3812571755 |
|
|
Mar 07 01:54:11 PM PST 24 |
Mar 07 01:54:32 PM PST 24 |
13874943047 ps |
T1628 |
/workspace/coverage/default/38.lc_ctrl_state_failure.2006358233 |
|
|
Mar 07 01:31:52 PM PST 24 |
Mar 07 01:32:26 PM PST 24 |
1277473189 ps |
T1629 |
/workspace/coverage/default/22.lc_ctrl_jtag_access.3798312787 |
|
|
Mar 07 01:30:49 PM PST 24 |
Mar 07 01:30:57 PM PST 24 |
2846280013 ps |
T1630 |
/workspace/coverage/default/15.lc_ctrl_jtag_state_failure.1682413743 |
|
|
Mar 07 01:56:00 PM PST 24 |
Mar 07 01:57:17 PM PST 24 |
4148767554 ps |
T1631 |
/workspace/coverage/default/24.lc_ctrl_jtag_access.4084703994 |
|
|
Mar 07 01:31:01 PM PST 24 |
Mar 07 01:31:05 PM PST 24 |
271642081 ps |
T1632 |
/workspace/coverage/default/30.lc_ctrl_jtag_access.3147552820 |
|
|
Mar 07 01:31:17 PM PST 24 |
Mar 07 01:31:25 PM PST 24 |
2666411394 ps |
T1633 |
/workspace/coverage/default/5.lc_ctrl_prog_failure.400562679 |
|
|
Mar 07 01:54:35 PM PST 24 |
Mar 07 01:54:37 PM PST 24 |
111573730 ps |
T1634 |
/workspace/coverage/default/8.lc_ctrl_regwen_during_op.1440360115 |
|
|
Mar 07 01:29:29 PM PST 24 |
Mar 07 01:29:54 PM PST 24 |
383604160 ps |
T1635 |
/workspace/coverage/default/5.lc_ctrl_errors.355262085 |
|
|
Mar 07 01:29:01 PM PST 24 |
Mar 07 01:29:14 PM PST 24 |
310080731 ps |
T1636 |
/workspace/coverage/default/18.lc_ctrl_state_failure.3223285946 |
|
|
Mar 07 01:56:26 PM PST 24 |
Mar 07 01:56:51 PM PST 24 |
1288541948 ps |
T1637 |
/workspace/coverage/default/3.lc_ctrl_sec_mubi.3626765426 |
|
|
Mar 07 01:28:34 PM PST 24 |
Mar 07 01:28:44 PM PST 24 |
824120704 ps |
T1638 |
/workspace/coverage/default/48.lc_ctrl_errors.3791265939 |
|
|
Mar 07 01:32:23 PM PST 24 |
Mar 07 01:32:40 PM PST 24 |
4509327836 ps |
T1639 |
/workspace/coverage/default/12.lc_ctrl_smoke.790173261 |
|
|
Mar 07 01:55:34 PM PST 24 |
Mar 07 01:55:36 PM PST 24 |
240451455 ps |
T1640 |
/workspace/coverage/default/15.lc_ctrl_sec_token_mux.1515306216 |
|
|
Mar 07 01:30:08 PM PST 24 |
Mar 07 01:30:19 PM PST 24 |
269476844 ps |
T1641 |
/workspace/coverage/default/10.lc_ctrl_errors.998435177 |
|
|
Mar 07 01:55:22 PM PST 24 |
Mar 07 01:55:35 PM PST 24 |
982400461 ps |
T1642 |
/workspace/coverage/default/8.lc_ctrl_security_escalation.2788374172 |
|
|
Mar 07 01:55:09 PM PST 24 |
Mar 07 01:55:19 PM PST 24 |
248090007 ps |
T1643 |
/workspace/coverage/default/2.lc_ctrl_jtag_access.4170246203 |
|
|
Mar 07 01:54:10 PM PST 24 |
Mar 07 01:54:15 PM PST 24 |
693277348 ps |
T1644 |
/workspace/coverage/default/10.lc_ctrl_security_escalation.2734086841 |
|
|
Mar 07 01:29:43 PM PST 24 |
Mar 07 01:29:54 PM PST 24 |
356554037 ps |
T1645 |
/workspace/coverage/default/2.lc_ctrl_regwen_during_op.3213341135 |
|
|
Mar 07 01:28:24 PM PST 24 |
Mar 07 01:28:36 PM PST 24 |
800175776 ps |
T1646 |
/workspace/coverage/default/29.lc_ctrl_state_post_trans.254693116 |
|
|
Mar 07 01:31:14 PM PST 24 |
Mar 07 01:31:22 PM PST 24 |
821248452 ps |
T1647 |
/workspace/coverage/default/40.lc_ctrl_state_post_trans.3214778416 |
|
|
Mar 07 01:31:53 PM PST 24 |
Mar 07 01:31:59 PM PST 24 |
109723933 ps |
T1648 |
/workspace/coverage/default/22.lc_ctrl_alert_test.2066280400 |
|
|
Mar 07 01:30:51 PM PST 24 |
Mar 07 01:30:52 PM PST 24 |
30962100 ps |
T1649 |
/workspace/coverage/default/15.lc_ctrl_sec_mubi.3772158486 |
|
|
Mar 07 01:30:09 PM PST 24 |
Mar 07 01:30:19 PM PST 24 |
499653200 ps |
T1650 |
/workspace/coverage/default/17.lc_ctrl_jtag_errors.2189429144 |
|
|
Mar 07 01:56:13 PM PST 24 |
Mar 07 01:57:02 PM PST 24 |
6218702233 ps |
T1651 |
/workspace/coverage/default/42.lc_ctrl_alert_test.1429401531 |
|
|
Mar 07 01:32:02 PM PST 24 |
Mar 07 01:32:03 PM PST 24 |
89198160 ps |
T1652 |
/workspace/coverage/default/19.lc_ctrl_prog_failure.408352018 |
|
|
Mar 07 01:30:36 PM PST 24 |
Mar 07 01:30:38 PM PST 24 |
30850771 ps |
T1653 |
/workspace/coverage/default/45.lc_ctrl_alert_test.1448877391 |
|
|
Mar 07 01:32:11 PM PST 24 |
Mar 07 01:32:13 PM PST 24 |
28153189 ps |
T1654 |
/workspace/coverage/default/20.lc_ctrl_sec_token_mux.4236946481 |
|
|
Mar 07 01:30:42 PM PST 24 |
Mar 07 01:30:55 PM PST 24 |
314592176 ps |
T1655 |
/workspace/coverage/default/8.lc_ctrl_jtag_state_failure.1854051347 |
|
|
Mar 07 01:29:25 PM PST 24 |
Mar 07 01:30:52 PM PST 24 |
11002376458 ps |
T1656 |
/workspace/coverage/default/3.lc_ctrl_state_post_trans.1651765339 |
|
|
Mar 07 01:54:06 PM PST 24 |
Mar 07 01:54:12 PM PST 24 |
230857745 ps |
T1657 |
/workspace/coverage/default/25.lc_ctrl_sec_mubi.3331004105 |
|
|
Mar 07 01:56:54 PM PST 24 |
Mar 07 01:57:06 PM PST 24 |
1140563197 ps |
T1658 |
/workspace/coverage/default/26.lc_ctrl_stress_all.2217158847 |
|
|
Mar 07 01:31:02 PM PST 24 |
Mar 07 01:33:58 PM PST 24 |
9354686160 ps |
T1659 |
/workspace/coverage/default/28.lc_ctrl_errors.2844029615 |
|
|
Mar 07 01:57:11 PM PST 24 |
Mar 07 01:57:30 PM PST 24 |
774547025 ps |
T1660 |
/workspace/coverage/default/17.lc_ctrl_jtag_access.2598438212 |
|
|
Mar 07 01:56:15 PM PST 24 |
Mar 07 01:56:19 PM PST 24 |
451846347 ps |
T1661 |
/workspace/coverage/default/43.lc_ctrl_errors.2141255277 |
|
|
Mar 07 01:58:05 PM PST 24 |
Mar 07 01:58:16 PM PST 24 |
286804009 ps |
T1662 |
/workspace/coverage/default/45.lc_ctrl_sec_mubi.3322966921 |
|
|
Mar 07 01:32:12 PM PST 24 |
Mar 07 01:32:28 PM PST 24 |
813218160 ps |
T1663 |
/workspace/coverage/default/44.lc_ctrl_jtag_access.1152244567 |
|
|
Mar 07 01:58:19 PM PST 24 |
Mar 07 01:58:25 PM PST 24 |
1862220045 ps |
T1664 |
/workspace/coverage/default/16.lc_ctrl_smoke.1464591828 |
|
|
Mar 07 01:56:03 PM PST 24 |
Mar 07 01:56:05 PM PST 24 |
42051764 ps |
T1665 |
/workspace/coverage/default/27.lc_ctrl_sec_token_mux.679937429 |
|
|
Mar 07 01:31:08 PM PST 24 |
Mar 07 01:31:17 PM PST 24 |
375251769 ps |
T1666 |
/workspace/coverage/default/12.lc_ctrl_sec_mubi.2072998048 |
|
|
Mar 07 01:55:42 PM PST 24 |
Mar 07 01:55:55 PM PST 24 |
282218717 ps |
T1667 |
/workspace/coverage/default/4.lc_ctrl_sec_mubi.3213322441 |
|
|
Mar 07 01:54:32 PM PST 24 |
Mar 07 01:54:46 PM PST 24 |
1030315156 ps |
T1668 |
/workspace/coverage/default/32.lc_ctrl_errors.4184232996 |
|
|
Mar 07 01:57:27 PM PST 24 |
Mar 07 01:57:38 PM PST 24 |
259954985 ps |
T1669 |
/workspace/coverage/default/20.lc_ctrl_errors.3675630892 |
|
|
Mar 07 01:56:38 PM PST 24 |
Mar 07 01:56:56 PM PST 24 |
567413212 ps |
T1670 |
/workspace/coverage/default/7.lc_ctrl_state_failure.1086484013 |
|
|
Mar 07 01:29:17 PM PST 24 |
Mar 07 01:29:47 PM PST 24 |
358011224 ps |
T1671 |
/workspace/coverage/default/1.lc_ctrl_sec_token_digest.3366899575 |
|
|
Mar 07 01:53:55 PM PST 24 |
Mar 07 01:54:06 PM PST 24 |
301813147 ps |
T1672 |
/workspace/coverage/default/11.lc_ctrl_alert_test.4166147949 |
|
|
Mar 07 01:29:55 PM PST 24 |
Mar 07 01:29:56 PM PST 24 |
45197976 ps |
T1673 |
/workspace/coverage/default/19.lc_ctrl_volatile_unlock_smoke.2873622775 |
|
|
Mar 07 01:56:27 PM PST 24 |
Mar 07 01:56:28 PM PST 24 |
44729068 ps |
T1674 |
/workspace/coverage/default/26.lc_ctrl_smoke.2738004491 |
|
|
Mar 07 01:56:55 PM PST 24 |
Mar 07 01:56:57 PM PST 24 |
40599916 ps |
T1675 |
/workspace/coverage/default/8.lc_ctrl_jtag_access.1994782113 |
|
|
Mar 07 01:55:13 PM PST 24 |
Mar 07 01:55:17 PM PST 24 |
241287403 ps |
T1676 |
/workspace/coverage/default/35.lc_ctrl_sec_token_mux.3467604044 |
|
|
Mar 07 01:31:35 PM PST 24 |
Mar 07 01:31:46 PM PST 24 |
234692024 ps |
T1677 |
/workspace/coverage/default/25.lc_ctrl_prog_failure.150000925 |
|
|
Mar 07 01:56:52 PM PST 24 |
Mar 07 01:56:55 PM PST 24 |
59690771 ps |
T1678 |
/workspace/coverage/default/25.lc_ctrl_sec_mubi.2432772758 |
|
|
Mar 07 01:31:02 PM PST 24 |
Mar 07 01:31:14 PM PST 24 |
426124354 ps |
T1679 |
/workspace/coverage/default/8.lc_ctrl_alert_test.236738387 |
|
|
Mar 07 01:55:10 PM PST 24 |
Mar 07 01:55:11 PM PST 24 |
18434442 ps |
T1680 |
/workspace/coverage/default/47.lc_ctrl_security_escalation.2666079642 |
|
|
Mar 07 01:58:35 PM PST 24 |
Mar 07 01:58:42 PM PST 24 |
1006603235 ps |
T1681 |
/workspace/coverage/default/23.lc_ctrl_jtag_access.776383911 |
|
|
Mar 07 01:56:44 PM PST 24 |
Mar 07 01:57:02 PM PST 24 |
1478803652 ps |
T1682 |
/workspace/coverage/default/28.lc_ctrl_alert_test.1491701654 |
|
|
Mar 07 01:57:08 PM PST 24 |
Mar 07 01:57:10 PM PST 24 |
66177174 ps |
T1683 |
/workspace/coverage/default/26.lc_ctrl_stress_all.630705283 |
|
|
Mar 07 01:56:57 PM PST 24 |
Mar 07 02:00:40 PM PST 24 |
9552590372 ps |
T90 |
/workspace/coverage/default/44.lc_ctrl_stress_all_with_rand_reset.1376860551 |
|
|
Mar 07 01:32:12 PM PST 24 |
Mar 07 01:39:04 PM PST 24 |
47365827231 ps |
T1684 |
/workspace/coverage/default/47.lc_ctrl_sec_mubi.3742924884 |
|
|
Mar 07 01:58:40 PM PST 24 |
Mar 07 01:59:06 PM PST 24 |
2108182091 ps |
T1685 |
/workspace/coverage/default/33.lc_ctrl_security_escalation.4115390139 |
|
|
Mar 07 01:57:28 PM PST 24 |
Mar 07 01:57:40 PM PST 24 |
890622432 ps |
T1686 |
/workspace/coverage/default/14.lc_ctrl_volatile_unlock_smoke.240035202 |
|
|
Mar 07 01:30:02 PM PST 24 |
Mar 07 01:30:03 PM PST 24 |
25693982 ps |
T1687 |
/workspace/coverage/default/45.lc_ctrl_security_escalation.2518175479 |
|
|
Mar 07 01:58:21 PM PST 24 |
Mar 07 01:58:32 PM PST 24 |
238747948 ps |
T1688 |
/workspace/coverage/default/39.lc_ctrl_alert_test.2820243403 |
|
|
Mar 07 01:31:53 PM PST 24 |
Mar 07 01:31:55 PM PST 24 |
37431619 ps |
T1689 |
/workspace/coverage/default/34.lc_ctrl_prog_failure.2352366561 |
|
|
Mar 07 01:57:29 PM PST 24 |
Mar 07 01:57:32 PM PST 24 |
51837279 ps |
T1690 |
/workspace/coverage/default/20.lc_ctrl_volatile_unlock_smoke.3890981185 |
|
|
Mar 07 01:30:42 PM PST 24 |
Mar 07 01:30:43 PM PST 24 |
19921554 ps |
T1691 |
/workspace/coverage/default/45.lc_ctrl_state_post_trans.1665963429 |
|
|
Mar 07 01:32:11 PM PST 24 |
Mar 07 01:32:18 PM PST 24 |
119649540 ps |
T1692 |
/workspace/coverage/default/1.lc_ctrl_alert_test.1186690810 |
|
|
Mar 07 01:28:22 PM PST 24 |
Mar 07 01:28:23 PM PST 24 |
19012263 ps |
T1693 |
/workspace/coverage/default/8.lc_ctrl_volatile_unlock_smoke.3850164164 |
|
|
Mar 07 01:54:57 PM PST 24 |
Mar 07 01:54:58 PM PST 24 |
16727740 ps |
T114 |
/workspace/coverage/default/4.lc_ctrl_sec_cm.3117911220 |
|
|
Mar 07 01:29:05 PM PST 24 |
Mar 07 01:29:47 PM PST 24 |
225784641 ps |
T1694 |
/workspace/coverage/default/46.lc_ctrl_state_failure.2429265015 |
|
|
Mar 07 01:58:32 PM PST 24 |
Mar 07 01:58:52 PM PST 24 |
217780854 ps |
T1695 |
/workspace/coverage/default/14.lc_ctrl_prog_failure.298567716 |
|
|
Mar 07 01:55:43 PM PST 24 |
Mar 07 01:55:45 PM PST 24 |
136825722 ps |
T1696 |
/workspace/coverage/default/46.lc_ctrl_errors.1204846491 |
|
|
Mar 07 01:32:11 PM PST 24 |
Mar 07 01:32:28 PM PST 24 |
1216554800 ps |
T254 |
/workspace/coverage/default/4.lc_ctrl_claim_transition_if.1828351913 |
|
|
Mar 07 01:54:34 PM PST 24 |
Mar 07 01:54:35 PM PST 24 |
24612844 ps |
T1697 |
/workspace/coverage/default/17.lc_ctrl_prog_failure.838121599 |
|
|
Mar 07 01:56:14 PM PST 24 |
Mar 07 01:56:18 PM PST 24 |
298104608 ps |
T1698 |
/workspace/coverage/default/5.lc_ctrl_jtag_regwen_during_op.3804097887 |
|
|
Mar 07 01:54:47 PM PST 24 |
Mar 07 01:55:08 PM PST 24 |
636616416 ps |
T1699 |
/workspace/coverage/default/38.lc_ctrl_sec_token_mux.3344282532 |
|
|
Mar 07 01:57:54 PM PST 24 |
Mar 07 01:58:04 PM PST 24 |
1392506076 ps |
T1700 |
/workspace/coverage/default/48.lc_ctrl_stress_all.2184408489 |
|
|
Mar 07 01:32:24 PM PST 24 |
Mar 07 01:35:26 PM PST 24 |
6521078131 ps |
T1701 |
/workspace/coverage/default/44.lc_ctrl_prog_failure.4053735325 |
|
|
Mar 07 01:32:10 PM PST 24 |
Mar 07 01:32:13 PM PST 24 |
75999045 ps |
T1702 |
/workspace/coverage/default/14.lc_ctrl_sec_token_mux.298691831 |
|
|
Mar 07 01:30:09 PM PST 24 |
Mar 07 01:30:22 PM PST 24 |
2493945946 ps |
T1703 |
/workspace/coverage/default/11.lc_ctrl_security_escalation.707249253 |
|
|
Mar 07 01:55:31 PM PST 24 |
Mar 07 01:55:43 PM PST 24 |
532080043 ps |
T1704 |
/workspace/coverage/default/24.lc_ctrl_state_failure.3966520369 |
|
|
Mar 07 01:56:43 PM PST 24 |
Mar 07 01:57:15 PM PST 24 |
266701751 ps |
T1705 |
/workspace/coverage/default/25.lc_ctrl_security_escalation.2089160566 |
|
|
Mar 07 01:31:02 PM PST 24 |
Mar 07 01:31:15 PM PST 24 |
726303124 ps |
T1706 |
/workspace/coverage/default/0.lc_ctrl_stress_all.530429528 |
|
|
Mar 07 01:53:44 PM PST 24 |
Mar 07 01:56:51 PM PST 24 |
16615114845 ps |
T1707 |
/workspace/coverage/default/4.lc_ctrl_smoke.1040717599 |
|
|
Mar 07 01:28:48 PM PST 24 |
Mar 07 01:28:50 PM PST 24 |
101181315 ps |
T1708 |
/workspace/coverage/default/9.lc_ctrl_prog_failure.1192839269 |
|
|
Mar 07 01:29:37 PM PST 24 |
Mar 07 01:29:40 PM PST 24 |
87068135 ps |
T144 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_same_csr_outstanding.3357599620 |
|
|
Mar 07 01:16:55 PM PST 24 |
Mar 07 01:16:56 PM PST 24 |
26926983 ps |
T136 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_csr_hw_reset.2195223821 |
|
|
Mar 07 01:17:09 PM PST 24 |
Mar 07 01:17:11 PM PST 24 |
43802398 ps |
T128 |
/workspace/coverage/cover_reg_top/10.lc_ctrl_tl_intg_err.2540658544 |
|
|
Mar 07 01:17:36 PM PST 24 |
Mar 07 01:17:41 PM PST 24 |
354678383 ps |
T137 |
/workspace/coverage/cover_reg_top/7.lc_ctrl_same_csr_outstanding.880591347 |
|
|
Mar 07 01:17:26 PM PST 24 |
Mar 07 01:17:27 PM PST 24 |
59667326 ps |
T129 |
/workspace/coverage/cover_reg_top/14.lc_ctrl_tl_errors.3575474774 |
|
|
Mar 07 01:08:15 PM PST 24 |
Mar 07 01:08:18 PM PST 24 |
1676589919 ps |
T130 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_tl_intg_err.3080928002 |
|
|
Mar 07 01:16:50 PM PST 24 |
Mar 07 01:16:53 PM PST 24 |
124494337 ps |
T210 |
/workspace/coverage/cover_reg_top/11.lc_ctrl_csr_mem_rw_with_rand_reset.1869011544 |
|
|
Mar 07 01:08:00 PM PST 24 |
Mar 07 01:08:01 PM PST 24 |
60726658 ps |
T177 |
/workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_csr_rw.1572859195 |
|
|
Mar 07 01:17:07 PM PST 24 |
Mar 07 01:17:09 PM PST 24 |
47017192 ps |
T238 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_same_csr_outstanding.1692330245 |
|
|
Mar 07 01:07:05 PM PST 24 |
Mar 07 01:07:06 PM PST 24 |
22132349 ps |
T239 |
/workspace/coverage/cover_reg_top/11.lc_ctrl_same_csr_outstanding.2828216341 |
|
|
Mar 07 01:08:00 PM PST 24 |
Mar 07 01:08:02 PM PST 24 |
20396516 ps |
T133 |
/workspace/coverage/cover_reg_top/18.lc_ctrl_tl_errors.55031823 |
|
|
Mar 07 01:17:51 PM PST 24 |
Mar 07 01:17:53 PM PST 24 |
29166610 ps |
T178 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_rw.3522188650 |
|
|
Mar 07 01:07:07 PM PST 24 |
Mar 07 01:07:08 PM PST 24 |
87957463 ps |
T151 |
/workspace/coverage/cover_reg_top/19.lc_ctrl_tl_errors.2218760670 |
|
|
Mar 07 01:08:27 PM PST 24 |
Mar 07 01:08:30 PM PST 24 |
75516757 ps |
T1709 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_csr_bit_bash.3812544143 |
|
|
Mar 07 01:16:54 PM PST 24 |
Mar 07 01:16:56 PM PST 24 |
67112387 ps |
T1710 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_csr_bit_bash.2009636163 |
|
|
Mar 07 01:07:16 PM PST 24 |
Mar 07 01:07:19 PM PST 24 |
78613541 ps |
T1711 |
/workspace/coverage/cover_reg_top/5.lc_ctrl_csr_rw.348462758 |
|
|
Mar 07 01:07:26 PM PST 24 |
Mar 07 01:07:28 PM PST 24 |
59914572 ps |
T174 |
/workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_csr_aliasing.1757283239 |
|
|
Mar 07 01:07:31 PM PST 24 |
Mar 07 01:07:43 PM PST 24 |
1632709232 ps |
T1712 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_csr_bit_bash.3774621072 |
|
|
Mar 07 01:17:09 PM PST 24 |
Mar 07 01:17:13 PM PST 24 |
68084548 ps |
T1713 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_hw_reset.3770291668 |
|
|
Mar 07 01:06:41 PM PST 24 |
Mar 07 01:06:42 PM PST 24 |
150968765 ps |
T134 |
/workspace/coverage/cover_reg_top/17.lc_ctrl_tl_intg_err.2851793245 |
|
|
Mar 07 01:17:48 PM PST 24 |
Mar 07 01:17:51 PM PST 24 |
78009576 ps |
T1714 |
/workspace/coverage/cover_reg_top/10.lc_ctrl_csr_rw.1010893573 |
|
|
Mar 07 01:17:35 PM PST 24 |
Mar 07 01:17:37 PM PST 24 |
11134631 ps |
T240 |
/workspace/coverage/cover_reg_top/17.lc_ctrl_same_csr_outstanding.3544457216 |
|
|
Mar 07 01:08:14 PM PST 24 |
Mar 07 01:08:16 PM PST 24 |
134882215 ps |
T145 |
/workspace/coverage/cover_reg_top/12.lc_ctrl_tl_intg_err.3004019938 |
|
|
Mar 07 01:08:15 PM PST 24 |
Mar 07 01:08:20 PM PST 24 |
479785164 ps |
T1715 |
/workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_hw_reset.1897679814 |
|
|
Mar 07 01:07:42 PM PST 24 |
Mar 07 01:07:44 PM PST 24 |
1386244722 ps |
T139 |
/workspace/coverage/cover_reg_top/10.lc_ctrl_tl_intg_err.1342660048 |
|
|
Mar 07 01:07:58 PM PST 24 |
Mar 07 01:08:00 PM PST 24 |
81512097 ps |
T175 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_rw.3702989919 |
|
|
Mar 07 01:07:16 PM PST 24 |
Mar 07 01:07:18 PM PST 24 |
41990261 ps |
T160 |
/workspace/coverage/cover_reg_top/6.lc_ctrl_tl_intg_err.398095777 |
|
|
Mar 07 01:07:45 PM PST 24 |
Mar 07 01:07:47 PM PST 24 |
179654398 ps |
T197 |
/workspace/coverage/cover_reg_top/10.lc_ctrl_csr_mem_rw_with_rand_reset.2179937009 |
|
|
Mar 07 01:17:36 PM PST 24 |
Mar 07 01:17:39 PM PST 24 |
79532171 ps |
T138 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_tl_errors.1492572346 |
|
|
Mar 07 01:06:52 PM PST 24 |
Mar 07 01:06:58 PM PST 24 |
535554978 ps |
T142 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_tl_errors.2901460 |
|
|
Mar 07 01:16:55 PM PST 24 |
Mar 07 01:16:58 PM PST 24 |
47388630 ps |
T1716 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_csr_mem_rw_with_rand_reset.432349928 |
|
|
Mar 07 01:07:01 PM PST 24 |
Mar 07 01:07:04 PM PST 24 |
27266355 ps |
T164 |
/workspace/coverage/cover_reg_top/17.lc_ctrl_tl_intg_err.433165278 |
|
|
Mar 07 01:08:18 PM PST 24 |
Mar 07 01:08:22 PM PST 24 |
393054814 ps |
T1717 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_alert_test.489908782 |
|
|
Mar 07 01:16:53 PM PST 24 |
Mar 07 01:16:55 PM PST 24 |
219457985 ps |
T1718 |
/workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_csr_rw.219830473 |
|
|
Mar 07 01:07:31 PM PST 24 |
Mar 07 01:07:33 PM PST 24 |
63720342 ps |
T1719 |
/workspace/coverage/cover_reg_top/7.lc_ctrl_csr_mem_rw_with_rand_reset.3897098875 |
|
|
Mar 07 01:07:43 PM PST 24 |
Mar 07 01:07:45 PM PST 24 |
23687031 ps |
T1720 |
/workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_alert_test.2215139826 |
|
|
Mar 07 01:17:26 PM PST 24 |
Mar 07 01:17:27 PM PST 24 |
320778303 ps |
T221 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_csr_rw.634148771 |
|
|
Mar 07 01:07:15 PM PST 24 |
Mar 07 01:07:17 PM PST 24 |
11238953 ps |
T241 |
/workspace/coverage/cover_reg_top/5.lc_ctrl_same_csr_outstanding.2370879055 |
|
|
Mar 07 01:07:28 PM PST 24 |
Mar 07 01:07:29 PM PST 24 |
72626674 ps |
T242 |
/workspace/coverage/cover_reg_top/15.lc_ctrl_csr_rw.3215083380 |
|
|
Mar 07 01:17:37 PM PST 24 |
Mar 07 01:17:38 PM PST 24 |
13967961 ps |
T1721 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.4251724577 |
|
|
Mar 07 01:07:59 PM PST 24 |
Mar 07 01:08:01 PM PST 24 |
363677526 ps |
T169 |
/workspace/coverage/cover_reg_top/18.lc_ctrl_tl_intg_err.1127616718 |
|
|
Mar 07 01:17:48 PM PST 24 |
Mar 07 01:17:51 PM PST 24 |
77081740 ps |
T1722 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_alert_test.3938921277 |
|
|
Mar 07 01:16:56 PM PST 24 |
Mar 07 01:16:58 PM PST 24 |
48611289 ps |
T140 |
/workspace/coverage/cover_reg_top/13.lc_ctrl_tl_intg_err.1291373012 |
|
|
Mar 07 01:08:17 PM PST 24 |
Mar 07 01:08:22 PM PST 24 |
961418322 ps |
T243 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_same_csr_outstanding.1934194191 |
|
|
Mar 07 01:17:35 PM PST 24 |
Mar 07 01:17:37 PM PST 24 |
65448827 ps |
T167 |
/workspace/coverage/cover_reg_top/11.lc_ctrl_tl_intg_err.3354565350 |
|
|
Mar 07 01:07:58 PM PST 24 |
Mar 07 01:08:00 PM PST 24 |
75114499 ps |
T244 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_same_csr_outstanding.1256871938 |
|
|
Mar 07 01:16:50 PM PST 24 |
Mar 07 01:16:51 PM PST 24 |
52555249 ps |
T222 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_csr_aliasing.1153777375 |
|
|
Mar 07 01:07:03 PM PST 24 |
Mar 07 01:07:04 PM PST 24 |
18792463 ps |
T1723 |
/workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_bit_bash.2393470824 |
|
|
Mar 07 01:17:15 PM PST 24 |
Mar 07 01:17:22 PM PST 24 |
5643558204 ps |
T245 |
/workspace/coverage/cover_reg_top/15.lc_ctrl_same_csr_outstanding.3015599809 |
|
|
Mar 07 01:08:18 PM PST 24 |
Mar 07 01:08:19 PM PST 24 |
24510554 ps |
T1724 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_hw_reset.3913329595 |
|
|
Mar 07 01:07:15 PM PST 24 |
Mar 07 01:07:19 PM PST 24 |
79640280 ps |
T1725 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.3995642893 |
|
|
Mar 07 01:16:51 PM PST 24 |
Mar 07 01:16:53 PM PST 24 |
90183562 ps |
T1726 |
/workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_same_csr_outstanding.1920627305 |
|
|
Mar 07 01:17:23 PM PST 24 |
Mar 07 01:17:25 PM PST 24 |
93208549 ps |
T1727 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_same_csr_outstanding.1476324354 |
|
|
Mar 07 01:06:51 PM PST 24 |
Mar 07 01:06:52 PM PST 24 |
200141769 ps |
T1728 |
/workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_same_csr_outstanding.4064906570 |
|
|
Mar 07 01:17:08 PM PST 24 |
Mar 07 01:17:09 PM PST 24 |
14946259 ps |
T223 |
/workspace/coverage/cover_reg_top/14.lc_ctrl_csr_rw.1622236702 |
|
|
Mar 07 01:17:38 PM PST 24 |
Mar 07 01:17:39 PM PST 24 |
21640194 ps |
T1729 |
/workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_same_csr_outstanding.1294218165 |
|
|
Mar 07 01:07:42 PM PST 24 |
Mar 07 01:07:43 PM PST 24 |
14859270 ps |
T1730 |
/workspace/coverage/cover_reg_top/11.lc_ctrl_csr_mem_rw_with_rand_reset.2355110669 |
|
|
Mar 07 01:17:36 PM PST 24 |
Mar 07 01:17:37 PM PST 24 |
50541939 ps |
T1731 |
/workspace/coverage/cover_reg_top/15.lc_ctrl_same_csr_outstanding.629995433 |
|
|
Mar 07 01:17:37 PM PST 24 |
Mar 07 01:17:38 PM PST 24 |
53260823 ps |
T153 |
/workspace/coverage/cover_reg_top/12.lc_ctrl_tl_intg_err.3046212378 |
|
|
Mar 07 01:17:35 PM PST 24 |
Mar 07 01:17:38 PM PST 24 |
74972359 ps |
T1732 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_alert_test.592309264 |
|
|
Mar 07 01:16:36 PM PST 24 |
Mar 07 01:16:37 PM PST 24 |
14143934 ps |
T1733 |
/workspace/coverage/cover_reg_top/17.lc_ctrl_csr_rw.3795467812 |
|
|
Mar 07 01:17:48 PM PST 24 |
Mar 07 01:17:49 PM PST 24 |
35398226 ps |
T1734 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_csr_hw_reset.2261214829 |
|
|
Mar 07 01:07:14 PM PST 24 |
Mar 07 01:07:15 PM PST 24 |
43662576 ps |
T1735 |
/workspace/coverage/cover_reg_top/19.lc_ctrl_same_csr_outstanding.4162958008 |
|
|
Mar 07 01:08:40 PM PST 24 |
Mar 07 01:08:41 PM PST 24 |
25621403 ps |
T147 |
/workspace/coverage/cover_reg_top/17.lc_ctrl_csr_mem_rw_with_rand_reset.1238073622 |
|
|
Mar 07 01:08:13 PM PST 24 |
Mar 07 01:08:15 PM PST 24 |
29491345 ps |
T1736 |
/workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_hw_reset.4079037790 |
|
|
Mar 07 01:07:40 PM PST 24 |
Mar 07 01:07:42 PM PST 24 |
61700546 ps |
T224 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_csr_aliasing.2485986041 |
|
|
Mar 07 01:16:53 PM PST 24 |
Mar 07 01:16:54 PM PST 24 |
141851598 ps |
T1737 |
/workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_alert_test.844278414 |
|
|
Mar 07 01:07:58 PM PST 24 |
Mar 07 01:08:00 PM PST 24 |
175421307 ps |
T152 |
/workspace/coverage/cover_reg_top/18.lc_ctrl_tl_intg_err.1543502754 |
|
|
Mar 07 01:08:16 PM PST 24 |
Mar 07 01:08:18 PM PST 24 |
42182270 ps |
T1738 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.2405535318 |
|
|
Mar 07 01:17:07 PM PST 24 |
Mar 07 01:17:09 PM PST 24 |
232422686 ps |
T143 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_tl_errors.2749886810 |
|
|
Mar 07 01:06:46 PM PST 24 |
Mar 07 01:06:49 PM PST 24 |
137519542 ps |
T1739 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_hw_reset.1116790826 |
|
|
Mar 07 01:17:28 PM PST 24 |
Mar 07 01:17:30 PM PST 24 |
74721212 ps |
T1740 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.1707597432 |
|
|
Mar 07 01:16:53 PM PST 24 |
Mar 07 01:16:54 PM PST 24 |
72793398 ps |
T176 |
/workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_hw_reset.4080592624 |
|
|
Mar 07 01:17:13 PM PST 24 |
Mar 07 01:17:17 PM PST 24 |
256131168 ps |
T1741 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_aliasing.3676754097 |
|
|
Mar 07 01:17:06 PM PST 24 |
Mar 07 01:17:12 PM PST 24 |
434622771 ps |
T155 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_tl_intg_err.729426169 |
|
|
Mar 07 01:06:50 PM PST 24 |
Mar 07 01:06:53 PM PST 24 |
250114587 ps |
T1742 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_bit_bash.2806352122 |
|
|
Mar 07 01:17:24 PM PST 24 |
Mar 07 01:17:29 PM PST 24 |
1708858077 ps |
T165 |
/workspace/coverage/cover_reg_top/14.lc_ctrl_tl_intg_err.3375802797 |
|
|
Mar 07 01:17:37 PM PST 24 |
Mar 07 01:17:41 PM PST 24 |
105559942 ps |
T225 |
/workspace/coverage/cover_reg_top/12.lc_ctrl_csr_rw.1810343660 |
|
|
Mar 07 01:08:16 PM PST 24 |
Mar 07 01:08:18 PM PST 24 |
12439143 ps |
T1743 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_hw_reset.4251932996 |
|
|
Mar 07 01:07:16 PM PST 24 |
Mar 07 01:07:21 PM PST 24 |
121646000 ps |
T1744 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_rw.3109832310 |
|
|
Mar 07 01:06:43 PM PST 24 |
Mar 07 01:06:45 PM PST 24 |
118473957 ps |
T172 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_tl_intg_err.2884492745 |
|
|
Mar 07 01:16:34 PM PST 24 |
Mar 07 01:16:36 PM PST 24 |
158445612 ps |
T1745 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_csr_rw.572174994 |
|
|
Mar 07 01:17:10 PM PST 24 |
Mar 07 01:17:11 PM PST 24 |
39539151 ps |
T1746 |
/workspace/coverage/cover_reg_top/6.lc_ctrl_csr_mem_rw_with_rand_reset.2835709359 |
|
|
Mar 07 01:07:46 PM PST 24 |
Mar 07 01:07:48 PM PST 24 |
20184954 ps |
T168 |
/workspace/coverage/cover_reg_top/19.lc_ctrl_tl_intg_err.3681181725 |
|
|
Mar 07 01:17:47 PM PST 24 |
Mar 07 01:17:51 PM PST 24 |
621631374 ps |
T1747 |
/workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_same_csr_outstanding.2580942106 |
|
|
Mar 07 01:07:42 PM PST 24 |
Mar 07 01:07:44 PM PST 24 |
45783577 ps |
T1748 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_bit_bash.451462962 |
|
|
Mar 07 01:07:16 PM PST 24 |
Mar 07 01:07:27 PM PST 24 |
674823507 ps |
T1749 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_aliasing.2949105813 |
|
|
Mar 07 01:06:39 PM PST 24 |
Mar 07 01:06:50 PM PST 24 |
428312337 ps |
T1750 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_hw_reset.2844771018 |
|
|
Mar 07 01:06:28 PM PST 24 |
Mar 07 01:06:30 PM PST 24 |
233434145 ps |
T1751 |
/workspace/coverage/cover_reg_top/15.lc_ctrl_csr_mem_rw_with_rand_reset.489554744 |
|
|
Mar 07 01:08:16 PM PST 24 |
Mar 07 01:08:18 PM PST 24 |
37337656 ps |
T1752 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_hw_reset.3464266212 |
|
|
Mar 07 01:16:52 PM PST 24 |
Mar 07 01:16:55 PM PST 24 |
166582127 ps |
T1753 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_csr_hw_reset.3956682698 |
|
|
Mar 07 01:06:38 PM PST 24 |
Mar 07 01:06:40 PM PST 24 |
14710165 ps |
T154 |
/workspace/coverage/cover_reg_top/19.lc_ctrl_tl_errors.3911543788 |
|
|
Mar 07 01:17:49 PM PST 24 |
Mar 07 01:17:53 PM PST 24 |
1029418837 ps |
T1754 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_csr_rw.3320715282 |
|
|
Mar 07 01:07:27 PM PST 24 |
Mar 07 01:07:29 PM PST 24 |
60181173 ps |
T146 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_tl_intg_err.2192335983 |
|
|
Mar 07 01:07:29 PM PST 24 |
Mar 07 01:07:32 PM PST 24 |
64270666 ps |
T1755 |
/workspace/coverage/cover_reg_top/15.lc_ctrl_tl_errors.3885714285 |
|
|
Mar 07 01:17:37 PM PST 24 |
Mar 07 01:17:40 PM PST 24 |
240094275 ps |
T226 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_csr_rw.3394166208 |
|
|
Mar 07 01:07:05 PM PST 24 |
Mar 07 01:07:06 PM PST 24 |
23778952 ps |
T1756 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_hw_reset.1221650062 |
|
|
Mar 07 01:16:55 PM PST 24 |
Mar 07 01:16:57 PM PST 24 |
120739995 ps |
T1757 |
/workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.3861967286 |
|
|
Mar 07 01:17:26 PM PST 24 |
Mar 07 01:17:29 PM PST 24 |
520614452 ps |
T141 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_tl_intg_err.3217350779 |
|
|
Mar 07 01:17:35 PM PST 24 |
Mar 07 01:17:38 PM PST 24 |
73969313 ps |
T1758 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_rw.3787937508 |
|
|
Mar 07 01:16:56 PM PST 24 |
Mar 07 01:16:57 PM PST 24 |
35638974 ps |
T1759 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_hw_reset.851914087 |
|
|
Mar 07 01:07:58 PM PST 24 |
Mar 07 01:07:59 PM PST 24 |
56622608 ps |
T227 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_csr_hw_reset.3585378363 |
|
|
Mar 07 01:16:51 PM PST 24 |
Mar 07 01:16:52 PM PST 24 |
120563819 ps |
T1760 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_bit_bash.965836946 |
|
|
Mar 07 01:06:40 PM PST 24 |
Mar 07 01:07:06 PM PST 24 |
4950770872 ps |
T1761 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_rw.3761160033 |
|
|
Mar 07 01:06:52 PM PST 24 |
Mar 07 01:06:53 PM PST 24 |
35940163 ps |
T1762 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_csr_rw.3095526146 |
|
|
Mar 07 01:16:52 PM PST 24 |
Mar 07 01:16:53 PM PST 24 |
56520426 ps |
T1763 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_tl_errors.2821085088 |
|
|
Mar 07 01:07:29 PM PST 24 |
Mar 07 01:07:32 PM PST 24 |
46979164 ps |
T1764 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_rw.3889541210 |
|
|
Mar 07 01:16:53 PM PST 24 |
Mar 07 01:16:54 PM PST 24 |
77194274 ps |
T1765 |
/workspace/coverage/cover_reg_top/14.lc_ctrl_tl_intg_err.1015114485 |
|
|
Mar 07 01:08:16 PM PST 24 |
Mar 07 01:08:20 PM PST 24 |
129248396 ps |
T1766 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_tl_errors.135980922 |
|
|
Mar 07 01:07:14 PM PST 24 |
Mar 07 01:07:19 PM PST 24 |
48156358 ps |
T1767 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_aliasing.1494766406 |
|
|
Mar 07 01:07:14 PM PST 24 |
Mar 07 01:07:24 PM PST 24 |
5784879085 ps |
T1768 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_rw.3786552216 |
|
|
Mar 07 01:17:24 PM PST 24 |
Mar 07 01:17:27 PM PST 24 |
64852000 ps |
T1769 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_hw_reset.4049387544 |
|
|
Mar 07 01:16:40 PM PST 24 |
Mar 07 01:16:43 PM PST 24 |
293076364 ps |
T1770 |
/workspace/coverage/cover_reg_top/5.lc_ctrl_same_csr_outstanding.486910430 |
|
|
Mar 07 01:17:14 PM PST 24 |
Mar 07 01:17:16 PM PST 24 |
74374752 ps |
T1771 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_hw_reset.2745646947 |
|
|
Mar 07 01:16:54 PM PST 24 |
Mar 07 01:16:59 PM PST 24 |
161448175 ps |
T1772 |
/workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_csr_aliasing.2710788567 |
|
|
Mar 07 01:17:09 PM PST 24 |
Mar 07 01:17:15 PM PST 24 |
1776109590 ps |
T1773 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_aliasing.4185273467 |
|
|
Mar 07 01:07:06 PM PST 24 |
Mar 07 01:07:28 PM PST 24 |
7592025476 ps |
T1774 |
/workspace/coverage/cover_reg_top/16.lc_ctrl_tl_errors.1315083059 |
|
|
Mar 07 01:08:13 PM PST 24 |
Mar 07 01:08:16 PM PST 24 |
152525903 ps |