| T1581 |
/workspace/coverage/default/16.lc_ctrl_jtag_state_post_trans.2157095364 |
|
|
Mar 24 02:35:43 PM PDT 24 |
Mar 24 02:35:59 PM PDT 24 |
1363903951 ps |
| T1582 |
/workspace/coverage/default/37.lc_ctrl_sec_mubi.3421104914 |
|
|
Mar 24 01:56:55 PM PDT 24 |
Mar 24 01:57:12 PM PDT 24 |
495549561 ps |
| T1583 |
/workspace/coverage/default/45.lc_ctrl_smoke.2853711015 |
|
|
Mar 24 02:37:09 PM PDT 24 |
Mar 24 02:37:12 PM PDT 24 |
116463836 ps |
| T1584 |
/workspace/coverage/default/0.lc_ctrl_jtag_priority.1295224980 |
|
|
Mar 24 02:34:42 PM PDT 24 |
Mar 24 02:34:46 PM PDT 24 |
309386712 ps |
| T1585 |
/workspace/coverage/default/36.lc_ctrl_sec_token_digest.905862794 |
|
|
Mar 24 02:36:45 PM PDT 24 |
Mar 24 02:36:57 PM PDT 24 |
4223652837 ps |
| T1586 |
/workspace/coverage/default/14.lc_ctrl_sec_token_digest.1236190627 |
|
|
Mar 24 02:35:58 PM PDT 24 |
Mar 24 02:36:12 PM PDT 24 |
771608708 ps |
| T1587 |
/workspace/coverage/default/5.lc_ctrl_jtag_state_failure.1759411926 |
|
|
Mar 24 01:54:58 PM PDT 24 |
Mar 24 01:55:42 PM PDT 24 |
1118993369 ps |
| T1588 |
/workspace/coverage/default/15.lc_ctrl_sec_token_digest.1968754890 |
|
|
Mar 24 01:55:41 PM PDT 24 |
Mar 24 01:55:51 PM PDT 24 |
863494687 ps |
| T1589 |
/workspace/coverage/default/4.lc_ctrl_jtag_state_post_trans.3712358318 |
|
|
Mar 24 01:54:51 PM PDT 24 |
Mar 24 01:55:02 PM PDT 24 |
507194197 ps |
| T1590 |
/workspace/coverage/default/5.lc_ctrl_stress_all.1296350349 |
|
|
Mar 24 01:54:59 PM PDT 24 |
Mar 24 01:57:29 PM PDT 24 |
61319599633 ps |
| T1591 |
/workspace/coverage/default/23.lc_ctrl_alert_test.4289647775 |
|
|
Mar 24 02:36:12 PM PDT 24 |
Mar 24 02:36:13 PM PDT 24 |
18377114 ps |
| T1592 |
/workspace/coverage/default/20.lc_ctrl_volatile_unlock_smoke.840820784 |
|
|
Mar 24 01:56:01 PM PDT 24 |
Mar 24 01:56:04 PM PDT 24 |
39543015 ps |
| T1593 |
/workspace/coverage/default/23.lc_ctrl_sec_mubi.1098402133 |
|
|
Mar 24 02:36:10 PM PDT 24 |
Mar 24 02:36:21 PM PDT 24 |
599896654 ps |
| T1594 |
/workspace/coverage/default/9.lc_ctrl_stress_all.4155501629 |
|
|
Mar 24 01:55:17 PM PDT 24 |
Mar 24 01:58:41 PM PDT 24 |
23172130437 ps |
| T1595 |
/workspace/coverage/default/38.lc_ctrl_stress_all_with_rand_reset.2516943090 |
|
|
Mar 24 01:56:54 PM PDT 24 |
Mar 24 01:59:43 PM PDT 24 |
17780435636 ps |
| T1596 |
/workspace/coverage/default/43.lc_ctrl_state_post_trans.1104409124 |
|
|
Mar 24 01:57:11 PM PDT 24 |
Mar 24 01:57:15 PM PDT 24 |
126101715 ps |
| T1597 |
/workspace/coverage/default/33.lc_ctrl_sec_token_mux.601822942 |
|
|
Mar 24 02:36:34 PM PDT 24 |
Mar 24 02:36:41 PM PDT 24 |
1068838007 ps |
| T1598 |
/workspace/coverage/default/15.lc_ctrl_jtag_errors.2851537288 |
|
|
Mar 24 01:55:43 PM PDT 24 |
Mar 24 01:56:18 PM PDT 24 |
15186001024 ps |
| T1599 |
/workspace/coverage/default/26.lc_ctrl_security_escalation.4076162445 |
|
|
Mar 24 01:56:18 PM PDT 24 |
Mar 24 01:56:25 PM PDT 24 |
203281334 ps |
| T1600 |
/workspace/coverage/default/3.lc_ctrl_smoke.3996421441 |
|
|
Mar 24 01:54:48 PM PDT 24 |
Mar 24 01:54:51 PM PDT 24 |
148635744 ps |
| T1601 |
/workspace/coverage/default/46.lc_ctrl_sec_token_mux.2224081123 |
|
|
Mar 24 01:57:19 PM PDT 24 |
Mar 24 01:57:31 PM PDT 24 |
421402799 ps |
| T1602 |
/workspace/coverage/default/45.lc_ctrl_stress_all.3260424022 |
|
|
Mar 24 01:57:21 PM PDT 24 |
Mar 24 01:58:27 PM PDT 24 |
8477605709 ps |
| T1603 |
/workspace/coverage/default/14.lc_ctrl_stress_all.1697419412 |
|
|
Mar 24 02:35:44 PM PDT 24 |
Mar 24 02:41:04 PM PDT 24 |
63665358183 ps |
| T1604 |
/workspace/coverage/default/7.lc_ctrl_smoke.2473786364 |
|
|
Mar 24 02:35:11 PM PDT 24 |
Mar 24 02:35:14 PM PDT 24 |
1020801572 ps |
| T1605 |
/workspace/coverage/default/14.lc_ctrl_jtag_errors.1717513202 |
|
|
Mar 24 01:55:38 PM PDT 24 |
Mar 24 01:56:31 PM PDT 24 |
11712267647 ps |
| T1606 |
/workspace/coverage/default/2.lc_ctrl_sec_mubi.718438636 |
|
|
Mar 24 02:34:49 PM PDT 24 |
Mar 24 02:35:08 PM PDT 24 |
479248201 ps |
| T1607 |
/workspace/coverage/default/23.lc_ctrl_volatile_unlock_smoke.3367677616 |
|
|
Mar 24 01:56:13 PM PDT 24 |
Mar 24 01:56:14 PM PDT 24 |
25222922 ps |
| T213 |
/workspace/coverage/default/28.lc_ctrl_stress_all_with_rand_reset.459093457 |
|
|
Mar 24 01:56:27 PM PDT 24 |
Mar 24 02:09:49 PM PDT 24 |
754219062632 ps |
| T1608 |
/workspace/coverage/default/21.lc_ctrl_errors.1193747716 |
|
|
Mar 24 02:36:03 PM PDT 24 |
Mar 24 02:36:20 PM PDT 24 |
688618876 ps |
| T1609 |
/workspace/coverage/default/44.lc_ctrl_alert_test.1316861536 |
|
|
Mar 24 01:57:14 PM PDT 24 |
Mar 24 01:57:16 PM PDT 24 |
44625450 ps |
| T1610 |
/workspace/coverage/default/46.lc_ctrl_errors.578706511 |
|
|
Mar 24 02:37:15 PM PDT 24 |
Mar 24 02:37:26 PM PDT 24 |
1701588988 ps |
| T1611 |
/workspace/coverage/default/7.lc_ctrl_regwen_during_op.3511070818 |
|
|
Mar 24 01:55:08 PM PDT 24 |
Mar 24 01:55:22 PM PDT 24 |
1472771389 ps |
| T1612 |
/workspace/coverage/default/7.lc_ctrl_smoke.2768689782 |
|
|
Mar 24 01:55:03 PM PDT 24 |
Mar 24 01:55:07 PM PDT 24 |
84697938 ps |
| T1613 |
/workspace/coverage/default/9.lc_ctrl_sec_token_mux.697916349 |
|
|
Mar 24 02:35:24 PM PDT 24 |
Mar 24 02:35:34 PM PDT 24 |
246285727 ps |
| T1614 |
/workspace/coverage/default/8.lc_ctrl_jtag_state_failure.196943927 |
|
|
Mar 24 01:55:10 PM PDT 24 |
Mar 24 01:56:24 PM PDT 24 |
7497194218 ps |
| T1615 |
/workspace/coverage/default/2.lc_ctrl_jtag_priority.1235086992 |
|
|
Mar 24 02:34:52 PM PDT 24 |
Mar 24 02:34:58 PM PDT 24 |
585846768 ps |
| T1616 |
/workspace/coverage/default/39.lc_ctrl_alert_test.3213837585 |
|
|
Mar 24 02:37:02 PM PDT 24 |
Mar 24 02:37:04 PM PDT 24 |
64029217 ps |
| T1617 |
/workspace/coverage/default/36.lc_ctrl_sec_token_digest.161335789 |
|
|
Mar 24 01:56:50 PM PDT 24 |
Mar 24 01:57:03 PM PDT 24 |
341970688 ps |
| T1618 |
/workspace/coverage/default/27.lc_ctrl_volatile_unlock_smoke.2294230615 |
|
|
Mar 24 01:56:19 PM PDT 24 |
Mar 24 01:56:20 PM PDT 24 |
20353435 ps |
| T1619 |
/workspace/coverage/default/1.lc_ctrl_state_failure.3315010126 |
|
|
Mar 24 01:54:36 PM PDT 24 |
Mar 24 01:54:52 PM PDT 24 |
438586309 ps |
| T1620 |
/workspace/coverage/default/14.lc_ctrl_errors.3177342847 |
|
|
Mar 24 02:36:00 PM PDT 24 |
Mar 24 02:36:12 PM PDT 24 |
659566853 ps |
| T1621 |
/workspace/coverage/default/15.lc_ctrl_jtag_access.1524008467 |
|
|
Mar 24 01:55:43 PM PDT 24 |
Mar 24 01:55:56 PM PDT 24 |
6985282858 ps |
| T1622 |
/workspace/coverage/default/1.lc_ctrl_volatile_unlock_smoke.2486899640 |
|
|
Mar 24 01:54:34 PM PDT 24 |
Mar 24 01:54:35 PM PDT 24 |
11020251 ps |
| T1623 |
/workspace/coverage/default/13.lc_ctrl_jtag_prog_failure.1397141585 |
|
|
Mar 24 01:55:33 PM PDT 24 |
Mar 24 01:55:43 PM PDT 24 |
1246074383 ps |
| T1624 |
/workspace/coverage/default/45.lc_ctrl_errors.3763875242 |
|
|
Mar 24 02:37:10 PM PDT 24 |
Mar 24 02:37:21 PM PDT 24 |
279799125 ps |
| T1625 |
/workspace/coverage/default/14.lc_ctrl_prog_failure.3334144086 |
|
|
Mar 24 01:55:36 PM PDT 24 |
Mar 24 01:55:41 PM PDT 24 |
95304682 ps |
| T1626 |
/workspace/coverage/default/9.lc_ctrl_state_failure.795990833 |
|
|
Mar 24 01:55:15 PM PDT 24 |
Mar 24 01:55:43 PM PDT 24 |
415201721 ps |
| T1627 |
/workspace/coverage/default/5.lc_ctrl_jtag_smoke.301879061 |
|
|
Mar 24 02:34:58 PM PDT 24 |
Mar 24 02:35:02 PM PDT 24 |
121162722 ps |
| T1628 |
/workspace/coverage/default/27.lc_ctrl_sec_mubi.297962682 |
|
|
Mar 24 01:56:22 PM PDT 24 |
Mar 24 01:56:33 PM PDT 24 |
829467321 ps |
| T1629 |
/workspace/coverage/default/23.lc_ctrl_state_post_trans.2000126250 |
|
|
Mar 24 01:56:13 PM PDT 24 |
Mar 24 01:56:20 PM PDT 24 |
272632254 ps |
| T1630 |
/workspace/coverage/default/44.lc_ctrl_stress_all.3431976563 |
|
|
Mar 24 02:37:12 PM PDT 24 |
Mar 24 02:39:06 PM PDT 24 |
11921869209 ps |
| T1631 |
/workspace/coverage/default/33.lc_ctrl_stress_all.2064289513 |
|
|
Mar 24 02:36:42 PM PDT 24 |
Mar 24 02:38:46 PM PDT 24 |
4528904898 ps |
| T1632 |
/workspace/coverage/default/4.lc_ctrl_jtag_access.935994326 |
|
|
Mar 24 01:54:54 PM PDT 24 |
Mar 24 01:54:58 PM PDT 24 |
1195900773 ps |
| T1633 |
/workspace/coverage/default/31.lc_ctrl_smoke.2286255521 |
|
|
Mar 24 02:36:32 PM PDT 24 |
Mar 24 02:36:35 PM PDT 24 |
44319854 ps |
| T1634 |
/workspace/coverage/default/28.lc_ctrl_security_escalation.1677126936 |
|
|
Mar 24 02:36:23 PM PDT 24 |
Mar 24 02:36:34 PM PDT 24 |
516468590 ps |
| T1635 |
/workspace/coverage/default/41.lc_ctrl_alert_test.3866263511 |
|
|
Mar 24 02:36:58 PM PDT 24 |
Mar 24 02:37:00 PM PDT 24 |
64869845 ps |
| T1636 |
/workspace/coverage/default/28.lc_ctrl_smoke.2992022491 |
|
|
Mar 24 02:36:25 PM PDT 24 |
Mar 24 02:36:28 PM PDT 24 |
38503317 ps |
| T1637 |
/workspace/coverage/default/27.lc_ctrl_jtag_access.2013594906 |
|
|
Mar 24 02:36:21 PM PDT 24 |
Mar 24 02:36:24 PM PDT 24 |
311383011 ps |
| T1638 |
/workspace/coverage/default/11.lc_ctrl_sec_mubi.2302476535 |
|
|
Mar 24 01:55:29 PM PDT 24 |
Mar 24 01:55:40 PM PDT 24 |
224556828 ps |
| T1639 |
/workspace/coverage/default/17.lc_ctrl_sec_mubi.1830456124 |
|
|
Mar 24 01:55:50 PM PDT 24 |
Mar 24 01:56:09 PM PDT 24 |
843355980 ps |
| T1640 |
/workspace/coverage/default/44.lc_ctrl_prog_failure.2914149190 |
|
|
Mar 24 02:37:11 PM PDT 24 |
Mar 24 02:37:14 PM PDT 24 |
374447375 ps |
| T1641 |
/workspace/coverage/default/33.lc_ctrl_security_escalation.4138011880 |
|
|
Mar 24 02:36:43 PM PDT 24 |
Mar 24 02:36:52 PM PDT 24 |
222220205 ps |
| T1642 |
/workspace/coverage/default/35.lc_ctrl_volatile_unlock_smoke.2738071367 |
|
|
Mar 24 01:56:46 PM PDT 24 |
Mar 24 01:56:47 PM PDT 24 |
18467678 ps |
| T1643 |
/workspace/coverage/default/12.lc_ctrl_state_post_trans.4130439860 |
|
|
Mar 24 01:55:28 PM PDT 24 |
Mar 24 01:55:34 PM PDT 24 |
411516296 ps |
| T1644 |
/workspace/coverage/default/6.lc_ctrl_errors.1390054647 |
|
|
Mar 24 02:35:13 PM PDT 24 |
Mar 24 02:35:25 PM PDT 24 |
1419507211 ps |
| T1645 |
/workspace/coverage/default/25.lc_ctrl_volatile_unlock_smoke.3737765086 |
|
|
Mar 24 02:36:16 PM PDT 24 |
Mar 24 02:36:18 PM PDT 24 |
23349722 ps |
| T1646 |
/workspace/coverage/default/30.lc_ctrl_volatile_unlock_smoke.3543972320 |
|
|
Mar 24 02:36:31 PM PDT 24 |
Mar 24 02:36:32 PM PDT 24 |
42740859 ps |
| T1647 |
/workspace/coverage/default/15.lc_ctrl_sec_mubi.3313294221 |
|
|
Mar 24 01:55:43 PM PDT 24 |
Mar 24 01:56:02 PM PDT 24 |
1577143107 ps |
| T1648 |
/workspace/coverage/default/4.lc_ctrl_state_failure.1801989049 |
|
|
Mar 24 02:34:55 PM PDT 24 |
Mar 24 02:35:18 PM PDT 24 |
189549357 ps |
| T1649 |
/workspace/coverage/default/2.lc_ctrl_security_escalation.2258532356 |
|
|
Mar 24 02:34:49 PM PDT 24 |
Mar 24 02:35:05 PM PDT 24 |
2834758116 ps |
| T1650 |
/workspace/coverage/default/43.lc_ctrl_sec_token_mux.208567788 |
|
|
Mar 24 01:57:10 PM PDT 24 |
Mar 24 01:57:19 PM PDT 24 |
515161408 ps |
| T1651 |
/workspace/coverage/default/0.lc_ctrl_jtag_priority.611563521 |
|
|
Mar 24 01:54:34 PM PDT 24 |
Mar 24 01:54:42 PM PDT 24 |
321288454 ps |
| T1652 |
/workspace/coverage/default/16.lc_ctrl_volatile_unlock_smoke.116271237 |
|
|
Mar 24 02:35:40 PM PDT 24 |
Mar 24 02:35:41 PM PDT 24 |
60836669 ps |
| T1653 |
/workspace/coverage/default/18.lc_ctrl_stress_all.622893494 |
|
|
Mar 24 02:35:55 PM PDT 24 |
Mar 24 02:38:58 PM PDT 24 |
10176712998 ps |
| T1654 |
/workspace/coverage/default/17.lc_ctrl_jtag_errors.3142668642 |
|
|
Mar 24 02:35:48 PM PDT 24 |
Mar 24 02:36:39 PM PDT 24 |
3380486273 ps |
| T1655 |
/workspace/coverage/default/28.lc_ctrl_alert_test.4042167777 |
|
|
Mar 24 02:36:24 PM PDT 24 |
Mar 24 02:36:25 PM PDT 24 |
17627320 ps |
| T1656 |
/workspace/coverage/default/14.lc_ctrl_stress_all.4131900363 |
|
|
Mar 24 01:55:36 PM PDT 24 |
Mar 24 01:57:58 PM PDT 24 |
14881487324 ps |
| T1657 |
/workspace/coverage/default/27.lc_ctrl_errors.1209292199 |
|
|
Mar 24 01:56:22 PM PDT 24 |
Mar 24 01:56:35 PM PDT 24 |
1072557432 ps |
| T1658 |
/workspace/coverage/default/6.lc_ctrl_claim_transition_if.433032098 |
|
|
Mar 24 02:35:13 PM PDT 24 |
Mar 24 02:35:14 PM PDT 24 |
26132059 ps |
| T1659 |
/workspace/coverage/default/45.lc_ctrl_alert_test.1574857617 |
|
|
Mar 24 01:57:21 PM PDT 24 |
Mar 24 01:57:22 PM PDT 24 |
15363209 ps |
| T1660 |
/workspace/coverage/default/22.lc_ctrl_state_post_trans.1464437520 |
|
|
Mar 24 02:36:02 PM PDT 24 |
Mar 24 02:36:09 PM PDT 24 |
125743363 ps |
| T1661 |
/workspace/coverage/default/4.lc_ctrl_state_failure.1663442466 |
|
|
Mar 24 01:54:53 PM PDT 24 |
Mar 24 01:55:22 PM PDT 24 |
557427280 ps |
| T1662 |
/workspace/coverage/default/2.lc_ctrl_sec_token_digest.638791627 |
|
|
Mar 24 01:54:50 PM PDT 24 |
Mar 24 01:54:58 PM PDT 24 |
792530625 ps |
| T1663 |
/workspace/coverage/default/22.lc_ctrl_sec_token_digest.703518964 |
|
|
Mar 24 01:56:07 PM PDT 24 |
Mar 24 01:56:25 PM PDT 24 |
2659872287 ps |
| T1664 |
/workspace/coverage/default/26.lc_ctrl_alert_test.722926545 |
|
|
Mar 24 01:56:18 PM PDT 24 |
Mar 24 01:56:19 PM PDT 24 |
19611268 ps |
| T1665 |
/workspace/coverage/default/18.lc_ctrl_jtag_errors.246251960 |
|
|
Mar 24 01:55:52 PM PDT 24 |
Mar 24 01:57:52 PM PDT 24 |
17481075630 ps |
| T1666 |
/workspace/coverage/default/3.lc_ctrl_jtag_state_failure.3123637113 |
|
|
Mar 24 02:34:58 PM PDT 24 |
Mar 24 02:35:50 PM PDT 24 |
4662888023 ps |
| T1667 |
/workspace/coverage/default/41.lc_ctrl_sec_token_mux.680526052 |
|
|
Mar 24 01:57:03 PM PDT 24 |
Mar 24 01:57:15 PM PDT 24 |
624414091 ps |
| T1668 |
/workspace/coverage/default/2.lc_ctrl_prog_failure.2072717923 |
|
|
Mar 24 01:54:51 PM PDT 24 |
Mar 24 01:54:54 PM PDT 24 |
139495348 ps |
| T1669 |
/workspace/coverage/default/33.lc_ctrl_errors.540161654 |
|
|
Mar 24 01:56:44 PM PDT 24 |
Mar 24 01:56:58 PM PDT 24 |
1541272003 ps |
| T1670 |
/workspace/coverage/default/35.lc_ctrl_jtag_access.710929697 |
|
|
Mar 24 02:36:44 PM PDT 24 |
Mar 24 02:36:50 PM PDT 24 |
290518129 ps |
| T1671 |
/workspace/coverage/default/1.lc_ctrl_jtag_regwen_during_op.2845568473 |
|
|
Mar 24 02:34:43 PM PDT 24 |
Mar 24 02:34:52 PM PDT 24 |
600482331 ps |
| T1672 |
/workspace/coverage/default/0.lc_ctrl_jtag_state_failure.1545871869 |
|
|
Mar 24 02:34:42 PM PDT 24 |
Mar 24 02:36:09 PM PDT 24 |
4842909639 ps |
| T1673 |
/workspace/coverage/default/9.lc_ctrl_sec_mubi.1431735377 |
|
|
Mar 24 01:55:17 PM PDT 24 |
Mar 24 01:55:32 PM PDT 24 |
360122446 ps |
| T1674 |
/workspace/coverage/default/22.lc_ctrl_security_escalation.4287103188 |
|
|
Mar 24 01:56:06 PM PDT 24 |
Mar 24 01:56:16 PM PDT 24 |
639223627 ps |
| T1675 |
/workspace/coverage/default/24.lc_ctrl_sec_token_mux.523044328 |
|
|
Mar 24 01:56:18 PM PDT 24 |
Mar 24 01:56:28 PM PDT 24 |
1557465311 ps |
| T1676 |
/workspace/coverage/default/3.lc_ctrl_errors.2051494122 |
|
|
Mar 24 02:34:49 PM PDT 24 |
Mar 24 02:35:06 PM PDT 24 |
1062045171 ps |
| T1677 |
/workspace/coverage/default/6.lc_ctrl_jtag_prog_failure.4284842061 |
|
|
Mar 24 02:35:04 PM PDT 24 |
Mar 24 02:35:12 PM PDT 24 |
1147533506 ps |
| T1678 |
/workspace/coverage/default/27.lc_ctrl_prog_failure.2632482544 |
|
|
Mar 24 01:56:24 PM PDT 24 |
Mar 24 01:56:26 PM PDT 24 |
43158294 ps |
| T1679 |
/workspace/coverage/default/1.lc_ctrl_jtag_smoke.3234429804 |
|
|
Mar 24 02:34:46 PM PDT 24 |
Mar 24 02:34:48 PM PDT 24 |
570909317 ps |
| T1680 |
/workspace/coverage/default/40.lc_ctrl_stress_all.3438074720 |
|
|
Mar 24 02:37:00 PM PDT 24 |
Mar 24 02:40:13 PM PDT 24 |
5586242059 ps |
| T1681 |
/workspace/coverage/default/39.lc_ctrl_security_escalation.161933180 |
|
|
Mar 24 02:36:56 PM PDT 24 |
Mar 24 02:37:10 PM PDT 24 |
559444127 ps |
| T1682 |
/workspace/coverage/default/18.lc_ctrl_volatile_unlock_smoke.3732993134 |
|
|
Mar 24 01:55:46 PM PDT 24 |
Mar 24 01:55:47 PM PDT 24 |
163800345 ps |
| T1683 |
/workspace/coverage/default/14.lc_ctrl_prog_failure.559080698 |
|
|
Mar 24 02:35:36 PM PDT 24 |
Mar 24 02:35:38 PM PDT 24 |
45302494 ps |
| T1684 |
/workspace/coverage/default/30.lc_ctrl_jtag_access.1884584418 |
|
|
Mar 24 02:36:35 PM PDT 24 |
Mar 24 02:36:47 PM PDT 24 |
2070354262 ps |
| T1685 |
/workspace/coverage/default/17.lc_ctrl_sec_token_mux.2490370136 |
|
|
Mar 24 01:55:48 PM PDT 24 |
Mar 24 01:55:58 PM PDT 24 |
485666791 ps |
| T1686 |
/workspace/coverage/default/36.lc_ctrl_state_failure.2506726879 |
|
|
Mar 24 02:36:45 PM PDT 24 |
Mar 24 02:37:21 PM PDT 24 |
506834534 ps |
| T1687 |
/workspace/coverage/default/18.lc_ctrl_sec_token_mux.1154789819 |
|
|
Mar 24 01:55:54 PM PDT 24 |
Mar 24 01:56:06 PM PDT 24 |
337947450 ps |
| T1688 |
/workspace/coverage/default/17.lc_ctrl_jtag_access.3322768956 |
|
|
Mar 24 02:35:50 PM PDT 24 |
Mar 24 02:35:58 PM PDT 24 |
262157894 ps |
| T1689 |
/workspace/coverage/default/21.lc_ctrl_smoke.31878676 |
|
|
Mar 24 01:56:02 PM PDT 24 |
Mar 24 01:56:08 PM PDT 24 |
207999734 ps |
| T1690 |
/workspace/coverage/default/25.lc_ctrl_sec_mubi.2700017386 |
|
|
Mar 24 02:36:21 PM PDT 24 |
Mar 24 02:36:34 PM PDT 24 |
264804849 ps |
| T1691 |
/workspace/coverage/default/34.lc_ctrl_jtag_access.376578613 |
|
|
Mar 24 02:36:42 PM PDT 24 |
Mar 24 02:36:50 PM PDT 24 |
3228674445 ps |
| T1692 |
/workspace/coverage/default/12.lc_ctrl_smoke.3380084566 |
|
|
Mar 24 02:35:29 PM PDT 24 |
Mar 24 02:35:31 PM PDT 24 |
96904934 ps |
| T1693 |
/workspace/coverage/default/26.lc_ctrl_prog_failure.3486310702 |
|
|
Mar 24 02:36:23 PM PDT 24 |
Mar 24 02:36:25 PM PDT 24 |
84952909 ps |
| T1694 |
/workspace/coverage/default/5.lc_ctrl_smoke.1387202778 |
|
|
Mar 24 01:54:57 PM PDT 24 |
Mar 24 01:55:00 PM PDT 24 |
60327337 ps |
| T1695 |
/workspace/coverage/default/19.lc_ctrl_state_post_trans.2771152929 |
|
|
Mar 24 01:55:52 PM PDT 24 |
Mar 24 01:55:59 PM PDT 24 |
151782953 ps |
| T1696 |
/workspace/coverage/default/8.lc_ctrl_jtag_priority.4015868891 |
|
|
Mar 24 01:55:08 PM PDT 24 |
Mar 24 01:55:27 PM PDT 24 |
2948515744 ps |
| T1697 |
/workspace/coverage/default/38.lc_ctrl_sec_token_digest.312178944 |
|
|
Mar 24 01:57:01 PM PDT 24 |
Mar 24 01:57:10 PM PDT 24 |
792740396 ps |
| T1698 |
/workspace/coverage/default/21.lc_ctrl_sec_mubi.1052597475 |
|
|
Mar 24 02:36:04 PM PDT 24 |
Mar 24 02:36:21 PM PDT 24 |
1323584899 ps |
| T1699 |
/workspace/coverage/default/25.lc_ctrl_volatile_unlock_smoke.132682684 |
|
|
Mar 24 01:56:19 PM PDT 24 |
Mar 24 01:56:20 PM PDT 24 |
81016765 ps |
| T1700 |
/workspace/coverage/default/39.lc_ctrl_prog_failure.1436012134 |
|
|
Mar 24 01:56:59 PM PDT 24 |
Mar 24 01:57:03 PM PDT 24 |
87402874 ps |
| T1701 |
/workspace/coverage/default/0.lc_ctrl_jtag_state_post_trans.3213110077 |
|
|
Mar 24 02:34:49 PM PDT 24 |
Mar 24 02:35:03 PM PDT 24 |
2482368623 ps |
| T1702 |
/workspace/coverage/default/4.lc_ctrl_sec_mubi.1494378069 |
|
|
Mar 24 01:54:49 PM PDT 24 |
Mar 24 01:55:07 PM PDT 24 |
1092367215 ps |
| T1703 |
/workspace/coverage/default/6.lc_ctrl_prog_failure.239933607 |
|
|
Mar 24 02:35:03 PM PDT 24 |
Mar 24 02:35:07 PM PDT 24 |
78000196 ps |
| T1704 |
/workspace/coverage/default/17.lc_ctrl_errors.3398261906 |
|
|
Mar 24 02:35:48 PM PDT 24 |
Mar 24 02:36:01 PM PDT 24 |
283279525 ps |
| T1705 |
/workspace/coverage/default/25.lc_ctrl_state_failure.789591181 |
|
|
Mar 24 01:56:18 PM PDT 24 |
Mar 24 01:56:45 PM PDT 24 |
290078958 ps |
| T1706 |
/workspace/coverage/default/31.lc_ctrl_jtag_access.1072488373 |
|
|
Mar 24 02:36:31 PM PDT 24 |
Mar 24 02:36:37 PM PDT 24 |
2499946649 ps |
| T1707 |
/workspace/coverage/default/45.lc_ctrl_smoke.3669097508 |
|
|
Mar 24 01:57:14 PM PDT 24 |
Mar 24 01:57:18 PM PDT 24 |
55360965 ps |
| T135 |
/workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_aliasing.3217620084 |
|
|
Mar 24 12:42:21 PM PDT 24 |
Mar 24 12:42:32 PM PDT 24 |
2449687530 ps |
| T143 |
/workspace/coverage/cover_reg_top/13.lc_ctrl_same_csr_outstanding.835549529 |
|
|
Mar 24 01:05:16 PM PDT 24 |
Mar 24 01:05:19 PM PDT 24 |
55618653 ps |
| T178 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_alert_test.3292748424 |
|
|
Mar 24 12:42:39 PM PDT 24 |
Mar 24 12:42:40 PM PDT 24 |
144917890 ps |
| T136 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_csr_hw_reset.3537683896 |
|
|
Mar 24 01:04:35 PM PDT 24 |
Mar 24 01:04:36 PM PDT 24 |
200080649 ps |
| T137 |
/workspace/coverage/cover_reg_top/7.lc_ctrl_csr_rw.1217751882 |
|
|
Mar 24 01:05:02 PM PDT 24 |
Mar 24 01:05:05 PM PDT 24 |
14761644 ps |
| T181 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_same_csr_outstanding.2905441993 |
|
|
Mar 24 12:42:36 PM PDT 24 |
Mar 24 12:42:38 PM PDT 24 |
100545685 ps |
| T129 |
/workspace/coverage/cover_reg_top/19.lc_ctrl_tl_errors.4111020192 |
|
|
Mar 24 12:42:37 PM PDT 24 |
Mar 24 12:42:40 PM PDT 24 |
88152808 ps |
| T1708 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_csr_bit_bash.2633721059 |
|
|
Mar 24 12:42:06 PM PDT 24 |
Mar 24 12:42:08 PM PDT 24 |
27310894 ps |
| T130 |
/workspace/coverage/cover_reg_top/12.lc_ctrl_csr_mem_rw_with_rand_reset.2327359060 |
|
|
Mar 24 01:05:07 PM PDT 24 |
Mar 24 01:05:10 PM PDT 24 |
31145076 ps |
| T131 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_tl_intg_err.604487193 |
|
|
Mar 24 12:42:07 PM PDT 24 |
Mar 24 12:42:10 PM PDT 24 |
171660328 ps |
| T254 |
/workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_same_csr_outstanding.2141893245 |
|
|
Mar 24 12:42:31 PM PDT 24 |
Mar 24 12:42:33 PM PDT 24 |
90093514 ps |
| T179 |
/workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_alert_test.2907591551 |
|
|
Mar 24 01:04:56 PM PDT 24 |
Mar 24 01:04:58 PM PDT 24 |
43568781 ps |
| T132 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_tl_intg_err.3820947310 |
|
|
Mar 24 12:42:32 PM PDT 24 |
Mar 24 12:42:37 PM PDT 24 |
127529856 ps |
| T176 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_hw_reset.3820280014 |
|
|
Mar 24 12:42:07 PM PDT 24 |
Mar 24 12:42:10 PM PDT 24 |
239411266 ps |
| T1709 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_csr_aliasing.170563052 |
|
|
Mar 24 12:42:17 PM PDT 24 |
Mar 24 12:42:18 PM PDT 24 |
348352089 ps |
| T134 |
/workspace/coverage/cover_reg_top/11.lc_ctrl_tl_errors.155429319 |
|
|
Mar 24 01:05:07 PM PDT 24 |
Mar 24 01:05:12 PM PDT 24 |
47594283 ps |
| T180 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_bit_bash.1624933885 |
|
|
Mar 24 01:05:01 PM PDT 24 |
Mar 24 01:05:26 PM PDT 24 |
952429266 ps |
| T1710 |
/workspace/coverage/cover_reg_top/15.lc_ctrl_csr_rw.2581752620 |
|
|
Mar 24 12:42:45 PM PDT 24 |
Mar 24 12:42:46 PM PDT 24 |
48076013 ps |
| T1711 |
/workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_alert_test.1062949682 |
|
|
Mar 24 01:04:48 PM PDT 24 |
Mar 24 01:04:50 PM PDT 24 |
56385064 ps |
| T177 |
/workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_csr_aliasing.437979403 |
|
|
Mar 24 01:04:48 PM PDT 24 |
Mar 24 01:04:53 PM PDT 24 |
433614224 ps |
| T138 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.2812739770 |
|
|
Mar 24 01:04:31 PM PDT 24 |
Mar 24 01:04:35 PM PDT 24 |
442074608 ps |
| T1712 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_hw_reset.3253744281 |
|
|
Mar 24 12:42:33 PM PDT 24 |
Mar 24 12:42:36 PM PDT 24 |
50650134 ps |
| T255 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_same_csr_outstanding.2140894084 |
|
|
Mar 24 12:42:17 PM PDT 24 |
Mar 24 12:42:18 PM PDT 24 |
63765711 ps |
| T139 |
/workspace/coverage/cover_reg_top/6.lc_ctrl_csr_mem_rw_with_rand_reset.1461025224 |
|
|
Mar 24 12:42:10 PM PDT 24 |
Mar 24 12:42:11 PM PDT 24 |
71970791 ps |
| T141 |
/workspace/coverage/cover_reg_top/12.lc_ctrl_tl_errors.471272081 |
|
|
Mar 24 12:42:38 PM PDT 24 |
Mar 24 12:42:41 PM PDT 24 |
1694931850 ps |
| T142 |
/workspace/coverage/cover_reg_top/16.lc_ctrl_tl_errors.3518800595 |
|
|
Mar 24 12:42:38 PM PDT 24 |
Mar 24 12:42:41 PM PDT 24 |
203803272 ps |
| T1713 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_csr_aliasing.1804325237 |
|
|
Mar 24 12:42:23 PM PDT 24 |
Mar 24 12:42:24 PM PDT 24 |
94360117 ps |
| T1714 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_alert_test.2281296053 |
|
|
Mar 24 12:42:05 PM PDT 24 |
Mar 24 12:42:06 PM PDT 24 |
279422260 ps |
| T133 |
/workspace/coverage/cover_reg_top/10.lc_ctrl_tl_intg_err.3246182906 |
|
|
Mar 24 12:42:40 PM PDT 24 |
Mar 24 12:42:43 PM PDT 24 |
565552610 ps |
| T1715 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_csr_rw.4162579474 |
|
|
Mar 24 01:04:36 PM PDT 24 |
Mar 24 01:04:37 PM PDT 24 |
15621010 ps |
| T256 |
/workspace/coverage/cover_reg_top/11.lc_ctrl_same_csr_outstanding.1030946851 |
|
|
Mar 24 12:42:25 PM PDT 24 |
Mar 24 12:42:26 PM PDT 24 |
58339515 ps |
| T162 |
/workspace/coverage/cover_reg_top/18.lc_ctrl_tl_errors.3578688379 |
|
|
Mar 24 12:42:39 PM PDT 24 |
Mar 24 12:42:45 PM PDT 24 |
408623914 ps |
| T1716 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.1334642534 |
|
|
Mar 24 01:04:24 PM PDT 24 |
Mar 24 01:04:28 PM PDT 24 |
1014133457 ps |
| T1717 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_aliasing.1163850547 |
|
|
Mar 24 01:04:23 PM PDT 24 |
Mar 24 01:04:30 PM PDT 24 |
499708209 ps |
| T236 |
/workspace/coverage/cover_reg_top/16.lc_ctrl_csr_rw.1706663927 |
|
|
Mar 24 01:05:12 PM PDT 24 |
Mar 24 01:05:15 PM PDT 24 |
19389774 ps |
| T257 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_same_csr_outstanding.437841338 |
|
|
Mar 24 01:04:35 PM PDT 24 |
Mar 24 01:04:36 PM PDT 24 |
155111651 ps |
| T1718 |
/workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_alert_test.3902964835 |
|
|
Mar 24 01:05:05 PM PDT 24 |
Mar 24 01:05:09 PM PDT 24 |
58561252 ps |
| T1719 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_csr_aliasing.3397191637 |
|
|
Mar 24 01:04:45 PM PDT 24 |
Mar 24 01:04:47 PM PDT 24 |
59603992 ps |
| T1720 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_tl_errors.725563649 |
|
|
Mar 24 12:42:07 PM PDT 24 |
Mar 24 12:42:10 PM PDT 24 |
55918284 ps |
| T1721 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_rw.1993573885 |
|
|
Mar 24 01:04:30 PM PDT 24 |
Mar 24 01:04:33 PM PDT 24 |
102906988 ps |
| T1722 |
/workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_rw.951677985 |
|
|
Mar 24 12:42:30 PM PDT 24 |
Mar 24 12:42:32 PM PDT 24 |
200639603 ps |
| T1723 |
/workspace/coverage/cover_reg_top/10.lc_ctrl_csr_mem_rw_with_rand_reset.2734265652 |
|
|
Mar 24 12:42:30 PM PDT 24 |
Mar 24 12:42:31 PM PDT 24 |
42799844 ps |
| T1724 |
/workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_hw_reset.2461681893 |
|
|
Mar 24 12:42:19 PM PDT 24 |
Mar 24 12:42:21 PM PDT 24 |
525122960 ps |
| T1725 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_csr_mem_rw_with_rand_reset.4014948251 |
|
|
Mar 24 12:42:33 PM PDT 24 |
Mar 24 12:42:36 PM PDT 24 |
42947900 ps |
| T258 |
/workspace/coverage/cover_reg_top/18.lc_ctrl_same_csr_outstanding.1666094813 |
|
|
Mar 24 12:42:31 PM PDT 24 |
Mar 24 12:42:32 PM PDT 24 |
53900264 ps |
| T1726 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_csr_hw_reset.1992556175 |
|
|
Mar 24 01:04:43 PM PDT 24 |
Mar 24 01:04:45 PM PDT 24 |
71227799 ps |
| T259 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_same_csr_outstanding.3459018333 |
|
|
Mar 24 01:04:37 PM PDT 24 |
Mar 24 01:04:39 PM PDT 24 |
199556154 ps |
| T272 |
/workspace/coverage/cover_reg_top/11.lc_ctrl_tl_intg_err.1581130483 |
|
|
Mar 24 12:42:28 PM PDT 24 |
Mar 24 12:42:31 PM PDT 24 |
82354641 ps |
| T1727 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_csr_mem_rw_with_rand_reset.732366425 |
|
|
Mar 24 01:04:29 PM PDT 24 |
Mar 24 01:04:31 PM PDT 24 |
62288271 ps |
| T1728 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_bit_bash.1385454282 |
|
|
Mar 24 12:42:06 PM PDT 24 |
Mar 24 12:42:18 PM PDT 24 |
5071541699 ps |
| T1729 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_aliasing.3673860419 |
|
|
Mar 24 12:42:15 PM PDT 24 |
Mar 24 12:42:22 PM PDT 24 |
7930092096 ps |
| T1730 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_csr_bit_bash.510680736 |
|
|
Mar 24 01:04:46 PM PDT 24 |
Mar 24 01:04:48 PM PDT 24 |
68720542 ps |
| T1731 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_tl_errors.3897177924 |
|
|
Mar 24 12:42:07 PM PDT 24 |
Mar 24 12:42:10 PM PDT 24 |
84925532 ps |
| T1732 |
/workspace/coverage/cover_reg_top/11.lc_ctrl_csr_mem_rw_with_rand_reset.1646495578 |
|
|
Mar 24 12:42:30 PM PDT 24 |
Mar 24 12:42:33 PM PDT 24 |
18711581 ps |
| T1733 |
/workspace/coverage/cover_reg_top/10.lc_ctrl_tl_errors.1144818500 |
|
|
Mar 24 12:42:33 PM PDT 24 |
Mar 24 12:42:36 PM PDT 24 |
78119879 ps |
| T237 |
/workspace/coverage/cover_reg_top/5.lc_ctrl_csr_rw.564526778 |
|
|
Mar 24 12:42:24 PM PDT 24 |
Mar 24 12:42:26 PM PDT 24 |
19027492 ps |
| T1734 |
/workspace/coverage/cover_reg_top/5.lc_ctrl_csr_rw.779407420 |
|
|
Mar 24 01:04:50 PM PDT 24 |
Mar 24 01:04:52 PM PDT 24 |
72989010 ps |
| T1735 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_csr_hw_reset.2529973528 |
|
|
Mar 24 12:42:10 PM PDT 24 |
Mar 24 12:42:11 PM PDT 24 |
15265577 ps |
| T260 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_same_csr_outstanding.2646297827 |
|
|
Mar 24 01:05:06 PM PDT 24 |
Mar 24 01:05:09 PM PDT 24 |
214382283 ps |
| T1736 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_csr_bit_bash.2378599970 |
|
|
Mar 24 01:04:34 PM PDT 24 |
Mar 24 01:04:37 PM PDT 24 |
379381744 ps |
| T1737 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_rw.3745195312 |
|
|
Mar 24 12:42:17 PM PDT 24 |
Mar 24 12:42:19 PM PDT 24 |
207360127 ps |
| T1738 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_hw_reset.1915901401 |
|
|
Mar 24 01:04:35 PM PDT 24 |
Mar 24 01:04:39 PM PDT 24 |
121425576 ps |
| T1739 |
/workspace/coverage/cover_reg_top/16.lc_ctrl_tl_errors.4264369026 |
|
|
Mar 24 01:05:15 PM PDT 24 |
Mar 24 01:05:20 PM PDT 24 |
70614592 ps |
| T164 |
/workspace/coverage/cover_reg_top/14.lc_ctrl_tl_intg_err.2544824137 |
|
|
Mar 24 01:05:16 PM PDT 24 |
Mar 24 01:05:19 PM PDT 24 |
168326593 ps |
| T152 |
/workspace/coverage/cover_reg_top/6.lc_ctrl_tl_intg_err.1934617408 |
|
|
Mar 24 12:42:26 PM PDT 24 |
Mar 24 12:42:29 PM PDT 24 |
69689905 ps |
| T144 |
/workspace/coverage/cover_reg_top/16.lc_ctrl_tl_intg_err.358743605 |
|
|
Mar 24 12:42:34 PM PDT 24 |
Mar 24 12:42:39 PM PDT 24 |
746289939 ps |
| T1740 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_hw_reset.405407251 |
|
|
Mar 24 01:04:20 PM PDT 24 |
Mar 24 01:04:22 PM PDT 24 |
257415720 ps |
| T1741 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_csr_bit_bash.3851013125 |
|
|
Mar 24 12:42:04 PM PDT 24 |
Mar 24 12:42:06 PM PDT 24 |
18121002 ps |
| T1742 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_rw.3912618490 |
|
|
Mar 24 12:42:22 PM PDT 24 |
Mar 24 12:42:27 PM PDT 24 |
980116831 ps |
| T1743 |
/workspace/coverage/cover_reg_top/6.lc_ctrl_tl_errors.2537529429 |
|
|
Mar 24 01:04:53 PM PDT 24 |
Mar 24 01:04:56 PM PDT 24 |
448626125 ps |
| T1744 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_aliasing.3088545019 |
|
|
Mar 24 12:42:23 PM PDT 24 |
Mar 24 12:42:43 PM PDT 24 |
3327494434 ps |
| T1745 |
/workspace/coverage/cover_reg_top/5.lc_ctrl_same_csr_outstanding.2417212111 |
|
|
Mar 24 12:42:24 PM PDT 24 |
Mar 24 12:42:26 PM PDT 24 |
33510337 ps |
| T238 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_csr_rw.980416739 |
|
|
Mar 24 01:04:24 PM PDT 24 |
Mar 24 01:04:26 PM PDT 24 |
54233405 ps |
| T1746 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_csr_mem_rw_with_rand_reset.744029474 |
|
|
Mar 24 01:04:29 PM PDT 24 |
Mar 24 01:04:31 PM PDT 24 |
458835562 ps |
| T1747 |
/workspace/coverage/cover_reg_top/15.lc_ctrl_tl_errors.2895938950 |
|
|
Mar 24 12:42:38 PM PDT 24 |
Mar 24 12:42:40 PM PDT 24 |
209456201 ps |
| T1748 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_same_csr_outstanding.3339789136 |
|
|
Mar 24 12:42:04 PM PDT 24 |
Mar 24 12:42:05 PM PDT 24 |
88402530 ps |
| T1749 |
/workspace/coverage/cover_reg_top/19.lc_ctrl_csr_rw.3345139334 |
|
|
Mar 24 01:05:20 PM PDT 24 |
Mar 24 01:05:21 PM PDT 24 |
16279308 ps |
| T149 |
/workspace/coverage/cover_reg_top/7.lc_ctrl_tl_intg_err.2265130910 |
|
|
Mar 24 12:42:22 PM PDT 24 |
Mar 24 12:42:24 PM PDT 24 |
58150391 ps |
| T1750 |
/workspace/coverage/cover_reg_top/18.lc_ctrl_csr_mem_rw_with_rand_reset.4056791278 |
|
|
Mar 24 12:42:32 PM PDT 24 |
Mar 24 12:42:35 PM PDT 24 |
22746037 ps |
| T1751 |
/workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_aliasing.2070360486 |
|
|
Mar 24 12:42:35 PM PDT 24 |
Mar 24 12:42:39 PM PDT 24 |
895603034 ps |
| T239 |
/workspace/coverage/cover_reg_top/6.lc_ctrl_csr_rw.2192832981 |
|
|
Mar 24 01:04:53 PM PDT 24 |
Mar 24 01:04:54 PM PDT 24 |
66424856 ps |
| T1752 |
/workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_aliasing.625607972 |
|
|
Mar 24 12:42:24 PM PDT 24 |
Mar 24 12:42:36 PM PDT 24 |
577889804 ps |
| T156 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_tl_intg_err.527895651 |
|
|
Mar 24 01:05:01 PM PDT 24 |
Mar 24 01:05:06 PM PDT 24 |
199134533 ps |
| T1753 |
/workspace/coverage/cover_reg_top/12.lc_ctrl_same_csr_outstanding.3120154423 |
|
|
Mar 24 12:42:45 PM PDT 24 |
Mar 24 12:42:46 PM PDT 24 |
16322674 ps |
| T1754 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_alert_test.1283934850 |
|
|
Mar 24 12:42:19 PM PDT 24 |
Mar 24 12:42:20 PM PDT 24 |
89654980 ps |
| T1755 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_aliasing.4208649107 |
|
|
Mar 24 12:42:15 PM PDT 24 |
Mar 24 12:42:30 PM PDT 24 |
2393304111 ps |
| T1756 |
/workspace/coverage/cover_reg_top/8.lc_ctrl_tl_errors.1298481093 |
|
|
Mar 24 01:05:04 PM PDT 24 |
Mar 24 01:05:10 PM PDT 24 |
176483278 ps |
| T1757 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_csr_mem_rw_with_rand_reset.1673502910 |
|
|
Mar 24 12:42:22 PM PDT 24 |
Mar 24 12:42:23 PM PDT 24 |
30207558 ps |
| T1758 |
/workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.3693836697 |
|
|
Mar 24 12:42:17 PM PDT 24 |
Mar 24 12:42:23 PM PDT 24 |
176379415 ps |
| T1759 |
/workspace/coverage/cover_reg_top/17.lc_ctrl_tl_errors.1860331796 |
|
|
Mar 24 12:42:34 PM PDT 24 |
Mar 24 12:42:36 PM PDT 24 |
24523573 ps |
| T1760 |
/workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_alert_test.3287274854 |
|
|
Mar 24 12:42:34 PM PDT 24 |
Mar 24 12:42:35 PM PDT 24 |
40255282 ps |
| T1761 |
/workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_aliasing.1917529947 |
|
|
Mar 24 01:04:50 PM PDT 24 |
Mar 24 01:04:56 PM PDT 24 |
729677003 ps |
| T1762 |
/workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_same_csr_outstanding.3950599963 |
|
|
Mar 24 12:42:20 PM PDT 24 |
Mar 24 12:42:22 PM PDT 24 |
74881215 ps |
| T157 |
/workspace/coverage/cover_reg_top/13.lc_ctrl_tl_intg_err.2103189298 |
|
|
Mar 24 01:05:07 PM PDT 24 |
Mar 24 01:05:11 PM PDT 24 |
312524307 ps |
| T1763 |
/workspace/coverage/cover_reg_top/13.lc_ctrl_csr_mem_rw_with_rand_reset.1982615673 |
|
|
Mar 24 12:42:44 PM PDT 24 |
Mar 24 12:42:45 PM PDT 24 |
40418542 ps |
| T1764 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_csr_hw_reset.534534699 |
|
|
Mar 24 01:04:26 PM PDT 24 |
Mar 24 01:04:28 PM PDT 24 |
29456798 ps |
| T1765 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_bit_bash.1221539674 |
|
|
Mar 24 01:04:41 PM PDT 24 |
Mar 24 01:04:46 PM PDT 24 |
1687777075 ps |
| T161 |
/workspace/coverage/cover_reg_top/16.lc_ctrl_tl_intg_err.529603286 |
|
|
Mar 24 01:05:16 PM PDT 24 |
Mar 24 01:05:21 PM PDT 24 |
113848919 ps |
| T155 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_tl_intg_err.420156133 |
|
|
Mar 24 01:04:31 PM PDT 24 |
Mar 24 01:04:35 PM PDT 24 |
210236791 ps |
| T1766 |
/workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_rw.3406755023 |
|
|
Mar 24 12:42:26 PM PDT 24 |
Mar 24 12:42:29 PM PDT 24 |
241687595 ps |
| T1767 |
/workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.554620755 |
|
|
Mar 24 01:05:05 PM PDT 24 |
Mar 24 01:05:09 PM PDT 24 |
459786622 ps |
| T1768 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_csr_hw_reset.2313498205 |
|
|
Mar 24 12:42:36 PM PDT 24 |
Mar 24 12:42:37 PM PDT 24 |
30886965 ps |
| T1769 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_tl_errors.584164301 |
|
|
Mar 24 01:04:36 PM PDT 24 |
Mar 24 01:04:38 PM PDT 24 |
29511639 ps |
| T1770 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_csr_hw_reset.3943127585 |
|
|
Mar 24 12:42:29 PM PDT 24 |
Mar 24 12:42:31 PM PDT 24 |
17026443 ps |
| T159 |
/workspace/coverage/cover_reg_top/5.lc_ctrl_tl_intg_err.1287320239 |
|
|
Mar 24 12:42:15 PM PDT 24 |
Mar 24 12:42:19 PM PDT 24 |
143713729 ps |
| T1771 |
/workspace/coverage/cover_reg_top/12.lc_ctrl_csr_mem_rw_with_rand_reset.2782702288 |
|
|
Mar 24 12:42:39 PM PDT 24 |
Mar 24 12:42:41 PM PDT 24 |
20225080 ps |
| T1772 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_rw.1403486854 |
|
|
Mar 24 01:04:35 PM PDT 24 |
Mar 24 01:04:37 PM PDT 24 |
126537696 ps |
| T1773 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_same_csr_outstanding.3995219032 |
|
|
Mar 24 12:42:48 PM PDT 24 |
Mar 24 12:42:49 PM PDT 24 |
21683942 ps |
| T240 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_csr_aliasing.2830110646 |
|
|
Mar 24 01:04:27 PM PDT 24 |
Mar 24 01:04:30 PM PDT 24 |
47837986 ps |
| T241 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_csr_hw_reset.3207769448 |
|
|
Mar 24 12:42:15 PM PDT 24 |
Mar 24 12:42:17 PM PDT 24 |
30244433 ps |
| T1774 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_bit_bash.1992818508 |
|
|
Mar 24 12:42:07 PM PDT 24 |
Mar 24 12:42:24 PM PDT 24 |
734438201 ps |
| T1775 |
/workspace/coverage/cover_reg_top/13.lc_ctrl_csr_mem_rw_with_rand_reset.2338721268 |
|
|
Mar 24 01:05:12 PM PDT 24 |
Mar 24 01:05:15 PM PDT 24 |
47989922 ps |
| T1776 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_aliasing.4290977068 |
|
|
Mar 24 01:04:36 PM PDT 24 |
Mar 24 01:04:46 PM PDT 24 |
5611644114 ps |
| T1777 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_aliasing.961071670 |
|
|
Mar 24 12:42:12 PM PDT 24 |
Mar 24 12:42:16 PM PDT 24 |
260598892 ps |
| T171 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_tl_intg_err.1576295050 |
|
|
Mar 24 12:42:06 PM PDT 24 |
Mar 24 12:42:09 PM PDT 24 |
229603290 ps |
| T1778 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_same_csr_outstanding.692476618 |
|
|
Mar 24 01:04:40 PM PDT 24 |
Mar 24 01:04:42 PM PDT 24 |
21916116 ps |
| T1779 |
/workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_hw_reset.2631398206 |
|
|
Mar 24 12:42:28 PM PDT 24 |
Mar 24 12:42:30 PM PDT 24 |
57076804 ps |
| T1780 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_same_csr_outstanding.123202702 |
|
|
Mar 24 12:42:07 PM PDT 24 |
Mar 24 12:42:08 PM PDT 24 |
86412235 ps |
| T1781 |
/workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_same_csr_outstanding.705884144 |
|
|
Mar 24 12:42:37 PM PDT 24 |
Mar 24 12:42:38 PM PDT 24 |
63980709 ps |
| T1782 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_csr_aliasing.1694537505 |
|
|
Mar 24 01:04:47 PM PDT 24 |
Mar 24 01:04:49 PM PDT 24 |
21401092 ps |
| T242 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_csr_rw.1585658676 |
|
|
Mar 24 12:42:22 PM PDT 24 |
Mar 24 12:42:23 PM PDT 24 |
12451531 ps |
| T1783 |
/workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_bit_bash.3565405970 |
|
|
Mar 24 12:42:29 PM PDT 24 |
Mar 24 12:42:34 PM PDT 24 |
1493959916 ps |