Group : dv_base_reg_pkg::mubi_cov#(4,32'b00000000000000000000000000000101,32'b00000000000000000000000000001010)::mubi_cg
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Group : dv_base_reg_pkg::mubi_cov#(4,32'b00000000000000000000000000000101,32'b00000000000000000000000000001010)::mubi_cg
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 90.00 1 100 1 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_dv_base_reg_0/dv_base_mubi_cov.sv

5 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
mubi4_cov_of_tb.dut.u_otp_lc_data_i_rma_token_valid_if 83.33 1 100 1 64 64
mubi4_cov_of_tb.dut.u_otp_lc_data_i_secrets_valid_if 83.33 1 100 1 64 64
mubi4_cov_of_tb.dut.u_otp_lc_data_i_test_tokens_valid_if 83.33 1 100 1 64 64
mubi4_cov_of_tb.dut.u_lc_clk_byp_ack_i_if 100.00 1 100 1 64 64
mubi4_cov_of_tb.dut.u_lc_flash_rma_ack_i_if 100.00 1 100 1 64 64




Group Instance : mubi4_cov_of_tb.dut.u_otp_lc_data_i_rma_token_valid_if
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
83.33 1 100 1 64 64




Summary for Group Instance mubi4_cov_of_tb.dut.u_otp_lc_data_i_rma_token_valid_if

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 6 1 5 83.33


Variables for Group Instance mubi4_cov_of_tb.dut.u_otp_lc_data_i_rma_token_valid_if
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_value 6 1 5 83.33 100 1 1 0



Group Instance : mubi4_cov_of_tb.dut.u_otp_lc_data_i_secrets_valid_if
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
83.33 1 100 1 64 64




Summary for Group Instance mubi4_cov_of_tb.dut.u_otp_lc_data_i_secrets_valid_if

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 6 1 5 83.33


Variables for Group Instance mubi4_cov_of_tb.dut.u_otp_lc_data_i_secrets_valid_if
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_value 6 1 5 83.33 100 1 1 0



Group Instance : mubi4_cov_of_tb.dut.u_otp_lc_data_i_test_tokens_valid_if
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
83.33 1 100 1 64 64




Summary for Group Instance mubi4_cov_of_tb.dut.u_otp_lc_data_i_test_tokens_valid_if

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 6 1 5 83.33


Variables for Group Instance mubi4_cov_of_tb.dut.u_otp_lc_data_i_test_tokens_valid_if
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_value 6 1 5 83.33 100 1 1 0



Group Instance : mubi4_cov_of_tb.dut.u_lc_clk_byp_ack_i_if
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance mubi4_cov_of_tb.dut.u_lc_clk_byp_ack_i_if

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 6 0 6 100.00


Variables for Group Instance mubi4_cov_of_tb.dut.u_lc_clk_byp_ack_i_if
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_value 6 0 6 100.00 100 1 1 0



Group Instance : mubi4_cov_of_tb.dut.u_lc_flash_rma_ack_i_if
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance mubi4_cov_of_tb.dut.u_lc_flash_rma_ack_i_if

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 6 0 6 100.00


Variables for Group Instance mubi4_cov_of_tb.dut.u_lc_flash_rma_ack_i_if
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_value 6 0 6 100.00 100 1 1 0


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 6 1 5 83.33


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
false 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 637 1 T15 2 T35 2 T63 8
others[1] 641 1 T15 2 T35 4 T63 11
others[2] 665 1 T15 6 T35 12 T63 1
others[3] 1145 1 T15 15 T35 10 T63 10
true 117843 1 T1 107 T2 15 T3 56


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 6 1 5 83.33


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 647 1 T15 5 T35 2 T63 2
others[1] 596 1 T15 4 T35 4 T63 4
others[2] 599 1 T15 8 T35 8 T63 8
others[3] 1065 1 T15 18 T35 4 T63 12
false 117860 1 T1 107 T2 15 T3 56


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 6 1 5 83.33


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
false 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 618 1 T15 2 T35 6 T63 6
others[1] 650 1 T15 8 T35 4 T63 8
others[2] 604 1 T15 10 T35 6 T63 8
others[3] 1186 1 T15 16 T35 12 T63 14
true 117836 1 T1 107 T2 15 T3 56


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 6 0 6 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 313 1 T15 7 T35 1 T63 4
others[1] 346 1 T15 4 T35 2 T63 10
others[2] 314 1 T15 2 T35 1 T63 4
others[3] 523 1 T15 5 T35 4 T63 7
false 2105570 1 T1 107 T2 15 T3 945
true 1985969 1 T3 889 T4 7115 T12 2


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 6 0 6 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 363 1 T15 6 T35 1 T63 7
others[1] 362 1 T15 2 T35 2 T63 4
others[2] 344 1 T15 2 T35 3 T63 8
others[3] 565 1 T15 5 T35 6 T63 5
false 7324371 1 T1 109 T2 17 T3 762
true 7204913 1 T1 2 T2 2 T3 706

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