SCORE | INSTANCES | WEIGHT | GOAL | AT LEAST | PER INSTANCE | AUTO BIN MAX | PRINT MISSING |
100.00 | 91.67 | 1 | 100 | 1 | 1 | 64 | 64 |
NAME | SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
mubi4_cov_of_tb.dut.u_otp_lc_data_i_rma_token_valid_if | 83.33 | 1 | 100 | 1 | 64 | 64 |
mubi4_cov_of_tb.dut.u_otp_lc_data_i_secrets_valid_if | 83.33 | 1 | 100 | 1 | 64 | 64 |
mubi4_cov_of_tb.dut.u_otp_lc_data_i_test_tokens_valid_if | 83.33 | 1 | 100 | 1 | 64 | 64 |
mubi4_cov_of_tb.dut.u_lc_clk_byp_ack_i_if | 100.00 | 1 | 100 | 1 | 64 | 64 |
mubi4_cov_of_tb.dut.u_lc_flash_rma_ack_i_if.gen_connect_lc_tx_items[0].lc_tx_if | 100.00 | 1 | 100 | 1 | 64 | 64 |
mubi4_cov_of_tb.dut.u_lc_flash_rma_ack_i_if.gen_connect_lc_tx_items[1].lc_tx_if | 100.00 | 1 | 100 | 1 | 64 | 64 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
83.33 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 6 | 1 | 5 | 83.33 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_value | 6 | 1 | 5 | 83.33 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
83.33 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 6 | 1 | 5 | 83.33 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_value | 6 | 1 | 5 | 83.33 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
83.33 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 6 | 1 | 5 | 83.33 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_value | 6 | 1 | 5 | 83.33 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 6 | 0 | 6 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_value | 6 | 0 | 6 | 100.00 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 6 | 0 | 6 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_value | 6 | 0 | 6 | 100.00 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 6 | 0 | 6 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_value | 6 | 0 | 6 | 100.00 | 100 | 1 | 1 | 0 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 6 | 1 | 5 | 83.33 |
NAME | COUNT | AT LEAST | NUMBER | STATUS |
false | 0 | 1 | 1 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
others[0] | 272 | 1 | T2 | 4 | T42 | 10 | T61 | 2 | ||||
others[1] | 283 | 1 | T2 | 10 | T42 | 2 | T61 | 4 | ||||
others[2] | 336 | 1 | T2 | 10 | T42 | 14 | T61 | 6 | ||||
others[3] | 556 | 1 | T2 | 15 | T42 | 12 | T61 | 7 | ||||
true | 61087 | 1 | T1 | 1 | T2 | 68 | T3 | 1220 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 6 | 1 | 5 | 83.33 |
NAME | COUNT | AT LEAST | NUMBER | STATUS |
true | 0 | 1 | 1 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
others[0] | 286 | 1 | T2 | 2 | T42 | 6 | T199 | 8 | ||||
others[1] | 278 | 1 | T2 | 2 | T42 | 8 | T61 | 4 | ||||
others[2] | 321 | 1 | T2 | 6 | T42 | 6 | T61 | 10 | ||||
others[3] | 507 | 1 | T2 | 8 | T42 | 8 | T61 | 2 | ||||
false | 61080 | 1 | T1 | 1 | T2 | 71 | T3 | 1220 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 6 | 1 | 5 | 83.33 |
NAME | COUNT | AT LEAST | NUMBER | STATUS |
false | 0 | 1 | 1 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
others[0] | 328 | 1 | T2 | 6 | T42 | 6 | T61 | 2 | ||||
others[1] | 301 | 1 | T2 | 14 | T42 | 2 | T61 | 14 | ||||
others[2] | 313 | 1 | T2 | 6 | T42 | 12 | T61 | 3 | ||||
others[3] | 574 | 1 | T2 | 10 | T42 | 4 | T61 | 8 | ||||
true | 61061 | 1 | T1 | 1 | T2 | 73 | T3 | 1220 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 6 | 0 | 6 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
others[0] | 155 | 1 | T2 | 3 | T42 | 4 | T61 | 4 | ||||
others[1] | 188 | 1 | T2 | 3 | T42 | 2 | T61 | 5 | ||||
others[2] | 165 | 1 | T2 | 2 | T42 | 3 | T61 | 2 | ||||
others[3] | 291 | 1 | T2 | 6 | T42 | 4 | T61 | 8 | ||||
false | 1148562 | 1 | T1 | 1 | T2 | 88 | T3 | 23174 | ||||
true | 1086558 | 1 | T3 | 21954 | T9 | 4369 | T14 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 6 | 0 | 6 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
others[0] | 168 | 1 | T2 | 3 | T42 | 4 | T61 | 4 | ||||
others[1] | 175 | 1 | T2 | 3 | T42 | 4 | T61 | 2 | ||||
others[2] | 157 | 1 | T2 | 1 | T42 | 1 | T61 | 3 | ||||
others[3] | 285 | 1 | T2 | 5 | T42 | 6 | T61 | 7 | ||||
false | 4209484 | 1 | T1 | 1 | T2 | 89 | T3 | 151717 | ||||
true | 4147622 | 1 | T2 | 3 | T3 | 150500 | T9 | 8551 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 6 | 0 | 6 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
others[0] | 168 | 1 | T2 | 3 | T42 | 4 | T61 | 4 | ||||
others[1] | 175 | 1 | T2 | 3 | T42 | 4 | T61 | 2 | ||||
others[2] | 157 | 1 | T2 | 1 | T42 | 1 | T61 | 3 | ||||
others[3] | 285 | 1 | T2 | 5 | T42 | 6 | T61 | 7 | ||||
false | 4209484 | 1 | T1 | 1 | T2 | 89 | T3 | 151717 | ||||
true | 4147622 | 1 | T2 | 3 | T3 | 150500 | T9 | 8551 |
0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |