SCORE | INSTANCES | WEIGHT | GOAL | AT LEAST | PER INSTANCE | AUTO BIN MAX | PRINT MISSING |
100.00 | 91.67 | 1 | 100 | 1 | 1 | 64 | 64 |
NAME | SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
mubi4_cov_of_tb.dut.u_otp_lc_data_i_rma_token_valid_if | 83.33 | 1 | 100 | 1 | 64 | 64 |
mubi4_cov_of_tb.dut.u_otp_lc_data_i_secrets_valid_if | 83.33 | 1 | 100 | 1 | 64 | 64 |
mubi4_cov_of_tb.dut.u_otp_lc_data_i_test_tokens_valid_if | 83.33 | 1 | 100 | 1 | 64 | 64 |
mubi4_cov_of_tb.dut.u_lc_clk_byp_ack_i_if | 100.00 | 1 | 100 | 1 | 64 | 64 |
mubi4_cov_of_tb.dut.u_lc_flash_rma_ack_i_if.gen_connect_lc_tx_items[0].lc_tx_if | 100.00 | 1 | 100 | 1 | 64 | 64 |
mubi4_cov_of_tb.dut.u_lc_flash_rma_ack_i_if.gen_connect_lc_tx_items[1].lc_tx_if | 100.00 | 1 | 100 | 1 | 64 | 64 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
83.33 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 6 | 1 | 5 | 83.33 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_value | 6 | 1 | 5 | 83.33 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
83.33 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 6 | 1 | 5 | 83.33 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_value | 6 | 1 | 5 | 83.33 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
83.33 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 6 | 1 | 5 | 83.33 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_value | 6 | 1 | 5 | 83.33 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 6 | 0 | 6 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_value | 6 | 0 | 6 | 100.00 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 6 | 0 | 6 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_value | 6 | 0 | 6 | 100.00 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 6 | 0 | 6 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_value | 6 | 0 | 6 | 100.00 | 100 | 1 | 1 | 0 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 6 | 1 | 5 | 83.33 |
NAME | COUNT | AT LEAST | NUMBER | STATUS |
false | 0 | 1 | 1 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
others[0] | 238 | 1 | T2 | 10 | T62 | 4 | T45 | 8 | ||||
others[1] | 200 | 1 | T2 | 12 | T62 | 4 | T45 | 8 | ||||
others[2] | 255 | 1 | T45 | 10 | T207 | 10 | T46 | 6 | ||||
others[3] | 390 | 1 | T2 | 12 | T62 | 6 | T45 | 4 | ||||
true | 49048 | 1 | T1 | 100 | T2 | 63 | T3 | 94 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 6 | 1 | 5 | 83.33 |
NAME | COUNT | AT LEAST | NUMBER | STATUS |
true | 0 | 1 | 1 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
others[0] | 224 | 1 | T2 | 2 | T62 | 4 | T45 | 2 | ||||
others[1] | 237 | 1 | T62 | 4 | T45 | 6 | T207 | 12 | ||||
others[2] | 276 | 1 | T2 | 6 | T62 | 12 | T45 | 4 | ||||
others[3] | 386 | 1 | T2 | 12 | T62 | 12 | T45 | 6 | ||||
false | 49042 | 1 | T1 | 100 | T2 | 65 | T3 | 94 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 6 | 1 | 5 | 83.33 |
NAME | COUNT | AT LEAST | NUMBER | STATUS |
false | 0 | 1 | 1 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
others[0] | 238 | 1 | T2 | 4 | T62 | 4 | T45 | 4 | ||||
others[1] | 242 | 1 | T2 | 6 | T62 | 10 | T45 | 10 | ||||
others[2] | 221 | 1 | T2 | 6 | T62 | 4 | T45 | 6 | ||||
others[3] | 383 | 1 | T2 | 10 | T62 | 13 | T45 | 11 | ||||
true | 49032 | 1 | T1 | 100 | T2 | 65 | T3 | 94 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 6 | 0 | 6 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
others[0] | 121 | 1 | T2 | 2 | T62 | 1 | T45 | 3 | ||||
others[1] | 128 | 1 | T2 | 2 | T62 | 3 | T45 | 5 | ||||
others[2] | 102 | 1 | T2 | 5 | T62 | 3 | T207 | 1 | ||||
others[3] | 178 | 1 | T2 | 3 | T62 | 4 | T45 | 4 | ||||
false | 906042 | 1 | T1 | 100 | T2 | 79 | T3 | 94 | ||||
true | 856379 | 1 | T13 | 928 | T15 | 1440 | T19 | 3 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 6 | 0 | 6 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
others[0] | 107 | 1 | T2 | 1 | T45 | 2 | T207 | 5 | ||||
others[1] | 119 | 1 | T2 | 5 | T62 | 3 | T45 | 3 | ||||
others[2] | 124 | 1 | T2 | 3 | T62 | 2 | T45 | 2 | ||||
others[3] | 204 | 1 | T2 | 7 | T62 | 6 | T45 | 2 | ||||
false | 2346579 | 1 | T1 | 100 | T2 | 83 | T3 | 94 | ||||
true | 2296984 | 1 | T2 | 4 | T8 | 5 | T11 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 6 | 0 | 6 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
others[0] | 107 | 1 | T2 | 1 | T45 | 2 | T207 | 5 | ||||
others[1] | 119 | 1 | T2 | 5 | T62 | 3 | T45 | 3 | ||||
others[2] | 124 | 1 | T2 | 3 | T62 | 2 | T45 | 2 | ||||
others[3] | 204 | 1 | T2 | 7 | T62 | 6 | T45 | 2 | ||||
false | 2346579 | 1 | T1 | 100 | T2 | 83 | T3 | 94 | ||||
true | 2296984 | 1 | T2 | 4 | T8 | 5 | T11 | 1 |
0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |