SCORE | INSTANCES | WEIGHT | GOAL | AT LEAST | PER INSTANCE | AUTO BIN MAX | PRINT MISSING |
100.00 | 91.67 | 1 | 100 | 1 | 1 | 64 | 64 |
NAME | SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
mubi4_cov_of_tb.dut.u_otp_lc_data_i_rma_token_valid_if | 83.33 | 1 | 100 | 1 | 64 | 64 |
mubi4_cov_of_tb.dut.u_otp_lc_data_i_secrets_valid_if | 83.33 | 1 | 100 | 1 | 64 | 64 |
mubi4_cov_of_tb.dut.u_otp_lc_data_i_test_tokens_valid_if | 83.33 | 1 | 100 | 1 | 64 | 64 |
mubi4_cov_of_tb.dut.u_lc_clk_byp_ack_i_if | 100.00 | 1 | 100 | 1 | 64 | 64 |
mubi4_cov_of_tb.dut.u_lc_flash_rma_ack_i_if.gen_connect_lc_tx_items[0].lc_tx_if | 100.00 | 1 | 100 | 1 | 64 | 64 |
mubi4_cov_of_tb.dut.u_lc_flash_rma_ack_i_if.gen_connect_lc_tx_items[1].lc_tx_if | 100.00 | 1 | 100 | 1 | 64 | 64 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
83.33 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 6 | 1 | 5 | 83.33 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_value | 6 | 1 | 5 | 83.33 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
83.33 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 6 | 1 | 5 | 83.33 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_value | 6 | 1 | 5 | 83.33 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
83.33 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 6 | 1 | 5 | 83.33 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_value | 6 | 1 | 5 | 83.33 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 6 | 0 | 6 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_value | 6 | 0 | 6 | 100.00 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 6 | 0 | 6 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_value | 6 | 0 | 6 | 100.00 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 6 | 0 | 6 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_value | 6 | 0 | 6 | 100.00 | 100 | 1 | 1 | 0 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 6 | 1 | 5 | 83.33 |
NAME | COUNT | AT LEAST | NUMBER | STATUS |
false | 0 | 1 | 1 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
others[0] | 324 | 1 | T71 | 8 | T55 | 2 | T72 | 8 | ||||
others[1] | 347 | 1 | T55 | 2 | T72 | 6 | T225 | 8 | ||||
others[2] | 330 | 1 | T71 | 3 | T72 | 6 | T225 | 6 | ||||
others[3] | 564 | 1 | T71 | 13 | T55 | 14 | T72 | 4 | ||||
true | 58463 | 1 | T1 | 1 | T2 | 1 | T3 | 81 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 6 | 1 | 5 | 83.33 |
NAME | COUNT | AT LEAST | NUMBER | STATUS |
true | 0 | 1 | 1 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
others[0] | 328 | 1 | T71 | 13 | T55 | 6 | T72 | 8 | ||||
others[1] | 342 | 1 | T71 | 4 | T55 | 6 | T72 | 10 | ||||
others[2] | 341 | 1 | T71 | 6 | T55 | 2 | T72 | 8 | ||||
others[3] | 548 | 1 | T71 | 10 | T55 | 8 | T72 | 6 | ||||
false | 58460 | 1 | T1 | 1 | T2 | 1 | T3 | 81 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 6 | 1 | 5 | 83.33 |
NAME | COUNT | AT LEAST | NUMBER | STATUS |
false | 0 | 1 | 1 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
others[0] | 363 | 1 | T71 | 2 | T55 | 4 | T72 | 2 | ||||
others[1] | 317 | 1 | T71 | 8 | T55 | 4 | T72 | 2 | ||||
others[2] | 297 | 1 | T71 | 4 | T55 | 2 | T72 | 10 | ||||
others[3] | 518 | 1 | T71 | 14 | T55 | 8 | T72 | 16 | ||||
true | 58484 | 1 | T1 | 1 | T2 | 1 | T3 | 81 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 6 | 0 | 6 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
others[0] | 140 | 1 | T71 | 2 | T55 | 2 | T225 | 4 | ||||
others[1] | 150 | 1 | T71 | 3 | T55 | 3 | T72 | 3 | ||||
others[2] | 130 | 1 | T71 | 1 | T55 | 3 | T72 | 1 | ||||
others[3] | 284 | 1 | T71 | 2 | T55 | 5 | T72 | 6 | ||||
false | 1071194 | 1 | T1 | 1 | T2 | 1 | T3 | 81 | ||||
true | 1011878 | 1 | T4 | 1 | T5 | 1324 | T14 | 3 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 6 | 0 | 6 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
others[0] | 171 | 1 | T55 | 3 | T72 | 5 | T225 | 9 | ||||
others[1] | 177 | 1 | T71 | 5 | T72 | 6 | T225 | 6 | ||||
others[2] | 200 | 1 | T71 | 5 | T55 | 3 | T72 | 3 | ||||
others[3] | 299 | 1 | T71 | 4 | T55 | 4 | T72 | 1 | ||||
false | 3332859 | 1 | T1 | 1 | T2 | 1 | T3 | 87 | ||||
true | 3273546 | 1 | T3 | 6 | T4 | 1 | T5 | 1175 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 6 | 0 | 6 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
others[0] | 171 | 1 | T55 | 3 | T72 | 5 | T225 | 9 | ||||
others[1] | 177 | 1 | T71 | 5 | T72 | 6 | T225 | 6 | ||||
others[2] | 200 | 1 | T71 | 5 | T55 | 3 | T72 | 3 | ||||
others[3] | 299 | 1 | T71 | 4 | T55 | 4 | T72 | 1 | ||||
false | 3332859 | 1 | T1 | 1 | T2 | 1 | T3 | 87 | ||||
true | 3273547 | 1 | T3 | 6 | T4 | 1 | T5 | 1175 |
0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |