Tests
dashboard | hierarchy | modlist | groups | tests | asserts
Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.25 97.92 96.12 93.40 100.00 98.52 98.51 96.29


Total test records in report: 1001
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html

T813 /workspace/coverage/default/11.lc_ctrl_jtag_smoke.2594334364 Jul 29 05:35:51 PM PDT 24 Jul 29 05:35:56 PM PDT 24 272251640 ps
T814 /workspace/coverage/default/8.lc_ctrl_jtag_access.3712823403 Jul 29 05:35:38 PM PDT 24 Jul 29 05:35:48 PM PDT 24 7019527924 ps
T815 /workspace/coverage/default/39.lc_ctrl_volatile_unlock_smoke.698274163 Jul 29 05:37:20 PM PDT 24 Jul 29 05:37:21 PM PDT 24 93618653 ps
T816 /workspace/coverage/default/37.lc_ctrl_stress_all_with_rand_reset.1155657622 Jul 29 05:37:21 PM PDT 24 Jul 29 05:54:40 PM PDT 24 58855526817 ps
T817 /workspace/coverage/default/25.lc_ctrl_alert_test.3260277434 Jul 29 05:36:45 PM PDT 24 Jul 29 05:36:46 PM PDT 24 42403240 ps
T818 /workspace/coverage/default/5.lc_ctrl_jtag_smoke.1155194515 Jul 29 05:35:36 PM PDT 24 Jul 29 05:35:39 PM PDT 24 263137868 ps
T819 /workspace/coverage/default/5.lc_ctrl_sec_token_mux.1991070995 Jul 29 05:35:36 PM PDT 24 Jul 29 05:35:46 PM PDT 24 299886838 ps
T820 /workspace/coverage/default/35.lc_ctrl_sec_token_digest.2720742713 Jul 29 05:37:15 PM PDT 24 Jul 29 05:37:24 PM PDT 24 182086048 ps
T821 /workspace/coverage/default/48.lc_ctrl_state_failure.850539471 Jul 29 05:37:48 PM PDT 24 Jul 29 05:38:15 PM PDT 24 214635973 ps
T822 /workspace/coverage/default/6.lc_ctrl_jtag_regwen_during_op.2366289667 Jul 29 05:35:36 PM PDT 24 Jul 29 05:35:57 PM PDT 24 5254115805 ps
T823 /workspace/coverage/default/7.lc_ctrl_jtag_prog_failure.630712142 Jul 29 05:35:35 PM PDT 24 Jul 29 05:35:41 PM PDT 24 593516219 ps
T824 /workspace/coverage/default/5.lc_ctrl_jtag_access.152081154 Jul 29 05:35:33 PM PDT 24 Jul 29 05:35:38 PM PDT 24 492333279 ps
T825 /workspace/coverage/default/6.lc_ctrl_security_escalation.3948626004 Jul 29 05:35:35 PM PDT 24 Jul 29 05:35:42 PM PDT 24 349330001 ps
T826 /workspace/coverage/default/9.lc_ctrl_jtag_smoke.2982985515 Jul 29 05:35:46 PM PDT 24 Jul 29 05:35:49 PM PDT 24 354263419 ps
T827 /workspace/coverage/default/2.lc_ctrl_jtag_priority.244302860 Jul 29 05:35:15 PM PDT 24 Jul 29 05:35:32 PM PDT 24 8500847648 ps
T828 /workspace/coverage/default/11.lc_ctrl_jtag_prog_failure.350980802 Jul 29 05:35:59 PM PDT 24 Jul 29 05:36:06 PM PDT 24 7158123487 ps
T829 /workspace/coverage/default/31.lc_ctrl_sec_token_digest.3345977292 Jul 29 05:36:59 PM PDT 24 Jul 29 05:37:10 PM PDT 24 255113924 ps
T830 /workspace/coverage/default/3.lc_ctrl_regwen_during_op.3257749142 Jul 29 05:35:22 PM PDT 24 Jul 29 05:35:30 PM PDT 24 405422816 ps
T831 /workspace/coverage/default/4.lc_ctrl_errors.2975676485 Jul 29 05:35:22 PM PDT 24 Jul 29 05:35:39 PM PDT 24 4077623262 ps
T832 /workspace/coverage/default/35.lc_ctrl_sec_token_mux.3282642823 Jul 29 05:37:12 PM PDT 24 Jul 29 05:37:21 PM PDT 24 1226686611 ps
T74 /workspace/coverage/default/33.lc_ctrl_alert_test.3018932245 Jul 29 05:37:10 PM PDT 24 Jul 29 05:37:11 PM PDT 24 39058600 ps
T833 /workspace/coverage/default/4.lc_ctrl_prog_failure.3986066617 Jul 29 05:35:28 PM PDT 24 Jul 29 05:35:32 PM PDT 24 423036394 ps
T834 /workspace/coverage/default/8.lc_ctrl_alert_test.670739292 Jul 29 05:35:46 PM PDT 24 Jul 29 05:35:47 PM PDT 24 18009334 ps
T835 /workspace/coverage/default/34.lc_ctrl_security_escalation.884113122 Jul 29 05:37:11 PM PDT 24 Jul 29 05:37:18 PM PDT 24 739094670 ps
T836 /workspace/coverage/default/36.lc_ctrl_sec_token_digest.171629771 Jul 29 05:37:17 PM PDT 24 Jul 29 05:37:28 PM PDT 24 1032115174 ps
T837 /workspace/coverage/default/30.lc_ctrl_sec_token_mux.3952061722 Jul 29 05:37:00 PM PDT 24 Jul 29 05:37:13 PM PDT 24 335655462 ps
T838 /workspace/coverage/default/0.lc_ctrl_jtag_state_failure.522743314 Jul 29 05:35:07 PM PDT 24 Jul 29 05:35:54 PM PDT 24 1404552747 ps
T839 /workspace/coverage/default/2.lc_ctrl_state_failure.4117470272 Jul 29 05:35:14 PM PDT 24 Jul 29 05:35:40 PM PDT 24 482457204 ps
T840 /workspace/coverage/default/16.lc_ctrl_jtag_state_failure.1039070317 Jul 29 05:36:16 PM PDT 24 Jul 29 05:37:10 PM PDT 24 2055823039 ps
T841 /workspace/coverage/default/3.lc_ctrl_smoke.3672085354 Jul 29 05:35:14 PM PDT 24 Jul 29 05:35:16 PM PDT 24 105988422 ps
T842 /workspace/coverage/default/31.lc_ctrl_sec_mubi.2145118798 Jul 29 05:37:00 PM PDT 24 Jul 29 05:37:20 PM PDT 24 1274411399 ps
T843 /workspace/coverage/default/34.lc_ctrl_jtag_access.2874358424 Jul 29 05:37:10 PM PDT 24 Jul 29 05:37:15 PM PDT 24 345579074 ps
T844 /workspace/coverage/default/8.lc_ctrl_stress_all.35934864 Jul 29 05:35:46 PM PDT 24 Jul 29 05:40:36 PM PDT 24 33445221294 ps
T845 /workspace/coverage/default/23.lc_ctrl_state_post_trans.1129362365 Jul 29 05:36:34 PM PDT 24 Jul 29 05:36:38 PM PDT 24 109498393 ps
T201 /workspace/coverage/default/9.lc_ctrl_claim_transition_if.2863959964 Jul 29 05:35:45 PM PDT 24 Jul 29 05:35:46 PM PDT 24 18205469 ps
T846 /workspace/coverage/default/10.lc_ctrl_jtag_prog_failure.2018337098 Jul 29 05:35:52 PM PDT 24 Jul 29 05:35:55 PM PDT 24 410037295 ps
T847 /workspace/coverage/default/34.lc_ctrl_smoke.3521574802 Jul 29 05:37:11 PM PDT 24 Jul 29 05:37:13 PM PDT 24 27936379 ps
T848 /workspace/coverage/default/44.lc_ctrl_stress_all.1464703442 Jul 29 05:37:38 PM PDT 24 Jul 29 05:39:47 PM PDT 24 22160009403 ps
T849 /workspace/coverage/default/10.lc_ctrl_jtag_errors.256683579 Jul 29 05:35:53 PM PDT 24 Jul 29 05:36:35 PM PDT 24 2432410490 ps
T850 /workspace/coverage/default/1.lc_ctrl_prog_failure.1597211115 Jul 29 05:35:12 PM PDT 24 Jul 29 05:35:17 PM PDT 24 201800103 ps
T851 /workspace/coverage/default/9.lc_ctrl_alert_test.1301018179 Jul 29 05:35:53 PM PDT 24 Jul 29 05:35:54 PM PDT 24 19254100 ps
T852 /workspace/coverage/default/11.lc_ctrl_jtag_state_post_trans.1667280891 Jul 29 05:35:56 PM PDT 24 Jul 29 05:36:25 PM PDT 24 800026595 ps
T853 /workspace/coverage/default/16.lc_ctrl_alert_test.3870734154 Jul 29 05:36:15 PM PDT 24 Jul 29 05:36:16 PM PDT 24 23836741 ps
T854 /workspace/coverage/default/3.lc_ctrl_state_post_trans.4043852519 Jul 29 05:35:23 PM PDT 24 Jul 29 05:35:28 PM PDT 24 100097729 ps
T855 /workspace/coverage/default/17.lc_ctrl_stress_all.4110628886 Jul 29 05:36:19 PM PDT 24 Jul 29 05:37:20 PM PDT 24 14710174800 ps
T856 /workspace/coverage/default/4.lc_ctrl_sec_token_mux.1653278868 Jul 29 05:35:26 PM PDT 24 Jul 29 05:35:34 PM PDT 24 311564345 ps
T857 /workspace/coverage/default/4.lc_ctrl_smoke.1267686301 Jul 29 05:35:19 PM PDT 24 Jul 29 05:35:23 PM PDT 24 255979759 ps
T858 /workspace/coverage/default/26.lc_ctrl_volatile_unlock_smoke.603337777 Jul 29 05:36:47 PM PDT 24 Jul 29 05:36:48 PM PDT 24 18771353 ps
T859 /workspace/coverage/default/37.lc_ctrl_prog_failure.4027126054 Jul 29 05:37:17 PM PDT 24 Jul 29 05:37:20 PM PDT 24 86846869 ps
T860 /workspace/coverage/default/19.lc_ctrl_jtag_smoke.2581227539 Jul 29 05:36:29 PM PDT 24 Jul 29 05:36:42 PM PDT 24 2464856445 ps
T861 /workspace/coverage/default/33.lc_ctrl_jtag_access.1269461797 Jul 29 05:37:08 PM PDT 24 Jul 29 05:37:29 PM PDT 24 1719747754 ps
T862 /workspace/coverage/default/40.lc_ctrl_state_post_trans.3825418792 Jul 29 05:37:23 PM PDT 24 Jul 29 05:37:32 PM PDT 24 107482487 ps
T863 /workspace/coverage/default/4.lc_ctrl_jtag_state_post_trans.4217256199 Jul 29 05:35:22 PM PDT 24 Jul 29 05:35:41 PM PDT 24 1161419166 ps
T864 /workspace/coverage/default/40.lc_ctrl_jtag_access.532613379 Jul 29 05:37:23 PM PDT 24 Jul 29 05:37:28 PM PDT 24 335709345 ps
T865 /workspace/coverage/default/48.lc_ctrl_sec_token_mux.2256468887 Jul 29 05:37:47 PM PDT 24 Jul 29 05:37:56 PM PDT 24 1374684671 ps
T866 /workspace/coverage/default/6.lc_ctrl_regwen_during_op.2267516447 Jul 29 05:35:36 PM PDT 24 Jul 29 05:35:45 PM PDT 24 274297749 ps
T867 /workspace/coverage/default/16.lc_ctrl_jtag_prog_failure.1277208134 Jul 29 05:36:15 PM PDT 24 Jul 29 05:36:21 PM PDT 24 1112111183 ps
T868 /workspace/coverage/default/29.lc_ctrl_state_failure.2245270270 Jul 29 05:36:55 PM PDT 24 Jul 29 05:37:13 PM PDT 24 1187840132 ps
T869 /workspace/coverage/default/36.lc_ctrl_state_post_trans.3725414059 Jul 29 05:37:14 PM PDT 24 Jul 29 05:37:21 PM PDT 24 99445603 ps
T870 /workspace/coverage/default/36.lc_ctrl_sec_token_mux.4181487961 Jul 29 05:37:15 PM PDT 24 Jul 29 05:37:24 PM PDT 24 486999230 ps
T871 /workspace/coverage/default/6.lc_ctrl_sec_token_mux.4256020456 Jul 29 05:35:36 PM PDT 24 Jul 29 05:35:48 PM PDT 24 1741235290 ps
T872 /workspace/coverage/default/18.lc_ctrl_jtag_smoke.2975583393 Jul 29 05:36:26 PM PDT 24 Jul 29 05:36:27 PM PDT 24 131041897 ps
T75 /workspace/coverage/default/10.lc_ctrl_smoke.3035004401 Jul 29 05:36:06 PM PDT 24 Jul 29 05:36:08 PM PDT 24 119806385 ps
T873 /workspace/coverage/default/37.lc_ctrl_security_escalation.1108680502 Jul 29 05:37:14 PM PDT 24 Jul 29 05:37:22 PM PDT 24 353321910 ps
T874 /workspace/coverage/default/31.lc_ctrl_sec_token_mux.1379742536 Jul 29 05:36:59 PM PDT 24 Jul 29 05:37:09 PM PDT 24 262295785 ps
T875 /workspace/coverage/default/32.lc_ctrl_security_escalation.3013801406 Jul 29 05:37:08 PM PDT 24 Jul 29 05:37:18 PM PDT 24 259275228 ps
T105 /workspace/coverage/cover_reg_top/1.lc_ctrl_same_csr_outstanding.1386180641 Jul 29 05:25:02 PM PDT 24 Jul 29 05:25:03 PM PDT 24 105713324 ps
T113 /workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_bit_bash.2553655601 Jul 29 05:25:00 PM PDT 24 Jul 29 05:25:09 PM PDT 24 353560372 ps
T114 /workspace/coverage/cover_reg_top/2.lc_ctrl_csr_hw_reset.1091457084 Jul 29 05:25:16 PM PDT 24 Jul 29 05:25:17 PM PDT 24 32885015 ps
T134 /workspace/coverage/cover_reg_top/14.lc_ctrl_csr_rw.1876750015 Jul 29 05:25:57 PM PDT 24 Jul 29 05:25:58 PM PDT 24 114347933 ps
T101 /workspace/coverage/cover_reg_top/19.lc_ctrl_csr_mem_rw_with_rand_reset.2802486863 Jul 29 05:26:02 PM PDT 24 Jul 29 05:26:04 PM PDT 24 50870253 ps
T106 /workspace/coverage/cover_reg_top/16.lc_ctrl_csr_rw.1065625217 Jul 29 05:25:59 PM PDT 24 Jul 29 05:26:01 PM PDT 24 17472001 ps
T139 /workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_bit_bash.1693887570 Jul 29 05:24:50 PM PDT 24 Jul 29 05:25:00 PM PDT 24 833556767 ps
T107 /workspace/coverage/cover_reg_top/1.lc_ctrl_csr_aliasing.1514314584 Jul 29 05:25:01 PM PDT 24 Jul 29 05:25:03 PM PDT 24 140174637 ps
T190 /workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_same_csr_outstanding.1116372136 Jul 29 05:25:33 PM PDT 24 Jul 29 05:25:34 PM PDT 24 35718854 ps
T876 /workspace/coverage/cover_reg_top/10.lc_ctrl_csr_rw.3416778320 Jul 29 05:25:45 PM PDT 24 Jul 29 05:25:46 PM PDT 24 20054497 ps
T877 /workspace/coverage/cover_reg_top/0.lc_ctrl_csr_bit_bash.154889174 Jul 29 05:24:51 PM PDT 24 Jul 29 05:24:53 PM PDT 24 25459221 ps
T98 /workspace/coverage/cover_reg_top/18.lc_ctrl_tl_intg_err.310166049 Jul 29 05:26:03 PM PDT 24 Jul 29 05:26:06 PM PDT 24 232051680 ps
T191 /workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_same_csr_outstanding.2424887645 Jul 29 05:25:44 PM PDT 24 Jul 29 05:25:45 PM PDT 24 51418023 ps
T104 /workspace/coverage/cover_reg_top/14.lc_ctrl_csr_mem_rw_with_rand_reset.365338090 Jul 29 05:25:57 PM PDT 24 Jul 29 05:25:58 PM PDT 24 62384783 ps
T135 /workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_aliasing.4194437160 Jul 29 05:25:39 PM PDT 24 Jul 29 05:25:50 PM PDT 24 3458400984 ps
T192 /workspace/coverage/cover_reg_top/2.lc_ctrl_same_csr_outstanding.983304519 Jul 29 05:25:15 PM PDT 24 Jul 29 05:25:17 PM PDT 24 185567111 ps
T99 /workspace/coverage/cover_reg_top/12.lc_ctrl_tl_errors.313181755 Jul 29 05:25:43 PM PDT 24 Jul 29 05:25:47 PM PDT 24 98676714 ps
T136 /workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_rw.3263002058 Jul 29 05:25:35 PM PDT 24 Jul 29 05:25:36 PM PDT 24 55493319 ps
T138 /workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.4062142047 Jul 29 05:25:37 PM PDT 24 Jul 29 05:25:39 PM PDT 24 62543944 ps
T878 /workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_csr_aliasing.2500873596 Jul 29 05:25:39 PM PDT 24 Jul 29 05:25:52 PM PDT 24 515564722 ps
T193 /workspace/coverage/cover_reg_top/15.lc_ctrl_same_csr_outstanding.863408472 Jul 29 05:26:00 PM PDT 24 Jul 29 05:26:01 PM PDT 24 24834443 ps
T137 /workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_aliasing.3259327407 Jul 29 05:25:17 PM PDT 24 Jul 29 05:25:22 PM PDT 24 372964599 ps
T152 /workspace/coverage/cover_reg_top/16.lc_ctrl_csr_mem_rw_with_rand_reset.2858029369 Jul 29 05:25:57 PM PDT 24 Jul 29 05:25:58 PM PDT 24 25944733 ps
T153 /workspace/coverage/cover_reg_top/15.lc_ctrl_csr_rw.2248190969 Jul 29 05:25:58 PM PDT 24 Jul 29 05:25:59 PM PDT 24 64339558 ps
T879 /workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_alert_test.3094419787 Jul 29 05:25:33 PM PDT 24 Jul 29 05:25:35 PM PDT 24 94257234 ps
T100 /workspace/coverage/cover_reg_top/8.lc_ctrl_tl_errors.1623518743 Jul 29 05:25:44 PM PDT 24 Jul 29 05:25:46 PM PDT 24 84352875 ps
T880 /workspace/coverage/cover_reg_top/17.lc_ctrl_csr_rw.1532339896 Jul 29 05:25:56 PM PDT 24 Jul 29 05:25:57 PM PDT 24 55425984 ps
T103 /workspace/coverage/cover_reg_top/17.lc_ctrl_tl_intg_err.2601447836 Jul 29 05:26:00 PM PDT 24 Jul 29 05:26:03 PM PDT 24 80628422 ps
T881 /workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_alert_test.1480615346 Jul 29 05:24:59 PM PDT 24 Jul 29 05:25:00 PM PDT 24 59386674 ps
T102 /workspace/coverage/cover_reg_top/12.lc_ctrl_tl_intg_err.4162903645 Jul 29 05:25:57 PM PDT 24 Jul 29 05:25:59 PM PDT 24 259921371 ps
T882 /workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_alert_test.2252383686 Jul 29 05:25:29 PM PDT 24 Jul 29 05:25:31 PM PDT 24 136967284 ps
T883 /workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_alert_test.1110903589 Jul 29 05:25:16 PM PDT 24 Jul 29 05:25:19 PM PDT 24 75678514 ps
T884 /workspace/coverage/cover_reg_top/2.lc_ctrl_csr_aliasing.3297996624 Jul 29 05:25:14 PM PDT 24 Jul 29 05:25:15 PM PDT 24 326349466 ps
T885 /workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_aliasing.339889070 Jul 29 05:25:40 PM PDT 24 Jul 29 05:25:43 PM PDT 24 377629681 ps
T886 /workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_bit_bash.510957067 Jul 29 05:25:01 PM PDT 24 Jul 29 05:25:11 PM PDT 24 6810292211 ps
T887 /workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_rw.2788791619 Jul 29 05:25:37 PM PDT 24 Jul 29 05:25:38 PM PDT 24 450175186 ps
T888 /workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_aliasing.1523035969 Jul 29 05:25:39 PM PDT 24 Jul 29 05:25:46 PM PDT 24 1161097842 ps
T889 /workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_aliasing.3269339641 Jul 29 05:24:54 PM PDT 24 Jul 29 05:25:06 PM PDT 24 444776783 ps
T890 /workspace/coverage/cover_reg_top/8.lc_ctrl_csr_rw.2859399949 Jul 29 05:25:39 PM PDT 24 Jul 29 05:25:41 PM PDT 24 17471888 ps
T112 /workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.3433090160 Jul 29 05:25:35 PM PDT 24 Jul 29 05:25:38 PM PDT 24 698374763 ps
T891 /workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_hw_reset.954993819 Jul 29 05:24:57 PM PDT 24 Jul 29 05:24:59 PM PDT 24 46294546 ps
T128 /workspace/coverage/cover_reg_top/13.lc_ctrl_csr_mem_rw_with_rand_reset.975152752 Jul 29 05:25:48 PM PDT 24 Jul 29 05:25:49 PM PDT 24 52183116 ps
T892 /workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_hw_reset.850305753 Jul 29 05:25:28 PM PDT 24 Jul 29 05:25:30 PM PDT 24 193223842 ps
T893 /workspace/coverage/cover_reg_top/4.lc_ctrl_csr_bit_bash.1973013182 Jul 29 05:25:37 PM PDT 24 Jul 29 05:25:39 PM PDT 24 85776177 ps
T118 /workspace/coverage/cover_reg_top/18.lc_ctrl_tl_errors.1422193532 Jul 29 05:26:03 PM PDT 24 Jul 29 05:26:06 PM PDT 24 42308156 ps
T894 /workspace/coverage/cover_reg_top/17.lc_ctrl_csr_mem_rw_with_rand_reset.2126500182 Jul 29 05:26:01 PM PDT 24 Jul 29 05:26:02 PM PDT 24 71383028 ps
T204 /workspace/coverage/cover_reg_top/16.lc_ctrl_tl_intg_err.3314433207 Jul 29 05:26:01 PM PDT 24 Jul 29 05:26:03 PM PDT 24 48195359 ps
T154 /workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_same_csr_outstanding.4054830514 Jul 29 05:25:35 PM PDT 24 Jul 29 05:25:36 PM PDT 24 32012853 ps
T895 /workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_hw_reset.4087010070 Jul 29 05:25:37 PM PDT 24 Jul 29 05:25:39 PM PDT 24 94698780 ps
T896 /workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_rw.392438185 Jul 29 05:25:32 PM PDT 24 Jul 29 05:25:37 PM PDT 24 746235207 ps
T125 /workspace/coverage/cover_reg_top/3.lc_ctrl_csr_mem_rw_with_rand_reset.3983240833 Jul 29 05:25:26 PM PDT 24 Jul 29 05:25:28 PM PDT 24 86634224 ps
T122 /workspace/coverage/cover_reg_top/7.lc_ctrl_tl_intg_err.1183499550 Jul 29 05:25:35 PM PDT 24 Jul 29 05:25:38 PM PDT 24 84969997 ps
T119 /workspace/coverage/cover_reg_top/2.lc_ctrl_tl_errors.1134632815 Jul 29 05:25:13 PM PDT 24 Jul 29 05:25:16 PM PDT 24 88718960 ps
T155 /workspace/coverage/cover_reg_top/3.lc_ctrl_same_csr_outstanding.3181581288 Jul 29 05:25:28 PM PDT 24 Jul 29 05:25:30 PM PDT 24 212369038 ps
T897 /workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_bit_bash.812753712 Jul 29 05:25:38 PM PDT 24 Jul 29 05:25:48 PM PDT 24 1806882803 ps
T898 /workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_hw_reset.4152734270 Jul 29 05:25:02 PM PDT 24 Jul 29 05:25:04 PM PDT 24 227736891 ps
T899 /workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_rw.4274727700 Jul 29 05:25:38 PM PDT 24 Jul 29 05:25:41 PM PDT 24 166980653 ps
T194 /workspace/coverage/cover_reg_top/18.lc_ctrl_same_csr_outstanding.3826911447 Jul 29 05:26:02 PM PDT 24 Jul 29 05:26:04 PM PDT 24 77454480 ps
T900 /workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_hw_reset.2965097647 Jul 29 05:25:38 PM PDT 24 Jul 29 05:25:41 PM PDT 24 526305235 ps
T901 /workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_bit_bash.3383959409 Jul 29 05:25:29 PM PDT 24 Jul 29 05:25:52 PM PDT 24 1812655260 ps
T132 /workspace/coverage/cover_reg_top/9.lc_ctrl_tl_intg_err.1774181265 Jul 29 05:25:44 PM PDT 24 Jul 29 05:25:47 PM PDT 24 163781663 ps
T108 /workspace/coverage/cover_reg_top/5.lc_ctrl_tl_errors.3561552703 Jul 29 05:25:37 PM PDT 24 Jul 29 05:25:39 PM PDT 24 212080880 ps
T183 /workspace/coverage/cover_reg_top/0.lc_ctrl_csr_rw.561316789 Jul 29 05:24:48 PM PDT 24 Jul 29 05:24:49 PM PDT 24 12583457 ps
T902 /workspace/coverage/cover_reg_top/12.lc_ctrl_csr_rw.2716903076 Jul 29 05:25:49 PM PDT 24 Jul 29 05:25:50 PM PDT 24 124452588 ps
T903 /workspace/coverage/cover_reg_top/2.lc_ctrl_csr_mem_rw_with_rand_reset.1207084539 Jul 29 05:25:17 PM PDT 24 Jul 29 05:25:18 PM PDT 24 156826457 ps
T904 /workspace/coverage/cover_reg_top/9.lc_ctrl_same_csr_outstanding.2773768669 Jul 29 05:25:45 PM PDT 24 Jul 29 05:25:46 PM PDT 24 15357695 ps
T905 /workspace/coverage/cover_reg_top/1.lc_ctrl_csr_bit_bash.2706825865 Jul 29 05:25:02 PM PDT 24 Jul 29 05:25:04 PM PDT 24 52365369 ps
T115 /workspace/coverage/cover_reg_top/18.lc_ctrl_csr_mem_rw_with_rand_reset.563008083 Jul 29 05:26:03 PM PDT 24 Jul 29 05:26:05 PM PDT 24 21828523 ps
T184 /workspace/coverage/cover_reg_top/3.lc_ctrl_csr_rw.1572319111 Jul 29 05:25:26 PM PDT 24 Jul 29 05:25:27 PM PDT 24 15971311 ps
T906 /workspace/coverage/cover_reg_top/13.lc_ctrl_same_csr_outstanding.2253706197 Jul 29 05:25:54 PM PDT 24 Jul 29 05:25:55 PM PDT 24 117085199 ps
T116 /workspace/coverage/cover_reg_top/13.lc_ctrl_tl_errors.1396128425 Jul 29 05:25:59 PM PDT 24 Jul 29 05:26:03 PM PDT 24 214442995 ps
T907 /workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_rw.4170092602 Jul 29 05:25:28 PM PDT 24 Jul 29 05:25:29 PM PDT 24 126953028 ps
T908 /workspace/coverage/cover_reg_top/10.lc_ctrl_same_csr_outstanding.1382421464 Jul 29 05:25:43 PM PDT 24 Jul 29 05:25:45 PM PDT 24 135097526 ps
T909 /workspace/coverage/cover_reg_top/7.lc_ctrl_tl_errors.3093521348 Jul 29 05:25:38 PM PDT 24 Jul 29 05:25:40 PM PDT 24 129330669 ps
T910 /workspace/coverage/cover_reg_top/17.lc_ctrl_same_csr_outstanding.2345454254 Jul 29 05:25:59 PM PDT 24 Jul 29 05:26:00 PM PDT 24 21027900 ps
T911 /workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.1292256341 Jul 29 05:25:27 PM PDT 24 Jul 29 05:25:29 PM PDT 24 356407399 ps
T912 /workspace/coverage/cover_reg_top/13.lc_ctrl_csr_rw.146191782 Jul 29 05:26:00 PM PDT 24 Jul 29 05:26:01 PM PDT 24 77915479 ps
T913 /workspace/coverage/cover_reg_top/4.lc_ctrl_csr_mem_rw_with_rand_reset.120310660 Jul 29 05:25:33 PM PDT 24 Jul 29 05:25:35 PM PDT 24 32814949 ps
T914 /workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_aliasing.2107147317 Jul 29 05:24:51 PM PDT 24 Jul 29 05:24:55 PM PDT 24 3356484049 ps
T915 /workspace/coverage/cover_reg_top/2.lc_ctrl_csr_rw.1134470704 Jul 29 05:25:17 PM PDT 24 Jul 29 05:25:18 PM PDT 24 18238623 ps
T189 /workspace/coverage/cover_reg_top/2.lc_ctrl_csr_bit_bash.3620450235 Jul 29 05:25:16 PM PDT 24 Jul 29 05:25:17 PM PDT 24 73452233 ps
T109 /workspace/coverage/cover_reg_top/6.lc_ctrl_tl_errors.2393769174 Jul 29 05:25:39 PM PDT 24 Jul 29 05:25:42 PM PDT 24 325499954 ps
T916 /workspace/coverage/cover_reg_top/18.lc_ctrl_csr_rw.3026152052 Jul 29 05:25:59 PM PDT 24 Jul 29 05:26:00 PM PDT 24 27855536 ps
T917 /workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_same_csr_outstanding.1049665996 Jul 29 05:25:14 PM PDT 24 Jul 29 05:25:15 PM PDT 24 107843561 ps
T918 /workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_bit_bash.3382826645 Jul 29 05:25:39 PM PDT 24 Jul 29 05:25:44 PM PDT 24 492545479 ps
T919 /workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.1699001231 Jul 29 05:24:51 PM PDT 24 Jul 29 05:24:54 PM PDT 24 157541526 ps
T920 /workspace/coverage/cover_reg_top/4.lc_ctrl_tl_errors.1069591059 Jul 29 05:25:32 PM PDT 24 Jul 29 05:25:36 PM PDT 24 120311924 ps
T921 /workspace/coverage/cover_reg_top/8.lc_ctrl_csr_mem_rw_with_rand_reset.479937454 Jul 29 05:25:37 PM PDT 24 Jul 29 05:25:38 PM PDT 24 20264746 ps
T922 /workspace/coverage/cover_reg_top/14.lc_ctrl_same_csr_outstanding.40870633 Jul 29 05:26:02 PM PDT 24 Jul 29 05:26:04 PM PDT 24 189966238 ps
T923 /workspace/coverage/cover_reg_top/16.lc_ctrl_same_csr_outstanding.2711460280 Jul 29 05:25:59 PM PDT 24 Jul 29 05:26:01 PM PDT 24 49608450 ps
T924 /workspace/coverage/cover_reg_top/0.lc_ctrl_csr_mem_rw_with_rand_reset.570648866 Jul 29 05:24:58 PM PDT 24 Jul 29 05:25:00 PM PDT 24 48600233 ps
T925 /workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_csr_hw_reset.3610900408 Jul 29 05:25:33 PM PDT 24 Jul 29 05:25:34 PM PDT 24 184346329 ps
T926 /workspace/coverage/cover_reg_top/11.lc_ctrl_tl_errors.1008407978 Jul 29 05:25:44 PM PDT 24 Jul 29 05:25:47 PM PDT 24 44124977 ps
T927 /workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_bit_bash.305687075 Jul 29 05:25:29 PM PDT 24 Jul 29 05:25:42 PM PDT 24 1381269231 ps
T928 /workspace/coverage/cover_reg_top/0.lc_ctrl_same_csr_outstanding.785799564 Jul 29 05:24:59 PM PDT 24 Jul 29 05:25:00 PM PDT 24 30762378 ps
T929 /workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_same_csr_outstanding.3749762766 Jul 29 05:25:39 PM PDT 24 Jul 29 05:25:40 PM PDT 24 97423599 ps
T930 /workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_alert_test.1434268121 Jul 29 05:25:34 PM PDT 24 Jul 29 05:25:36 PM PDT 24 44450423 ps
T931 /workspace/coverage/cover_reg_top/5.lc_ctrl_same_csr_outstanding.536353660 Jul 29 05:25:34 PM PDT 24 Jul 29 05:25:35 PM PDT 24 30520062 ps
T932 /workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_same_csr_outstanding.414668122 Jul 29 05:25:41 PM PDT 24 Jul 29 05:25:42 PM PDT 24 52413836 ps
T933 /workspace/coverage/cover_reg_top/1.lc_ctrl_csr_hw_reset.630529884 Jul 29 05:25:00 PM PDT 24 Jul 29 05:25:01 PM PDT 24 64665858 ps
T934 /workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_alert_test.2308755589 Jul 29 05:25:32 PM PDT 24 Jul 29 05:25:33 PM PDT 24 31287914 ps
T935 /workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.3071385435 Jul 29 05:25:36 PM PDT 24 Jul 29 05:25:41 PM PDT 24 423761641 ps
T936 /workspace/coverage/cover_reg_top/9.lc_ctrl_tl_errors.4290807981 Jul 29 05:25:37 PM PDT 24 Jul 29 05:25:39 PM PDT 24 39056507 ps
T185 /workspace/coverage/cover_reg_top/5.lc_ctrl_csr_rw.2818693344 Jul 29 05:25:39 PM PDT 24 Jul 29 05:25:40 PM PDT 24 38271788 ps
T937 /workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.3695211764 Jul 29 05:25:14 PM PDT 24 Jul 29 05:25:17 PM PDT 24 325418329 ps
T938 /workspace/coverage/cover_reg_top/19.lc_ctrl_same_csr_outstanding.3688019764 Jul 29 05:26:03 PM PDT 24 Jul 29 05:26:04 PM PDT 24 26601366 ps
T939 /workspace/coverage/cover_reg_top/7.lc_ctrl_same_csr_outstanding.1762079206 Jul 29 05:25:35 PM PDT 24 Jul 29 05:25:36 PM PDT 24 30103359 ps
T940 /workspace/coverage/cover_reg_top/15.lc_ctrl_tl_errors.1508767419 Jul 29 05:26:00 PM PDT 24 Jul 29 05:26:04 PM PDT 24 226978674 ps
T941 /workspace/coverage/cover_reg_top/1.lc_ctrl_csr_mem_rw_with_rand_reset.790958732 Jul 29 05:25:01 PM PDT 24 Jul 29 05:25:03 PM PDT 24 31050063 ps
T133 /workspace/coverage/cover_reg_top/2.lc_ctrl_tl_intg_err.2434816103 Jul 29 05:25:16 PM PDT 24 Jul 29 05:25:19 PM PDT 24 189168795 ps
T942 /workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.204694018 Jul 29 05:24:56 PM PDT 24 Jul 29 05:24:59 PM PDT 24 116777656 ps
T943 /workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_csr_bit_bash.1918743112 Jul 29 05:25:33 PM PDT 24 Jul 29 05:25:48 PM PDT 24 6870744208 ps
T117 /workspace/coverage/cover_reg_top/19.lc_ctrl_tl_intg_err.3795580974 Jul 29 05:26:00 PM PDT 24 Jul 29 05:26:03 PM PDT 24 113540793 ps
T186 /workspace/coverage/cover_reg_top/3.lc_ctrl_csr_hw_reset.1084042256 Jul 29 05:25:27 PM PDT 24 Jul 29 05:25:28 PM PDT 24 15387063 ps
T944 /workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_rw.4089603387 Jul 29 05:25:04 PM PDT 24 Jul 29 05:25:05 PM PDT 24 164525673 ps
T945 /workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_rw.966952742 Jul 29 05:25:27 PM PDT 24 Jul 29 05:25:29 PM PDT 24 95044636 ps
T946 /workspace/coverage/cover_reg_top/3.lc_ctrl_csr_bit_bash.3515289105 Jul 29 05:25:27 PM PDT 24 Jul 29 05:25:28 PM PDT 24 129965624 ps
T947 /workspace/coverage/cover_reg_top/8.lc_ctrl_same_csr_outstanding.3161986548 Jul 29 05:25:36 PM PDT 24 Jul 29 05:25:38 PM PDT 24 50129514 ps
T948 /workspace/coverage/cover_reg_top/12.lc_ctrl_same_csr_outstanding.3333464925 Jul 29 05:25:58 PM PDT 24 Jul 29 05:25:59 PM PDT 24 67723903 ps
T949 /workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.1356647692 Jul 29 05:25:40 PM PDT 24 Jul 29 05:25:42 PM PDT 24 60354957 ps
T950 /workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_csr_rw.3652756064 Jul 29 05:25:33 PM PDT 24 Jul 29 05:25:35 PM PDT 24 114030587 ps
T951 /workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.2024995734 Jul 29 05:25:36 PM PDT 24 Jul 29 05:25:41 PM PDT 24 147504190 ps
T952 /workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_hw_reset.2302265714 Jul 29 05:25:39 PM PDT 24 Jul 29 05:25:43 PM PDT 24 150320520 ps
T120 /workspace/coverage/cover_reg_top/14.lc_ctrl_tl_intg_err.149720008 Jul 29 05:26:01 PM PDT 24 Jul 29 05:26:04 PM PDT 24 121008993 ps
T953 /workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_rw.3349554164 Jul 29 05:24:49 PM PDT 24 Jul 29 05:24:50 PM PDT 24 38660357 ps
T954 /workspace/coverage/cover_reg_top/4.lc_ctrl_csr_hw_reset.3808690910 Jul 29 05:25:34 PM PDT 24 Jul 29 05:25:35 PM PDT 24 50140440 ps
T123 /workspace/coverage/cover_reg_top/3.lc_ctrl_tl_intg_err.3363452623 Jul 29 05:25:28 PM PDT 24 Jul 29 05:25:31 PM PDT 24 237190092 ps
T110 /workspace/coverage/cover_reg_top/10.lc_ctrl_tl_intg_err.2913624515 Jul 29 05:25:42 PM PDT 24 Jul 29 05:25:45 PM PDT 24 250779260 ps
T955 /workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_alert_test.3536519014 Jul 29 05:25:39 PM PDT 24 Jul 29 05:25:42 PM PDT 24 64035550 ps
T956 /workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_aliasing.3372036084 Jul 29 05:25:28 PM PDT 24 Jul 29 05:25:42 PM PDT 24 3303582966 ps
T957 /workspace/coverage/cover_reg_top/16.lc_ctrl_tl_errors.2888157529 Jul 29 05:25:59 PM PDT 24 Jul 29 05:26:02 PM PDT 24 42009645 ps
T958 /workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_alert_test.1459662600 Jul 29 05:25:39 PM PDT 24 Jul 29 05:25:41 PM PDT 24 91686326 ps
T959 /workspace/coverage/cover_reg_top/10.lc_ctrl_csr_mem_rw_with_rand_reset.547642944 Jul 29 05:25:45 PM PDT 24 Jul 29 05:25:46 PM PDT 24 30930752 ps
T960 /workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_hw_reset.4073587459 Jul 29 05:25:27 PM PDT 24 Jul 29 05:25:29 PM PDT 24 100518698 ps
T961 /workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_rw.493243508 Jul 29 05:24:55 PM PDT 24 Jul 29 05:24:58 PM PDT 24 249018848 ps
T962 /workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_same_csr_outstanding.1412241608 Jul 29 05:25:27 PM PDT 24 Jul 29 05:25:28 PM PDT 24 14746601 ps
T963 /workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_alert_test.922041194 Jul 29 05:24:51 PM PDT 24 Jul 29 05:24:53 PM PDT 24 81423286 ps
T964 /workspace/coverage/cover_reg_top/11.lc_ctrl_same_csr_outstanding.3727720196 Jul 29 05:25:46 PM PDT 24 Jul 29 05:25:47 PM PDT 24 15869734 ps
T965 /workspace/coverage/cover_reg_top/7.lc_ctrl_csr_mem_rw_with_rand_reset.1394720877 Jul 29 05:25:35 PM PDT 24 Jul 29 05:25:36 PM PDT 24 35199786 ps
T126 /workspace/coverage/cover_reg_top/0.lc_ctrl_tl_intg_err.3029920486 Jul 29 05:24:52 PM PDT 24 Jul 29 05:24:56 PM PDT 24 304601062 ps
T111 /workspace/coverage/cover_reg_top/4.lc_ctrl_tl_intg_err.3965371729 Jul 29 05:25:35 PM PDT 24 Jul 29 05:25:38 PM PDT 24 98539943 ps
T966 /workspace/coverage/cover_reg_top/0.lc_ctrl_csr_aliasing.3663328307 Jul 29 05:24:56 PM PDT 24 Jul 29 05:24:57 PM PDT 24 30252114 ps
T127 /workspace/coverage/cover_reg_top/11.lc_ctrl_tl_intg_err.882200980 Jul 29 05:25:45 PM PDT 24 Jul 29 05:25:48 PM PDT 24 68983906 ps
T967 /workspace/coverage/cover_reg_top/6.lc_ctrl_csr_rw.3927037880 Jul 29 05:25:39 PM PDT 24 Jul 29 05:25:41 PM PDT 24 16409895 ps
T968 /workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_bit_bash.4272953271 Jul 29 05:25:36 PM PDT 24 Jul 29 05:26:27 PM PDT 24 2351541769 ps
T969 /workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_same_csr_outstanding.3055987579 Jul 29 05:24:48 PM PDT 24 Jul 29 05:24:49 PM PDT 24 50528385 ps
T970 /workspace/coverage/cover_reg_top/4.lc_ctrl_csr_aliasing.3587027027 Jul 29 05:25:33 PM PDT 24 Jul 29 05:25:34 PM PDT 24 32328685 ps
T971 /workspace/coverage/cover_reg_top/6.lc_ctrl_same_csr_outstanding.3721752944 Jul 29 05:25:34 PM PDT 24 Jul 29 05:25:35 PM PDT 24 56255827 ps
T972 /workspace/coverage/cover_reg_top/6.lc_ctrl_csr_mem_rw_with_rand_reset.3755907765 Jul 29 05:25:36 PM PDT 24 Jul 29 05:25:37 PM PDT 24 84120786 ps
T130 /workspace/coverage/cover_reg_top/6.lc_ctrl_tl_intg_err.2437899241 Jul 29 05:25:38 PM PDT 24 Jul 29 05:25:41 PM PDT 24 252953842 ps
T973 /workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_hw_reset.110071794 Jul 29 05:25:35 PM PDT 24 Jul 29 05:25:38 PM PDT 24 109711882 ps
T974 /workspace/coverage/cover_reg_top/19.lc_ctrl_tl_errors.384322007 Jul 29 05:25:59 PM PDT 24 Jul 29 05:26:03 PM PDT 24 512194987 ps
T187 /workspace/coverage/cover_reg_top/3.lc_ctrl_csr_aliasing.2590482169 Jul 29 05:25:29 PM PDT 24 Jul 29 05:25:30 PM PDT 24 48834839 ps
T975 /workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_hw_reset.3618416378 Jul 29 05:24:52 PM PDT 24 Jul 29 05:24:54 PM PDT 24 695219611 ps
T976 /workspace/coverage/cover_reg_top/17.lc_ctrl_tl_errors.3706878089 Jul 29 05:25:59 PM PDT 24 Jul 29 05:26:02 PM PDT 24 51442135 ps
T977 /workspace/coverage/cover_reg_top/19.lc_ctrl_csr_rw.3461340580 Jul 29 05:26:01 PM PDT 24 Jul 29 05:26:02 PM PDT 24 36813885 ps
T978 /workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.3830110982 Jul 29 05:25:38 PM PDT 24 Jul 29 05:25:40 PM PDT 24 504904303 ps
T121 /workspace/coverage/cover_reg_top/1.lc_ctrl_tl_intg_err.744308772 Jul 29 05:24:59 PM PDT 24 Jul 29 05:25:01 PM PDT 24 66133351 ps
T979 /workspace/coverage/cover_reg_top/4.lc_ctrl_same_csr_outstanding.2506651000 Jul 29 05:25:35 PM PDT 24 Jul 29 05:25:36 PM PDT 24 54435378 ps
T980 /workspace/coverage/cover_reg_top/3.lc_ctrl_tl_errors.1559093947 Jul 29 05:25:26 PM PDT 24 Jul 29 05:25:28 PM PDT 24 185569302 ps
T124 /workspace/coverage/cover_reg_top/13.lc_ctrl_tl_intg_err.2717271445 Jul 29 05:26:00 PM PDT 24 Jul 29 05:26:02 PM PDT 24 123534500 ps
T981 /workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_same_csr_outstanding.1770347063 Jul 29 05:25:36 PM PDT 24 Jul 29 05:25:38 PM PDT 24 41882122 ps
T982 /workspace/coverage/cover_reg_top/4.lc_ctrl_csr_rw.2656582944 Jul 29 05:25:35 PM PDT 24 Jul 29 05:25:36 PM PDT 24 60140069 ps
T983 /workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_aliasing.201907091 Jul 29 05:25:35 PM PDT 24 Jul 29 05:25:44 PM PDT 24 869474378 ps
T984 /workspace/coverage/cover_reg_top/9.lc_ctrl_csr_rw.952071492 Jul 29 05:25:44 PM PDT 24 Jul 29 05:25:45 PM PDT 24 29526486 ps
T985 /workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_alert_test.1818547001 Jul 29 05:25:39 PM PDT 24 Jul 29 05:25:41 PM PDT 24 190723272 ps
T986 /workspace/coverage/cover_reg_top/9.lc_ctrl_csr_mem_rw_with_rand_reset.1165777136 Jul 29 05:25:45 PM PDT 24 Jul 29 05:25:47 PM PDT 24 254008789 ps
T987 /workspace/coverage/cover_reg_top/10.lc_ctrl_tl_errors.1836643036 Jul 29 05:25:43 PM PDT 24 Jul 29 05:25:46 PM PDT 24 45674022 ps
T988 /workspace/coverage/cover_reg_top/12.lc_ctrl_csr_mem_rw_with_rand_reset.1688567393 Jul 29 05:25:51 PM PDT 24 Jul 29 05:25:52 PM PDT 24 21752349 ps
T989 /workspace/coverage/cover_reg_top/5.lc_ctrl_tl_intg_err.2141543470 Jul 29 05:25:34 PM PDT 24 Jul 29 05:25:36 PM PDT 24 305954493 ps
T990 /workspace/coverage/cover_reg_top/0.lc_ctrl_csr_hw_reset.2432343993 Jul 29 05:24:51 PM PDT 24 Jul 29 05:24:53 PM PDT 24 55901419 ps
T991 /workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_bit_bash.1994925015 Jul 29 05:25:40 PM PDT 24 Jul 29 05:25:46 PM PDT 24 1668876882 ps
T992 /workspace/coverage/cover_reg_top/1.lc_ctrl_tl_errors.1330753622 Jul 29 05:24:58 PM PDT 24 Jul 29 05:25:00 PM PDT 24 36364688 ps
T131 /workspace/coverage/cover_reg_top/8.lc_ctrl_tl_intg_err.3463778041 Jul 29 05:25:39 PM PDT 24 Jul 29 05:25:41 PM PDT 24 974643881 ps
T993 /workspace/coverage/cover_reg_top/11.lc_ctrl_csr_mem_rw_with_rand_reset.4220373813 Jul 29 05:25:44 PM PDT 24 Jul 29 05:25:46 PM PDT 24 20181510 ps
T994 /workspace/coverage/cover_reg_top/15.lc_ctrl_csr_mem_rw_with_rand_reset.397987149 Jul 29 05:26:01 PM PDT 24 Jul 29 05:26:02 PM PDT 24 139314958 ps
T995 /workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_aliasing.1394952701 Jul 29 05:25:28 PM PDT 24 Jul 29 05:25:33 PM PDT 24 926489222 ps
T996 /workspace/coverage/cover_reg_top/5.lc_ctrl_csr_mem_rw_with_rand_reset.1842918792 Jul 29 05:25:38 PM PDT 24 Jul 29 05:25:39 PM PDT 24 18930143 ps
T997 /workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_same_csr_outstanding.1878621644 Jul 29 05:24:58 PM PDT 24 Jul 29 05:24:59 PM PDT 24 33049703 ps
T998 /workspace/coverage/cover_reg_top/14.lc_ctrl_tl_errors.130843179 Jul 29 05:25:59 PM PDT 24 Jul 29 05:26:02 PM PDT 24 126043058 ps
T129 /workspace/coverage/cover_reg_top/15.lc_ctrl_tl_intg_err.1773710196 Jul 29 05:26:00 PM PDT 24 Jul 29 05:26:03 PM PDT 24 174646695 ps
T999 /workspace/coverage/cover_reg_top/0.lc_ctrl_tl_errors.3427194961 Jul 29 05:24:52 PM PDT 24 Jul 29 05:24:54 PM PDT 24 143066399 ps
T1000 /workspace/coverage/cover_reg_top/11.lc_ctrl_csr_rw.287593650 Jul 29 05:25:43 PM PDT 24 Jul 29 05:25:45 PM PDT 24 16594407 ps
T188 /workspace/coverage/cover_reg_top/1.lc_ctrl_csr_rw.3390632933 Jul 29 05:25:04 PM PDT 24 Jul 29 05:25:04 PM PDT 24 12314028 ps
0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%