SCORE | INSTANCES | WEIGHT | GOAL | AT LEAST | PER INSTANCE | AUTO BIN MAX | PRINT MISSING |
100.00 | 91.67 | 1 | 100 | 1 | 1 | 64 | 64 |
NAME | SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
mubi4_cov_of_tb.dut.u_otp_lc_data_i_rma_token_valid_if | 83.33 | 1 | 100 | 1 | 64 | 64 |
mubi4_cov_of_tb.dut.u_otp_lc_data_i_secrets_valid_if | 83.33 | 1 | 100 | 1 | 64 | 64 |
mubi4_cov_of_tb.dut.u_otp_lc_data_i_test_tokens_valid_if | 83.33 | 1 | 100 | 1 | 64 | 64 |
mubi4_cov_of_tb.dut.u_lc_clk_byp_ack_i_if | 100.00 | 1 | 100 | 1 | 64 | 64 |
mubi4_cov_of_tb.dut.u_lc_flash_rma_ack_i_if.gen_connect_lc_tx_items[0].lc_tx_if | 100.00 | 1 | 100 | 1 | 64 | 64 |
mubi4_cov_of_tb.dut.u_lc_flash_rma_ack_i_if.gen_connect_lc_tx_items[1].lc_tx_if | 100.00 | 1 | 100 | 1 | 64 | 64 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
83.33 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 6 | 1 | 5 | 83.33 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_value | 6 | 1 | 5 | 83.33 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
83.33 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 6 | 1 | 5 | 83.33 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_value | 6 | 1 | 5 | 83.33 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
83.33 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 6 | 1 | 5 | 83.33 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_value | 6 | 1 | 5 | 83.33 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 6 | 0 | 6 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_value | 6 | 0 | 6 | 100.00 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 6 | 0 | 6 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_value | 6 | 0 | 6 | 100.00 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 6 | 0 | 6 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_value | 6 | 0 | 6 | 100.00 | 100 | 1 | 1 | 0 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 6 | 1 | 5 | 83.33 |
NAME | COUNT | AT LEAST | NUMBER | STATUS |
false | 0 | 1 | 1 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
others[0] | 322 | 1 | T13 | 8 | T32 | 6 | T64 | 8 | ||||
others[1] | 307 | 1 | T13 | 6 | T32 | 6 | T64 | 2 | ||||
others[2] | 336 | 1 | T13 | 3 | T32 | 11 | T64 | 6 | ||||
others[3] | 554 | 1 | T13 | 2 | T32 | 18 | T64 | 14 | ||||
true | 58622 | 1 | T1 | 61 | T2 | 79 | T3 | 55 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 6 | 1 | 5 | 83.33 |
NAME | COUNT | AT LEAST | NUMBER | STATUS |
true | 0 | 1 | 1 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
others[0] | 326 | 1 | T13 | 2 | T32 | 2 | T233 | 6 | ||||
others[1] | 295 | 1 | T13 | 2 | T32 | 11 | T64 | 8 | ||||
others[2] | 308 | 1 | T13 | 2 | T32 | 9 | T64 | 4 | ||||
others[3] | 540 | 1 | T13 | 10 | T32 | 19 | T64 | 10 | ||||
false | 58641 | 1 | T1 | 61 | T2 | 79 | T3 | 55 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 6 | 1 | 5 | 83.33 |
NAME | COUNT | AT LEAST | NUMBER | STATUS |
false | 0 | 1 | 1 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
others[0] | 376 | 1 | T13 | 6 | T32 | 10 | T64 | 4 | ||||
others[1] | 306 | 1 | T13 | 12 | T32 | 8 | T64 | 8 | ||||
others[2] | 303 | 1 | T13 | 4 | T32 | 6 | T64 | 6 | ||||
others[3] | 544 | 1 | T13 | 10 | T32 | 8 | T64 | 6 | ||||
true | 58645 | 1 | T1 | 61 | T2 | 79 | T3 | 55 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 6 | 0 | 6 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
others[0] | 151 | 1 | T13 | 2 | T32 | 6 | T64 | 1 | ||||
others[1] | 148 | 1 | T13 | 4 | T32 | 1 | T64 | 4 | ||||
others[2] | 155 | 1 | T13 | 1 | T32 | 6 | T233 | 2 | ||||
others[3] | 282 | 1 | T13 | 2 | T32 | 7 | T64 | 8 | ||||
false | 991677 | 1 | T1 | 61 | T2 | 79 | T3 | 55 | ||||
true | 932179 | 1 | T11 | 2 | T4 | 33017 | T5 | 24211 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 6 | 0 | 6 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
others[0] | 178 | 1 | T13 | 7 | T32 | 4 | T64 | 2 | ||||
others[1] | 163 | 1 | T13 | 4 | T32 | 2 | T233 | 6 | ||||
others[2] | 182 | 1 | T13 | 1 | T32 | 2 | T64 | 2 | ||||
others[3] | 329 | 1 | T13 | 4 | T32 | 12 | T64 | 3 | ||||
false | 3472875 | 1 | T1 | 61 | T2 | 80 | T3 | 55 | ||||
true | 3413398 | 1 | T2 | 1 | T11 | 1 | T4 | 39827 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 6 | 0 | 6 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
others[0] | 178 | 1 | T13 | 7 | T32 | 4 | T64 | 2 | ||||
others[1] | 163 | 1 | T13 | 4 | T32 | 2 | T233 | 6 | ||||
others[2] | 182 | 1 | T13 | 1 | T32 | 2 | T64 | 2 | ||||
others[3] | 329 | 1 | T13 | 4 | T32 | 12 | T64 | 3 | ||||
false | 3472875 | 1 | T1 | 61 | T2 | 80 | T3 | 55 | ||||
true | 3413398 | 1 | T2 | 1 | T11 | 1 | T4 | 39827 |
0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |