SCORE | INSTANCES | WEIGHT | GOAL | AT LEAST | PER INSTANCE | AUTO BIN MAX | PRINT MISSING |
100.00 | 91.67 | 1 | 100 | 1 | 1 | 64 | 64 |
NAME | SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
mubi4_cov_of_tb.dut.u_otp_lc_data_i_rma_token_valid_if | 83.33 | 1 | 100 | 1 | 64 | 64 |
mubi4_cov_of_tb.dut.u_otp_lc_data_i_secrets_valid_if | 83.33 | 1 | 100 | 1 | 64 | 64 |
mubi4_cov_of_tb.dut.u_otp_lc_data_i_test_tokens_valid_if | 83.33 | 1 | 100 | 1 | 64 | 64 |
mubi4_cov_of_tb.dut.u_lc_clk_byp_ack_i_if | 100.00 | 1 | 100 | 1 | 64 | 64 |
mubi4_cov_of_tb.dut.u_lc_flash_rma_ack_i_if.gen_connect_lc_tx_items[0].lc_tx_if | 100.00 | 1 | 100 | 1 | 64 | 64 |
mubi4_cov_of_tb.dut.u_lc_flash_rma_ack_i_if.gen_connect_lc_tx_items[1].lc_tx_if | 100.00 | 1 | 100 | 1 | 64 | 64 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
83.33 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 6 | 1 | 5 | 83.33 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_value | 6 | 1 | 5 | 83.33 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
83.33 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 6 | 1 | 5 | 83.33 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_value | 6 | 1 | 5 | 83.33 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
83.33 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 6 | 1 | 5 | 83.33 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_value | 6 | 1 | 5 | 83.33 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 6 | 0 | 6 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_value | 6 | 0 | 6 | 100.00 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 6 | 0 | 6 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_value | 6 | 0 | 6 | 100.00 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 6 | 0 | 6 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_value | 6 | 0 | 6 | 100.00 | 100 | 1 | 1 | 0 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 6 | 1 | 5 | 83.33 |
NAME | COUNT | AT LEAST | NUMBER | STATUS |
false | 0 | 1 | 1 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
others[0] | 382 | 1 | T16 | 4 | T48 | 8 | T36 | 4 | ||||
others[1] | 309 | 1 | T16 | 2 | T48 | 2 | T36 | 7 | ||||
others[2] | 324 | 1 | T16 | 8 | T48 | 4 | T36 | 6 | ||||
others[3] | 532 | 1 | T16 | 20 | T48 | 6 | T36 | 16 | ||||
true | 52511 | 1 | T1 | 1 | T2 | 1 | T3 | 87 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 6 | 1 | 5 | 83.33 |
NAME | COUNT | AT LEAST | NUMBER | STATUS |
true | 0 | 1 | 1 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
others[0] | 352 | 1 | T16 | 16 | T48 | 8 | T36 | 10 | ||||
others[1] | 329 | 1 | T16 | 8 | T48 | 12 | T36 | 6 | ||||
others[2] | 299 | 1 | T48 | 4 | T36 | 8 | T191 | 2 | ||||
others[3] | 521 | 1 | T16 | 9 | T48 | 10 | T36 | 26 | ||||
false | 52526 | 1 | T1 | 1 | T2 | 1 | T3 | 87 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 6 | 1 | 5 | 83.33 |
NAME | COUNT | AT LEAST | NUMBER | STATUS |
false | 0 | 1 | 1 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
others[0] | 316 | 1 | T16 | 12 | T48 | 6 | T36 | 8 | ||||
others[1] | 345 | 1 | T48 | 2 | T36 | 10 | T191 | 10 | ||||
others[2] | 391 | 1 | T16 | 8 | T48 | 6 | T36 | 8 | ||||
others[3] | 535 | 1 | T16 | 2 | T48 | 6 | T36 | 20 | ||||
true | 52514 | 1 | T1 | 1 | T2 | 1 | T3 | 87 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 6 | 0 | 6 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
others[0] | 137 | 1 | T16 | 3 | T48 | 2 | T36 | 4 | ||||
others[1] | 153 | 1 | T16 | 2 | T48 | 2 | T36 | 3 | ||||
others[2] | 138 | 1 | T16 | 4 | T48 | 3 | T36 | 3 | ||||
others[3] | 279 | 1 | T16 | 10 | T48 | 8 | T36 | 1 | ||||
false | 1038128 | 1 | T1 | 1 | T2 | 1 | T3 | 87 | ||||
true | 984757 | 1 | T4 | 2 | T5 | 3 | T7 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 6 | 0 | 6 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
others[0] | 180 | 1 | T16 | 1 | T48 | 2 | T36 | 6 | ||||
others[1] | 188 | 1 | T16 | 1 | T48 | 7 | T36 | 3 | ||||
others[2] | 189 | 1 | T16 | 5 | T48 | 1 | T36 | 6 | ||||
others[3] | 253 | 1 | T16 | 3 | T48 | 1 | T36 | 7 | ||||
false | 3457089 | 1 | T1 | 1 | T2 | 1 | T3 | 89 | ||||
true | 3403738 | 1 | T3 | 2 | T4 | 1 | T12 | 3 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 6 | 0 | 6 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
others[0] | 180 | 1 | T16 | 1 | T48 | 2 | T36 | 6 | ||||
others[1] | 188 | 1 | T16 | 1 | T48 | 7 | T36 | 3 | ||||
others[2] | 189 | 1 | T16 | 5 | T48 | 1 | T36 | 6 | ||||
others[3] | 253 | 1 | T16 | 3 | T48 | 1 | T36 | 7 | ||||
false | 3457089 | 1 | T1 | 1 | T2 | 1 | T3 | 89 | ||||
true | 3403738 | 1 | T3 | 2 | T4 | 1 | T12 | 3 |
0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |