Tests
dashboard | hierarchy | modlist | groups | tests | asserts
Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
96.89 97.99 95.50 93.38 97.67 98.55 99.00 96.11


Total test records in report: 1002
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html

T806 /workspace/coverage/default/40.lc_ctrl_jtag_access.2218225825 Jun 26 04:42:49 PM PDT 24 Jun 26 04:42:55 PM PDT 24 72634127 ps
T807 /workspace/coverage/default/36.lc_ctrl_state_failure.1327071627 Jun 26 04:42:38 PM PDT 24 Jun 26 04:43:14 PM PDT 24 360168010 ps
T808 /workspace/coverage/default/5.lc_ctrl_jtag_state_failure.2403935604 Jun 26 04:41:07 PM PDT 24 Jun 26 04:41:50 PM PDT 24 1414586528 ps
T809 /workspace/coverage/default/9.lc_ctrl_jtag_access.23733795 Jun 26 04:41:19 PM PDT 24 Jun 26 04:41:40 PM PDT 24 578129308 ps
T810 /workspace/coverage/default/3.lc_ctrl_state_post_trans.3751683567 Jun 26 04:40:50 PM PDT 24 Jun 26 04:41:04 PM PDT 24 197904300 ps
T811 /workspace/coverage/default/48.lc_ctrl_sec_token_mux.2262064659 Jun 26 04:43:11 PM PDT 24 Jun 26 04:43:26 PM PDT 24 5958776581 ps
T812 /workspace/coverage/default/13.lc_ctrl_jtag_errors.1880063055 Jun 26 04:41:28 PM PDT 24 Jun 26 04:42:18 PM PDT 24 6033608910 ps
T158 /workspace/coverage/default/25.lc_ctrl_stress_all_with_rand_reset.242854604 Jun 26 04:42:17 PM PDT 24 Jun 26 04:55:31 PM PDT 24 151504065184 ps
T813 /workspace/coverage/default/14.lc_ctrl_jtag_errors.3044382280 Jun 26 04:41:35 PM PDT 24 Jun 26 04:42:10 PM PDT 24 36820744622 ps
T814 /workspace/coverage/default/10.lc_ctrl_alert_test.4263325006 Jun 26 04:41:17 PM PDT 24 Jun 26 04:41:24 PM PDT 24 17536212 ps
T815 /workspace/coverage/default/0.lc_ctrl_jtag_state_failure.3323742036 Jun 26 04:40:38 PM PDT 24 Jun 26 04:41:27 PM PDT 24 1819141110 ps
T816 /workspace/coverage/default/27.lc_ctrl_stress_all.4124153319 Jun 26 04:42:16 PM PDT 24 Jun 26 04:46:57 PM PDT 24 16094052833 ps
T817 /workspace/coverage/default/9.lc_ctrl_security_escalation.4236076437 Jun 26 04:41:19 PM PDT 24 Jun 26 04:41:36 PM PDT 24 1762594739 ps
T818 /workspace/coverage/default/40.lc_ctrl_stress_all_with_rand_reset.1953877079 Jun 26 04:42:57 PM PDT 24 Jun 26 04:54:05 PM PDT 24 31771978989 ps
T819 /workspace/coverage/default/3.lc_ctrl_regwen_during_op.1111256437 Jun 26 04:40:50 PM PDT 24 Jun 26 04:41:11 PM PDT 24 787281383 ps
T820 /workspace/coverage/default/42.lc_ctrl_alert_test.328482424 Jun 26 04:42:56 PM PDT 24 Jun 26 04:43:02 PM PDT 24 22101294 ps
T821 /workspace/coverage/default/43.lc_ctrl_security_escalation.1916538800 Jun 26 04:42:57 PM PDT 24 Jun 26 04:43:10 PM PDT 24 266795943 ps
T822 /workspace/coverage/default/10.lc_ctrl_jtag_state_failure.923505074 Jun 26 04:41:16 PM PDT 24 Jun 26 04:41:48 PM PDT 24 807932426 ps
T823 /workspace/coverage/default/1.lc_ctrl_jtag_regwen_during_op.3535798951 Jun 26 04:40:42 PM PDT 24 Jun 26 04:41:01 PM PDT 24 1438840402 ps
T824 /workspace/coverage/default/6.lc_ctrl_prog_failure.33758879 Jun 26 04:41:05 PM PDT 24 Jun 26 04:41:12 PM PDT 24 76715655 ps
T825 /workspace/coverage/default/4.lc_ctrl_volatile_unlock_smoke.867567814 Jun 26 04:40:55 PM PDT 24 Jun 26 04:41:03 PM PDT 24 52054037 ps
T826 /workspace/coverage/default/31.lc_ctrl_state_post_trans.1533339001 Jun 26 04:42:22 PM PDT 24 Jun 26 04:42:33 PM PDT 24 143102512 ps
T827 /workspace/coverage/default/25.lc_ctrl_alert_test.3088053506 Jun 26 04:42:12 PM PDT 24 Jun 26 04:42:17 PM PDT 24 64666337 ps
T828 /workspace/coverage/default/0.lc_ctrl_jtag_smoke.2535807815 Jun 26 04:40:33 PM PDT 24 Jun 26 04:40:41 PM PDT 24 218981550 ps
T829 /workspace/coverage/default/40.lc_ctrl_alert_test.2282176865 Jun 26 04:42:56 PM PDT 24 Jun 26 04:43:01 PM PDT 24 17662414 ps
T830 /workspace/coverage/default/2.lc_ctrl_prog_failure.3419473633 Jun 26 04:40:46 PM PDT 24 Jun 26 04:40:54 PM PDT 24 309659719 ps
T831 /workspace/coverage/default/1.lc_ctrl_jtag_state_post_trans.977493482 Jun 26 04:40:41 PM PDT 24 Jun 26 04:41:05 PM PDT 24 1948356136 ps
T832 /workspace/coverage/default/2.lc_ctrl_sec_token_digest.2099405758 Jun 26 04:40:48 PM PDT 24 Jun 26 04:41:04 PM PDT 24 1069356963 ps
T833 /workspace/coverage/default/1.lc_ctrl_jtag_access.2236303347 Jun 26 04:40:45 PM PDT 24 Jun 26 04:41:02 PM PDT 24 462031442 ps
T834 /workspace/coverage/default/38.lc_ctrl_prog_failure.124518118 Jun 26 04:42:52 PM PDT 24 Jun 26 04:42:58 PM PDT 24 58652852 ps
T835 /workspace/coverage/default/10.lc_ctrl_stress_all.3753996103 Jun 26 04:41:20 PM PDT 24 Jun 26 04:42:36 PM PDT 24 10612106394 ps
T836 /workspace/coverage/default/39.lc_ctrl_security_escalation.2136696177 Jun 26 04:42:57 PM PDT 24 Jun 26 04:43:09 PM PDT 24 309773282 ps
T837 /workspace/coverage/default/4.lc_ctrl_state_post_trans.219222157 Jun 26 04:40:51 PM PDT 24 Jun 26 04:41:06 PM PDT 24 59700140 ps
T838 /workspace/coverage/default/15.lc_ctrl_volatile_unlock_smoke.4190576925 Jun 26 04:41:38 PM PDT 24 Jun 26 04:41:41 PM PDT 24 38580719 ps
T839 /workspace/coverage/default/38.lc_ctrl_volatile_unlock_smoke.2792731264 Jun 26 04:42:42 PM PDT 24 Jun 26 04:42:45 PM PDT 24 19155164 ps
T840 /workspace/coverage/default/12.lc_ctrl_state_post_trans.2649265089 Jun 26 04:41:30 PM PDT 24 Jun 26 04:41:43 PM PDT 24 227111805 ps
T841 /workspace/coverage/default/11.lc_ctrl_jtag_state_post_trans.624625038 Jun 26 04:41:16 PM PDT 24 Jun 26 04:41:30 PM PDT 24 408910039 ps
T842 /workspace/coverage/default/24.lc_ctrl_sec_token_mux.4273190053 Jun 26 04:42:09 PM PDT 24 Jun 26 04:42:18 PM PDT 24 751012569 ps
T843 /workspace/coverage/default/8.lc_ctrl_errors.3366400003 Jun 26 04:41:12 PM PDT 24 Jun 26 04:41:29 PM PDT 24 772157302 ps
T844 /workspace/coverage/default/29.lc_ctrl_security_escalation.1985689316 Jun 26 04:42:21 PM PDT 24 Jun 26 04:42:36 PM PDT 24 815329050 ps
T845 /workspace/coverage/default/34.lc_ctrl_state_post_trans.3878942867 Jun 26 04:42:35 PM PDT 24 Jun 26 04:42:44 PM PDT 24 309636682 ps
T846 /workspace/coverage/default/15.lc_ctrl_prog_failure.2270102264 Jun 26 04:41:43 PM PDT 24 Jun 26 04:41:48 PM PDT 24 212572438 ps
T847 /workspace/coverage/default/16.lc_ctrl_sec_token_mux.2136839370 Jun 26 04:41:46 PM PDT 24 Jun 26 04:41:56 PM PDT 24 1663086986 ps
T848 /workspace/coverage/default/29.lc_ctrl_alert_test.3953029152 Jun 26 04:42:23 PM PDT 24 Jun 26 04:42:28 PM PDT 24 84753882 ps
T849 /workspace/coverage/default/29.lc_ctrl_state_post_trans.2803571221 Jun 26 04:42:22 PM PDT 24 Jun 26 04:42:35 PM PDT 24 380926734 ps
T850 /workspace/coverage/default/11.lc_ctrl_stress_all.83210031 Jun 26 04:41:24 PM PDT 24 Jun 26 04:42:33 PM PDT 24 5947231108 ps
T851 /workspace/coverage/default/11.lc_ctrl_volatile_unlock_smoke.4117510867 Jun 26 04:41:20 PM PDT 24 Jun 26 04:41:27 PM PDT 24 18852108 ps
T852 /workspace/coverage/default/46.lc_ctrl_errors.3670035681 Jun 26 04:43:07 PM PDT 24 Jun 26 04:43:28 PM PDT 24 4889145153 ps
T853 /workspace/coverage/default/3.lc_ctrl_jtag_priority.463151547 Jun 26 04:40:52 PM PDT 24 Jun 26 04:41:03 PM PDT 24 315213914 ps
T854 /workspace/coverage/default/27.lc_ctrl_sec_mubi.2242781887 Jun 26 04:42:17 PM PDT 24 Jun 26 04:42:38 PM PDT 24 1226289821 ps
T855 /workspace/coverage/default/24.lc_ctrl_state_failure.3515087175 Jun 26 04:42:08 PM PDT 24 Jun 26 04:42:50 PM PDT 24 1944822498 ps
T856 /workspace/coverage/default/16.lc_ctrl_errors.3001579227 Jun 26 04:41:46 PM PDT 24 Jun 26 04:41:56 PM PDT 24 2104025742 ps
T857 /workspace/coverage/default/21.lc_ctrl_state_failure.1299005381 Jun 26 04:42:02 PM PDT 24 Jun 26 04:42:42 PM PDT 24 607788313 ps
T858 /workspace/coverage/default/24.lc_ctrl_alert_test.3518732448 Jun 26 04:42:10 PM PDT 24 Jun 26 04:42:14 PM PDT 24 38458165 ps
T859 /workspace/coverage/default/14.lc_ctrl_jtag_state_failure.134942100 Jun 26 04:41:36 PM PDT 24 Jun 26 04:42:24 PM PDT 24 3984507816 ps
T860 /workspace/coverage/default/47.lc_ctrl_smoke.1423290428 Jun 26 04:43:09 PM PDT 24 Jun 26 04:43:16 PM PDT 24 49153581 ps
T861 /workspace/coverage/default/18.lc_ctrl_jtag_prog_failure.127989449 Jun 26 04:41:56 PM PDT 24 Jun 26 04:42:09 PM PDT 24 5583601144 ps
T862 /workspace/coverage/default/39.lc_ctrl_errors.1144160188 Jun 26 04:42:47 PM PDT 24 Jun 26 04:43:04 PM PDT 24 573597301 ps
T863 /workspace/coverage/default/11.lc_ctrl_state_failure.1098073340 Jun 26 04:41:18 PM PDT 24 Jun 26 04:41:53 PM PDT 24 1012150280 ps
T864 /workspace/coverage/default/2.lc_ctrl_sec_token_mux.177330807 Jun 26 04:40:48 PM PDT 24 Jun 26 04:41:11 PM PDT 24 2725714216 ps
T865 /workspace/coverage/default/8.lc_ctrl_jtag_state_failure.207689960 Jun 26 04:41:10 PM PDT 24 Jun 26 04:42:03 PM PDT 24 1370542189 ps
T866 /workspace/coverage/default/12.lc_ctrl_volatile_unlock_smoke.3204981692 Jun 26 04:41:24 PM PDT 24 Jun 26 04:41:31 PM PDT 24 109576482 ps
T867 /workspace/coverage/default/45.lc_ctrl_sec_token_digest.1484471302 Jun 26 04:43:07 PM PDT 24 Jun 26 04:43:18 PM PDT 24 314465749 ps
T868 /workspace/coverage/default/27.lc_ctrl_errors.3166265587 Jun 26 04:42:15 PM PDT 24 Jun 26 04:42:37 PM PDT 24 371299755 ps
T869 /workspace/coverage/default/16.lc_ctrl_volatile_unlock_smoke.1255321544 Jun 26 04:41:41 PM PDT 24 Jun 26 04:41:43 PM PDT 24 58600617 ps
T870 /workspace/coverage/default/48.lc_ctrl_security_escalation.3328553952 Jun 26 04:43:09 PM PDT 24 Jun 26 04:43:22 PM PDT 24 365668798 ps
T871 /workspace/coverage/default/33.lc_ctrl_sec_mubi.1771261222 Jun 26 04:42:29 PM PDT 24 Jun 26 04:42:41 PM PDT 24 284822661 ps
T114 /workspace/coverage/cover_reg_top/12.lc_ctrl_tl_intg_err.658744667 Jun 26 04:39:51 PM PDT 24 Jun 26 04:39:55 PM PDT 24 48342641 ps
T115 /workspace/coverage/cover_reg_top/13.lc_ctrl_tl_intg_err.1482357822 Jun 26 04:39:56 PM PDT 24 Jun 26 04:40:01 PM PDT 24 80082815 ps
T116 /workspace/coverage/cover_reg_top/16.lc_ctrl_tl_intg_err.3346771604 Jun 26 04:39:53 PM PDT 24 Jun 26 04:39:59 PM PDT 24 364402252 ps
T119 /workspace/coverage/cover_reg_top/0.lc_ctrl_tl_intg_err.3503607891 Jun 26 04:39:07 PM PDT 24 Jun 26 04:39:10 PM PDT 24 65219077 ps
T146 /workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_hw_reset.3965987411 Jun 26 04:39:42 PM PDT 24 Jun 26 04:39:45 PM PDT 24 90305167 ps
T872 /workspace/coverage/cover_reg_top/11.lc_ctrl_csr_rw.3459692479 Jun 26 04:39:58 PM PDT 24 Jun 26 04:40:03 PM PDT 24 17009001 ps
T190 /workspace/coverage/cover_reg_top/16.lc_ctrl_same_csr_outstanding.3251958035 Jun 26 04:39:51 PM PDT 24 Jun 26 04:39:55 PM PDT 24 35585886 ps
T149 /workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_bit_bash.1087102431 Jun 26 04:39:28 PM PDT 24 Jun 26 04:39:58 PM PDT 24 9130448234 ps
T183 /workspace/coverage/cover_reg_top/14.lc_ctrl_csr_rw.886302404 Jun 26 04:39:53 PM PDT 24 Jun 26 04:39:56 PM PDT 24 148437131 ps
T120 /workspace/coverage/cover_reg_top/9.lc_ctrl_tl_errors.749056947 Jun 26 04:39:45 PM PDT 24 Jun 26 04:39:48 PM PDT 24 25064131 ps
T147 /workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_hw_reset.1057264950 Jun 26 04:39:15 PM PDT 24 Jun 26 04:39:18 PM PDT 24 159276293 ps
T148 /workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_hw_reset.3625418173 Jun 26 04:39:28 PM PDT 24 Jun 26 04:39:31 PM PDT 24 1086094674 ps
T121 /workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.735004702 Jun 26 04:39:49 PM PDT 24 Jun 26 04:39:53 PM PDT 24 51708866 ps
T873 /workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_hw_reset.307978301 Jun 26 04:39:40 PM PDT 24 Jun 26 04:39:44 PM PDT 24 398616013 ps
T874 /workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_rw.3559100596 Jun 26 04:39:06 PM PDT 24 Jun 26 04:39:09 PM PDT 24 65055814 ps
T184 /workspace/coverage/cover_reg_top/4.lc_ctrl_csr_hw_reset.3366380871 Jun 26 04:39:29 PM PDT 24 Jun 26 04:39:32 PM PDT 24 66937469 ps
T875 /workspace/coverage/cover_reg_top/3.lc_ctrl_csr_hw_reset.3851386747 Jun 26 04:39:26 PM PDT 24 Jun 26 04:39:29 PM PDT 24 49255208 ps
T191 /workspace/coverage/cover_reg_top/15.lc_ctrl_same_csr_outstanding.971712371 Jun 26 04:39:56 PM PDT 24 Jun 26 04:40:00 PM PDT 24 82447372 ps
T155 /workspace/coverage/cover_reg_top/19.lc_ctrl_same_csr_outstanding.976843611 Jun 26 04:39:59 PM PDT 24 Jun 26 04:40:05 PM PDT 24 48251759 ps
T159 /workspace/coverage/cover_reg_top/4.lc_ctrl_csr_mem_rw_with_rand_reset.1751466864 Jun 26 04:39:35 PM PDT 24 Jun 26 04:39:38 PM PDT 24 41659717 ps
T135 /workspace/coverage/cover_reg_top/9.lc_ctrl_tl_intg_err.3500768422 Jun 26 04:39:47 PM PDT 24 Jun 26 04:39:51 PM PDT 24 64988890 ps
T192 /workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_same_csr_outstanding.516948982 Jun 26 04:39:29 PM PDT 24 Jun 26 04:39:32 PM PDT 24 143137876 ps
T876 /workspace/coverage/cover_reg_top/4.lc_ctrl_csr_rw.2541679409 Jun 26 04:39:36 PM PDT 24 Jun 26 04:39:38 PM PDT 24 55782349 ps
T160 /workspace/coverage/cover_reg_top/10.lc_ctrl_csr_mem_rw_with_rand_reset.2297076735 Jun 26 04:39:46 PM PDT 24 Jun 26 04:39:49 PM PDT 24 25112690 ps
T197 /workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_aliasing.3728290216 Jun 26 04:39:42 PM PDT 24 Jun 26 04:39:47 PM PDT 24 1624874520 ps
T122 /workspace/coverage/cover_reg_top/17.lc_ctrl_csr_mem_rw_with_rand_reset.2732980326 Jun 26 04:39:58 PM PDT 24 Jun 26 04:40:03 PM PDT 24 102299601 ps
T143 /workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_aliasing.1619274415 Jun 26 04:39:31 PM PDT 24 Jun 26 04:39:38 PM PDT 24 1479766192 ps
T877 /workspace/coverage/cover_reg_top/4.lc_ctrl_csr_bit_bash.2065153363 Jun 26 04:39:29 PM PDT 24 Jun 26 04:39:32 PM PDT 24 39205275 ps
T878 /workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_bit_bash.3366683923 Jun 26 04:39:07 PM PDT 24 Jun 26 04:39:14 PM PDT 24 566173894 ps
T879 /workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_alert_test.2449818609 Jun 26 04:39:35 PM PDT 24 Jun 26 04:39:37 PM PDT 24 18312987 ps
T880 /workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_hw_reset.4140658475 Jun 26 04:39:40 PM PDT 24 Jun 26 04:39:43 PM PDT 24 233038463 ps
T881 /workspace/coverage/cover_reg_top/2.lc_ctrl_csr_hw_reset.1279877962 Jun 26 04:39:19 PM PDT 24 Jun 26 04:39:21 PM PDT 24 100828126 ps
T193 /workspace/coverage/cover_reg_top/11.lc_ctrl_same_csr_outstanding.1252075168 Jun 26 04:39:51 PM PDT 24 Jun 26 04:39:55 PM PDT 24 36286973 ps
T882 /workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_alert_test.1737808666 Jun 26 04:39:55 PM PDT 24 Jun 26 04:39:59 PM PDT 24 237629238 ps
T194 /workspace/coverage/cover_reg_top/0.lc_ctrl_same_csr_outstanding.925381242 Jun 26 04:39:09 PM PDT 24 Jun 26 04:39:12 PM PDT 24 64767191 ps
T883 /workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_alert_test.1740397688 Jun 26 04:39:37 PM PDT 24 Jun 26 04:39:39 PM PDT 24 37935448 ps
T130 /workspace/coverage/cover_reg_top/13.lc_ctrl_csr_mem_rw_with_rand_reset.3460339227 Jun 26 04:39:51 PM PDT 24 Jun 26 04:39:55 PM PDT 24 129600586 ps
T123 /workspace/coverage/cover_reg_top/5.lc_ctrl_tl_errors.2346837894 Jun 26 04:39:36 PM PDT 24 Jun 26 04:39:40 PM PDT 24 134402972 ps
T156 /workspace/coverage/cover_reg_top/1.lc_ctrl_same_csr_outstanding.249573376 Jun 26 04:39:14 PM PDT 24 Jun 26 04:39:17 PM PDT 24 94302455 ps
T884 /workspace/coverage/cover_reg_top/1.lc_ctrl_csr_bit_bash.1311402464 Jun 26 04:39:13 PM PDT 24 Jun 26 04:39:16 PM PDT 24 57166119 ps
T195 /workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_same_csr_outstanding.1263087694 Jun 26 04:39:36 PM PDT 24 Jun 26 04:39:39 PM PDT 24 25537257 ps
T138 /workspace/coverage/cover_reg_top/11.lc_ctrl_tl_intg_err.3986119987 Jun 26 04:39:50 PM PDT 24 Jun 26 04:39:54 PM PDT 24 47214098 ps
T124 /workspace/coverage/cover_reg_top/15.lc_ctrl_tl_errors.3233447123 Jun 26 04:39:52 PM PDT 24 Jun 26 04:39:56 PM PDT 24 46328401 ps
T885 /workspace/coverage/cover_reg_top/1.lc_ctrl_csr_aliasing.3312166698 Jun 26 04:39:14 PM PDT 24 Jun 26 04:39:16 PM PDT 24 69179011 ps
T886 /workspace/coverage/cover_reg_top/12.lc_ctrl_csr_rw.1375324762 Jun 26 04:39:54 PM PDT 24 Jun 26 04:39:57 PM PDT 24 40002596 ps
T196 /workspace/coverage/cover_reg_top/8.lc_ctrl_csr_rw.3698317302 Jun 26 04:39:45 PM PDT 24 Jun 26 04:39:48 PM PDT 24 14550742 ps
T887 /workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_aliasing.2534178879 Jun 26 04:39:12 PM PDT 24 Jun 26 04:39:18 PM PDT 24 3243674358 ps
T127 /workspace/coverage/cover_reg_top/2.lc_ctrl_tl_errors.19910339 Jun 26 04:39:18 PM PDT 24 Jun 26 04:39:21 PM PDT 24 138058758 ps
T888 /workspace/coverage/cover_reg_top/8.lc_ctrl_csr_mem_rw_with_rand_reset.676690590 Jun 26 04:39:46 PM PDT 24 Jun 26 04:39:49 PM PDT 24 47492027 ps
T889 /workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_rw.3403439344 Jun 26 04:39:55 PM PDT 24 Jun 26 04:39:58 PM PDT 24 63417391 ps
T890 /workspace/coverage/cover_reg_top/5.lc_ctrl_tl_intg_err.2837959886 Jun 26 04:39:38 PM PDT 24 Jun 26 04:39:41 PM PDT 24 391172255 ps
T891 /workspace/coverage/cover_reg_top/5.lc_ctrl_same_csr_outstanding.2102929892 Jun 26 04:39:41 PM PDT 24 Jun 26 04:39:44 PM PDT 24 21660987 ps
T892 /workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_bit_bash.4176973757 Jun 26 04:39:17 PM PDT 24 Jun 26 04:39:24 PM PDT 24 3671046340 ps
T893 /workspace/coverage/cover_reg_top/2.lc_ctrl_csr_rw.2503899691 Jun 26 04:39:14 PM PDT 24 Jun 26 04:39:16 PM PDT 24 57229642 ps
T137 /workspace/coverage/cover_reg_top/6.lc_ctrl_tl_intg_err.1868478090 Jun 26 04:39:41 PM PDT 24 Jun 26 04:39:45 PM PDT 24 239034979 ps
T144 /workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_rw.1872322776 Jun 26 04:39:30 PM PDT 24 Jun 26 04:39:32 PM PDT 24 56876005 ps
T894 /workspace/coverage/cover_reg_top/5.lc_ctrl_csr_mem_rw_with_rand_reset.1974040818 Jun 26 04:39:38 PM PDT 24 Jun 26 04:39:40 PM PDT 24 123499014 ps
T895 /workspace/coverage/cover_reg_top/6.lc_ctrl_same_csr_outstanding.580248642 Jun 26 04:39:42 PM PDT 24 Jun 26 04:39:44 PM PDT 24 56296882 ps
T896 /workspace/coverage/cover_reg_top/3.lc_ctrl_csr_bit_bash.1088201642 Jun 26 04:39:26 PM PDT 24 Jun 26 04:39:30 PM PDT 24 64734664 ps
T897 /workspace/coverage/cover_reg_top/6.lc_ctrl_csr_rw.1235464011 Jun 26 04:39:43 PM PDT 24 Jun 26 04:39:45 PM PDT 24 19516526 ps
T898 /workspace/coverage/cover_reg_top/13.lc_ctrl_tl_errors.1054453098 Jun 26 04:39:50 PM PDT 24 Jun 26 04:39:53 PM PDT 24 437247075 ps
T899 /workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_same_csr_outstanding.2722904792 Jun 26 04:39:42 PM PDT 24 Jun 26 04:39:44 PM PDT 24 15414940 ps
T900 /workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_bit_bash.2837057931 Jun 26 04:39:29 PM PDT 24 Jun 26 04:39:39 PM PDT 24 7697045826 ps
T901 /workspace/coverage/cover_reg_top/5.lc_ctrl_csr_rw.3107918575 Jun 26 04:39:36 PM PDT 24 Jun 26 04:39:39 PM PDT 24 43095670 ps
T902 /workspace/coverage/cover_reg_top/0.lc_ctrl_csr_hw_reset.2112994674 Jun 26 04:39:05 PM PDT 24 Jun 26 04:39:07 PM PDT 24 52707291 ps
T145 /workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.3198225431 Jun 26 04:39:41 PM PDT 24 Jun 26 04:39:43 PM PDT 24 150890530 ps
T903 /workspace/coverage/cover_reg_top/18.lc_ctrl_same_csr_outstanding.709658591 Jun 26 04:39:57 PM PDT 24 Jun 26 04:40:02 PM PDT 24 22192500 ps
T904 /workspace/coverage/cover_reg_top/0.lc_ctrl_csr_aliasing.2259840702 Jun 26 04:39:10 PM PDT 24 Jun 26 04:39:13 PM PDT 24 32327601 ps
T905 /workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_hw_reset.3557790574 Jun 26 04:39:07 PM PDT 24 Jun 26 04:39:09 PM PDT 24 100532042 ps
T136 /workspace/coverage/cover_reg_top/19.lc_ctrl_tl_intg_err.291449048 Jun 26 04:39:55 PM PDT 24 Jun 26 04:40:01 PM PDT 24 62046367 ps
T906 /workspace/coverage/cover_reg_top/12.lc_ctrl_csr_mem_rw_with_rand_reset.7193477 Jun 26 04:39:54 PM PDT 24 Jun 26 04:39:58 PM PDT 24 106548593 ps
T907 /workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.4070985200 Jun 26 04:39:38 PM PDT 24 Jun 26 04:39:41 PM PDT 24 293371287 ps
T125 /workspace/coverage/cover_reg_top/0.lc_ctrl_csr_mem_rw_with_rand_reset.1997088014 Jun 26 04:39:09 PM PDT 24 Jun 26 04:39:12 PM PDT 24 78962445 ps
T908 /workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.3713839934 Jun 26 04:39:12 PM PDT 24 Jun 26 04:39:15 PM PDT 24 83870555 ps
T909 /workspace/coverage/cover_reg_top/3.lc_ctrl_csr_aliasing.374634104 Jun 26 04:39:26 PM PDT 24 Jun 26 04:39:29 PM PDT 24 25247051 ps
T910 /workspace/coverage/cover_reg_top/12.lc_ctrl_same_csr_outstanding.4063469414 Jun 26 04:39:55 PM PDT 24 Jun 26 04:40:00 PM PDT 24 47146051 ps
T911 /workspace/coverage/cover_reg_top/18.lc_ctrl_csr_mem_rw_with_rand_reset.668185055 Jun 26 04:39:56 PM PDT 24 Jun 26 04:40:01 PM PDT 24 55483057 ps
T912 /workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_same_csr_outstanding.515902518 Jun 26 04:39:35 PM PDT 24 Jun 26 04:39:37 PM PDT 24 198320143 ps
T913 /workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_alert_test.55793992 Jun 26 04:39:25 PM PDT 24 Jun 26 04:39:28 PM PDT 24 129091440 ps
T128 /workspace/coverage/cover_reg_top/19.lc_ctrl_tl_errors.2483480107 Jun 26 04:39:59 PM PDT 24 Jun 26 04:40:06 PM PDT 24 238890618 ps
T914 /workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_aliasing.1291728627 Jun 26 04:39:19 PM PDT 24 Jun 26 04:39:29 PM PDT 24 1365280396 ps
T915 /workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_alert_test.2393737655 Jun 26 04:39:49 PM PDT 24 Jun 26 04:39:52 PM PDT 24 101433895 ps
T916 /workspace/coverage/cover_reg_top/10.lc_ctrl_same_csr_outstanding.3193618909 Jun 26 04:39:47 PM PDT 24 Jun 26 04:39:50 PM PDT 24 89058335 ps
T132 /workspace/coverage/cover_reg_top/8.lc_ctrl_tl_intg_err.4145323829 Jun 26 04:39:49 PM PDT 24 Jun 26 04:39:52 PM PDT 24 117032782 ps
T917 /workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_rw.1063263396 Jun 26 04:39:43 PM PDT 24 Jun 26 04:39:47 PM PDT 24 146975059 ps
T918 /workspace/coverage/cover_reg_top/7.lc_ctrl_csr_mem_rw_with_rand_reset.1742892961 Jun 26 04:39:39 PM PDT 24 Jun 26 04:39:42 PM PDT 24 79187306 ps
T919 /workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_bit_bash.3156694966 Jun 26 04:39:39 PM PDT 24 Jun 26 04:40:12 PM PDT 24 1374226404 ps
T920 /workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_rw.4011849320 Jun 26 04:39:14 PM PDT 24 Jun 26 04:39:17 PM PDT 24 42683115 ps
T921 /workspace/coverage/cover_reg_top/2.lc_ctrl_csr_mem_rw_with_rand_reset.1295260808 Jun 26 04:39:27 PM PDT 24 Jun 26 04:39:31 PM PDT 24 228273677 ps
T922 /workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_alert_test.2175785870 Jun 26 04:39:42 PM PDT 24 Jun 26 04:39:45 PM PDT 24 37163987 ps
T923 /workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_alert_test.2589577175 Jun 26 04:39:13 PM PDT 24 Jun 26 04:39:16 PM PDT 24 199040799 ps
T203 /workspace/coverage/cover_reg_top/18.lc_ctrl_tl_intg_err.1913641988 Jun 26 04:39:59 PM PDT 24 Jun 26 04:40:06 PM PDT 24 808464935 ps
T924 /workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.3231488974 Jun 26 04:39:26 PM PDT 24 Jun 26 04:39:30 PM PDT 24 238732580 ps
T925 /workspace/coverage/cover_reg_top/9.lc_ctrl_same_csr_outstanding.1590715381 Jun 26 04:39:46 PM PDT 24 Jun 26 04:39:49 PM PDT 24 128782999 ps
T926 /workspace/coverage/cover_reg_top/14.lc_ctrl_tl_errors.3667141886 Jun 26 04:39:52 PM PDT 24 Jun 26 04:39:57 PM PDT 24 155126633 ps
T129 /workspace/coverage/cover_reg_top/0.lc_ctrl_tl_errors.58346184 Jun 26 04:39:08 PM PDT 24 Jun 26 04:39:13 PM PDT 24 132287235 ps
T131 /workspace/coverage/cover_reg_top/10.lc_ctrl_tl_intg_err.2155119463 Jun 26 04:39:47 PM PDT 24 Jun 26 04:39:52 PM PDT 24 1043828025 ps
T927 /workspace/coverage/cover_reg_top/16.lc_ctrl_tl_errors.4000733410 Jun 26 04:39:54 PM PDT 24 Jun 26 04:39:59 PM PDT 24 332913264 ps
T185 /workspace/coverage/cover_reg_top/4.lc_ctrl_csr_aliasing.126592987 Jun 26 04:39:29 PM PDT 24 Jun 26 04:39:32 PM PDT 24 40094401 ps
T186 /workspace/coverage/cover_reg_top/7.lc_ctrl_csr_rw.2855730374 Jun 26 04:39:42 PM PDT 24 Jun 26 04:39:44 PM PDT 24 14887693 ps
T928 /workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.4193259784 Jun 26 04:39:17 PM PDT 24 Jun 26 04:39:21 PM PDT 24 303757750 ps
T929 /workspace/coverage/cover_reg_top/4.lc_ctrl_same_csr_outstanding.1891362446 Jun 26 04:39:29 PM PDT 24 Jun 26 04:39:33 PM PDT 24 46906337 ps
T930 /workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_rw.1818905273 Jun 26 04:39:26 PM PDT 24 Jun 26 04:39:29 PM PDT 24 118503762 ps
T187 /workspace/coverage/cover_reg_top/0.lc_ctrl_csr_rw.2890981949 Jun 26 04:39:08 PM PDT 24 Jun 26 04:39:10 PM PDT 24 42517085 ps
T931 /workspace/coverage/cover_reg_top/7.lc_ctrl_same_csr_outstanding.512814281 Jun 26 04:39:40 PM PDT 24 Jun 26 04:39:43 PM PDT 24 29690415 ps
T932 /workspace/coverage/cover_reg_top/10.lc_ctrl_tl_errors.3381509188 Jun 26 04:39:47 PM PDT 24 Jun 26 04:39:51 PM PDT 24 32636959 ps
T933 /workspace/coverage/cover_reg_top/2.lc_ctrl_same_csr_outstanding.3282921580 Jun 26 04:39:25 PM PDT 24 Jun 26 04:39:28 PM PDT 24 89927170 ps
T934 /workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_alert_test.3205911576 Jun 26 04:39:41 PM PDT 24 Jun 26 04:39:44 PM PDT 24 1259164109 ps
T935 /workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_rw.2145602600 Jun 26 04:39:08 PM PDT 24 Jun 26 04:39:11 PM PDT 24 378863345 ps
T936 /workspace/coverage/cover_reg_top/13.lc_ctrl_same_csr_outstanding.362984914 Jun 26 04:39:55 PM PDT 24 Jun 26 04:39:59 PM PDT 24 15210005 ps
T937 /workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_csr_aliasing.47409642 Jun 26 04:39:37 PM PDT 24 Jun 26 04:39:48 PM PDT 24 416317865 ps
T938 /workspace/coverage/cover_reg_top/19.lc_ctrl_csr_rw.1457565823 Jun 26 04:39:58 PM PDT 24 Jun 26 04:40:04 PM PDT 24 14840371 ps
T939 /workspace/coverage/cover_reg_top/14.lc_ctrl_csr_mem_rw_with_rand_reset.1878345846 Jun 26 04:39:51 PM PDT 24 Jun 26 04:39:54 PM PDT 24 21376132 ps
T940 /workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_same_csr_outstanding.3652261466 Jun 26 04:39:47 PM PDT 24 Jun 26 04:39:50 PM PDT 24 47574635 ps
T941 /workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_aliasing.2520498780 Jun 26 04:39:26 PM PDT 24 Jun 26 04:39:32 PM PDT 24 1683977488 ps
T942 /workspace/coverage/cover_reg_top/3.lc_ctrl_same_csr_outstanding.502188328 Jun 26 04:39:24 PM PDT 24 Jun 26 04:39:26 PM PDT 24 41086724 ps
T943 /workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.2887986139 Jun 26 04:39:29 PM PDT 24 Jun 26 04:39:33 PM PDT 24 148819606 ps
T944 /workspace/coverage/cover_reg_top/2.lc_ctrl_csr_bit_bash.3596517886 Jun 26 04:39:26 PM PDT 24 Jun 26 04:39:30 PM PDT 24 41035225 ps
T945 /workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_csr_hw_reset.510435342 Jun 26 04:39:31 PM PDT 24 Jun 26 04:39:33 PM PDT 24 232860894 ps
T946 /workspace/coverage/cover_reg_top/11.lc_ctrl_csr_mem_rw_with_rand_reset.2327320065 Jun 26 04:39:52 PM PDT 24 Jun 26 04:39:57 PM PDT 24 95476957 ps
T126 /workspace/coverage/cover_reg_top/17.lc_ctrl_tl_intg_err.1453833294 Jun 26 04:39:52 PM PDT 24 Jun 26 04:39:57 PM PDT 24 74116043 ps
T139 /workspace/coverage/cover_reg_top/1.lc_ctrl_tl_intg_err.2613218513 Jun 26 04:39:13 PM PDT 24 Jun 26 04:39:16 PM PDT 24 45784684 ps
T947 /workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.1388455705 Jun 26 04:39:45 PM PDT 24 Jun 26 04:39:50 PM PDT 24 102022314 ps
T948 /workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.1121415802 Jun 26 04:39:05 PM PDT 24 Jun 26 04:39:09 PM PDT 24 916348950 ps
T949 /workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_csr_bit_bash.2879218 Jun 26 04:39:31 PM PDT 24 Jun 26 04:39:52 PM PDT 24 11071779329 ps
T950 /workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_alert_test.589824192 Jun 26 04:39:09 PM PDT 24 Jun 26 04:39:12 PM PDT 24 92098596 ps
T951 /workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_alert_test.1589315096 Jun 26 04:39:18 PM PDT 24 Jun 26 04:39:21 PM PDT 24 360618247 ps
T952 /workspace/coverage/cover_reg_top/0.lc_ctrl_csr_bit_bash.348694047 Jun 26 04:39:08 PM PDT 24 Jun 26 04:39:12 PM PDT 24 104431157 ps
T953 /workspace/coverage/cover_reg_top/16.lc_ctrl_csr_mem_rw_with_rand_reset.1779959464 Jun 26 04:39:54 PM PDT 24 Jun 26 04:39:57 PM PDT 24 22212349 ps
T954 /workspace/coverage/cover_reg_top/1.lc_ctrl_csr_rw.1651220974 Jun 26 04:39:12 PM PDT 24 Jun 26 04:39:14 PM PDT 24 17130782 ps
T955 /workspace/coverage/cover_reg_top/18.lc_ctrl_tl_errors.2369180616 Jun 26 04:39:58 PM PDT 24 Jun 26 04:40:05 PM PDT 24 140234583 ps
T956 /workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_aliasing.3084413738 Jun 26 04:39:46 PM PDT 24 Jun 26 04:40:00 PM PDT 24 2745947397 ps
T957 /workspace/coverage/cover_reg_top/7.lc_ctrl_tl_errors.1105808644 Jun 26 04:39:41 PM PDT 24 Jun 26 04:39:46 PM PDT 24 875629631 ps
T958 /workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_aliasing.241076647 Jun 26 04:39:12 PM PDT 24 Jun 26 04:39:16 PM PDT 24 266650432 ps
T959 /workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_aliasing.1080892114 Jun 26 04:39:40 PM PDT 24 Jun 26 04:39:47 PM PDT 24 367631990 ps
T960 /workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_aliasing.1246869194 Jun 26 04:39:46 PM PDT 24 Jun 26 04:39:53 PM PDT 24 377042025 ps
T188 /workspace/coverage/cover_reg_top/13.lc_ctrl_csr_rw.2750257564 Jun 26 04:39:52 PM PDT 24 Jun 26 04:39:55 PM PDT 24 46155223 ps
T961 /workspace/coverage/cover_reg_top/16.lc_ctrl_csr_rw.1851675456 Jun 26 04:39:52 PM PDT 24 Jun 26 04:39:55 PM PDT 24 36513425 ps
T189 /workspace/coverage/cover_reg_top/18.lc_ctrl_csr_rw.1441114492 Jun 26 04:39:57 PM PDT 24 Jun 26 04:40:02 PM PDT 24 151097899 ps
T962 /workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_bit_bash.4272596545 Jun 26 04:39:42 PM PDT 24 Jun 26 04:39:49 PM PDT 24 770463274 ps
T963 /workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_same_csr_outstanding.2722988393 Jun 26 04:39:46 PM PDT 24 Jun 26 04:39:49 PM PDT 24 26633388 ps
T964 /workspace/coverage/cover_reg_top/15.lc_ctrl_csr_rw.140037620 Jun 26 04:39:51 PM PDT 24 Jun 26 04:39:54 PM PDT 24 27319219 ps
T965 /workspace/coverage/cover_reg_top/3.lc_ctrl_csr_rw.2941035922 Jun 26 04:39:26 PM PDT 24 Jun 26 04:39:28 PM PDT 24 106872227 ps
T140 /workspace/coverage/cover_reg_top/7.lc_ctrl_tl_intg_err.1477451419 Jun 26 04:39:39 PM PDT 24 Jun 26 04:39:43 PM PDT 24 206759929 ps
T966 /workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_same_csr_outstanding.3784938374 Jun 26 04:39:08 PM PDT 24 Jun 26 04:39:10 PM PDT 24 76317034 ps
T967 /workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_hw_reset.1871773015 Jun 26 04:39:09 PM PDT 24 Jun 26 04:39:12 PM PDT 24 289604843 ps
T968 /workspace/coverage/cover_reg_top/1.lc_ctrl_csr_mem_rw_with_rand_reset.2484427296 Jun 26 04:39:14 PM PDT 24 Jun 26 04:39:17 PM PDT 24 29387876 ps
T969 /workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_bit_bash.375598106 Jun 26 04:39:46 PM PDT 24 Jun 26 04:39:54 PM PDT 24 349145852 ps
T970 /workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_rw.3876542286 Jun 26 04:39:49 PM PDT 24 Jun 26 04:39:53 PM PDT 24 241302727 ps
T971 /workspace/coverage/cover_reg_top/9.lc_ctrl_csr_mem_rw_with_rand_reset.2220113381 Jun 26 04:39:55 PM PDT 24 Jun 26 04:39:59 PM PDT 24 113333801 ps
T972 /workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_csr_rw.42127541 Jun 26 04:39:32 PM PDT 24 Jun 26 04:39:34 PM PDT 24 36804062 ps
T973 /workspace/coverage/cover_reg_top/1.lc_ctrl_csr_hw_reset.2581468393 Jun 26 04:39:13 PM PDT 24 Jun 26 04:39:16 PM PDT 24 63238139 ps
T974 /workspace/coverage/cover_reg_top/8.lc_ctrl_tl_errors.3770406803 Jun 26 04:39:44 PM PDT 24 Jun 26 04:39:50 PM PDT 24 226145125 ps
T133 /workspace/coverage/cover_reg_top/15.lc_ctrl_tl_intg_err.448039108 Jun 26 04:39:52 PM PDT 24 Jun 26 04:39:56 PM PDT 24 292103183 ps
T975 /workspace/coverage/cover_reg_top/8.lc_ctrl_same_csr_outstanding.797508171 Jun 26 04:39:45 PM PDT 24 Jun 26 04:39:49 PM PDT 24 38069275 ps
T976 /workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.1271105040 Jun 26 04:39:42 PM PDT 24 Jun 26 04:39:45 PM PDT 24 240576740 ps
T134 /workspace/coverage/cover_reg_top/4.lc_ctrl_tl_intg_err.1761659779 Jun 26 04:39:28 PM PDT 24 Jun 26 04:39:33 PM PDT 24 120775628 ps
T977 /workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_hw_reset.42835670 Jun 26 04:39:28 PM PDT 24 Jun 26 04:39:32 PM PDT 24 200248945 ps
T978 /workspace/coverage/cover_reg_top/2.lc_ctrl_tl_intg_err.699197139 Jun 26 04:39:17 PM PDT 24 Jun 26 04:39:21 PM PDT 24 45227502 ps
T979 /workspace/coverage/cover_reg_top/17.lc_ctrl_tl_errors.1242645474 Jun 26 04:39:55 PM PDT 24 Jun 26 04:40:00 PM PDT 24 131106058 ps
T980 /workspace/coverage/cover_reg_top/4.lc_ctrl_tl_errors.3683039374 Jun 26 04:39:32 PM PDT 24 Jun 26 04:39:37 PM PDT 24 342835683 ps
T981 /workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_bit_bash.3371457373 Jun 26 04:39:12 PM PDT 24 Jun 26 04:39:18 PM PDT 24 422812509 ps
T982 /workspace/coverage/cover_reg_top/17.lc_ctrl_csr_rw.3631663649 Jun 26 04:39:57 PM PDT 24 Jun 26 04:40:01 PM PDT 24 47100382 ps
T983 /workspace/coverage/cover_reg_top/3.lc_ctrl_tl_errors.3453513316 Jun 26 04:39:27 PM PDT 24 Jun 26 04:39:30 PM PDT 24 73219723 ps
T984 /workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_same_csr_outstanding.3819659630 Jun 26 04:39:42 PM PDT 24 Jun 26 04:39:44 PM PDT 24 74530108 ps
T985 /workspace/coverage/cover_reg_top/12.lc_ctrl_tl_errors.463586460 Jun 26 04:39:53 PM PDT 24 Jun 26 04:39:57 PM PDT 24 104406726 ps
T141 /workspace/coverage/cover_reg_top/3.lc_ctrl_tl_intg_err.1312448421 Jun 26 04:39:26 PM PDT 24 Jun 26 04:39:31 PM PDT 24 372819882 ps
T986 /workspace/coverage/cover_reg_top/2.lc_ctrl_csr_aliasing.3693493408 Jun 26 04:39:25 PM PDT 24 Jun 26 04:39:28 PM PDT 24 17252346 ps
T987 /workspace/coverage/cover_reg_top/17.lc_ctrl_same_csr_outstanding.1807879855 Jun 26 04:39:57 PM PDT 24 Jun 26 04:40:03 PM PDT 24 66455786 ps
T988 /workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_same_csr_outstanding.610224322 Jun 26 04:39:14 PM PDT 24 Jun 26 04:39:16 PM PDT 24 87249703 ps
T989 /workspace/coverage/cover_reg_top/3.lc_ctrl_csr_mem_rw_with_rand_reset.4145451523 Jun 26 04:39:35 PM PDT 24 Jun 26 04:39:37 PM PDT 24 50075377 ps
T990 /workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_same_csr_outstanding.3184649344 Jun 26 04:39:16 PM PDT 24 Jun 26 04:39:19 PM PDT 24 19601858 ps
T991 /workspace/coverage/cover_reg_top/10.lc_ctrl_csr_rw.1521796507 Jun 26 04:39:56 PM PDT 24 Jun 26 04:40:01 PM PDT 24 22374325 ps
T992 /workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_rw.1461693161 Jun 26 04:39:37 PM PDT 24 Jun 26 04:39:39 PM PDT 24 53415075 ps
T993 /workspace/coverage/cover_reg_top/9.lc_ctrl_csr_rw.1656564022 Jun 26 04:39:45 PM PDT 24 Jun 26 04:39:47 PM PDT 24 18738572 ps
T994 /workspace/coverage/cover_reg_top/14.lc_ctrl_same_csr_outstanding.879267065 Jun 26 04:39:54 PM PDT 24 Jun 26 04:39:57 PM PDT 24 33426864 ps
T995 /workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_bit_bash.640238469 Jun 26 04:39:47 PM PDT 24 Jun 26 04:40:45 PM PDT 24 3428076324 ps
T996 /workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_hw_reset.3433327977 Jun 26 04:39:53 PM PDT 24 Jun 26 04:39:58 PM PDT 24 727157723 ps
T997 /workspace/coverage/cover_reg_top/11.lc_ctrl_tl_errors.4073198498 Jun 26 04:39:52 PM PDT 24 Jun 26 04:39:58 PM PDT 24 140808117 ps
T142 /workspace/coverage/cover_reg_top/14.lc_ctrl_tl_intg_err.334535782 Jun 26 04:39:51 PM PDT 24 Jun 26 04:39:56 PM PDT 24 234356630 ps
T998 /workspace/coverage/cover_reg_top/1.lc_ctrl_tl_errors.3559530173 Jun 26 04:39:12 PM PDT 24 Jun 26 04:39:17 PM PDT 24 207913412 ps
T999 /workspace/coverage/cover_reg_top/19.lc_ctrl_csr_mem_rw_with_rand_reset.3640173100 Jun 26 04:39:58 PM PDT 24 Jun 26 04:40:05 PM PDT 24 123168739 ps
T1000 /workspace/coverage/cover_reg_top/6.lc_ctrl_csr_mem_rw_with_rand_reset.1098630872 Jun 26 04:39:46 PM PDT 24 Jun 26 04:39:49 PM PDT 24 267699310 ps
0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%