SCORE | INSTANCES | WEIGHT | GOAL | AT LEAST | PER INSTANCE | AUTO BIN MAX | PRINT MISSING |
100.00 | 91.67 | 1 | 100 | 1 | 1 | 64 | 64 |
NAME | SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
mubi4_cov_of_tb.dut.u_otp_lc_data_i_rma_token_valid_if | 83.33 | 1 | 100 | 1 | 64 | 64 |
mubi4_cov_of_tb.dut.u_otp_lc_data_i_secrets_valid_if | 83.33 | 1 | 100 | 1 | 64 | 64 |
mubi4_cov_of_tb.dut.u_otp_lc_data_i_test_tokens_valid_if | 83.33 | 1 | 100 | 1 | 64 | 64 |
mubi4_cov_of_tb.dut.u_lc_clk_byp_ack_i_if | 100.00 | 1 | 100 | 1 | 64 | 64 |
mubi4_cov_of_tb.dut.u_lc_flash_rma_ack_i_if.gen_connect_lc_tx_items[0].lc_tx_if | 100.00 | 1 | 100 | 1 | 64 | 64 |
mubi4_cov_of_tb.dut.u_lc_flash_rma_ack_i_if.gen_connect_lc_tx_items[1].lc_tx_if | 100.00 | 1 | 100 | 1 | 64 | 64 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
83.33 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 6 | 1 | 5 | 83.33 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_value | 6 | 1 | 5 | 83.33 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
83.33 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 6 | 1 | 5 | 83.33 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_value | 6 | 1 | 5 | 83.33 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
83.33 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 6 | 1 | 5 | 83.33 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_value | 6 | 1 | 5 | 83.33 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 6 | 0 | 6 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_value | 6 | 0 | 6 | 100.00 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 6 | 0 | 6 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_value | 6 | 0 | 6 | 100.00 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 6 | 0 | 6 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_value | 6 | 0 | 6 | 100.00 | 100 | 1 | 1 | 0 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 6 | 1 | 5 | 83.33 |
NAME | COUNT | AT LEAST | NUMBER | STATUS |
false | 0 | 1 | 1 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
others[0] | 229 | 1 | T2 | 8 | T47 | 13 | T48 | 6 | ||||
others[1] | 258 | 1 | T2 | 10 | T47 | 12 | T48 | 2 | ||||
others[2] | 219 | 1 | T2 | 8 | T47 | 6 | T48 | 10 | ||||
others[3] | 368 | 1 | T2 | 16 | T47 | 8 | T48 | 6 | ||||
true | 53089 | 1 | T1 | 72 | T2 | 97 | T3 | 77 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 6 | 1 | 5 | 83.33 |
NAME | COUNT | AT LEAST | NUMBER | STATUS |
true | 0 | 1 | 1 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
others[0] | 246 | 1 | T2 | 22 | T47 | 4 | T48 | 10 | ||||
others[1] | 251 | 1 | T2 | 8 | T47 | 12 | T48 | 8 | ||||
others[2] | 258 | 1 | T2 | 6 | T47 | 2 | T48 | 14 | ||||
others[3] | 404 | 1 | T2 | 10 | T47 | 12 | T48 | 30 | ||||
false | 53088 | 1 | T1 | 72 | T2 | 96 | T3 | 77 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 6 | 1 | 5 | 83.33 |
NAME | COUNT | AT LEAST | NUMBER | STATUS |
false | 0 | 1 | 1 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
others[0] | 223 | 1 | T2 | 4 | T47 | 8 | T48 | 8 | ||||
others[1] | 220 | 1 | T2 | 10 | T47 | 10 | T48 | 2 | ||||
others[2] | 242 | 1 | T2 | 10 | T47 | 11 | T48 | 10 | ||||
others[3] | 354 | 1 | T2 | 16 | T47 | 15 | T48 | 12 | ||||
true | 53099 | 1 | T1 | 72 | T2 | 95 | T3 | 77 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 6 | 0 | 6 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
others[0] | 118 | 1 | T2 | 1 | T47 | 2 | T48 | 2 | ||||
others[1] | 115 | 1 | T2 | 4 | T47 | 4 | T48 | 3 | ||||
others[2] | 116 | 1 | T47 | 4 | T48 | 6 | T186 | 3 | ||||
others[3] | 199 | 1 | T2 | 6 | T47 | 5 | T48 | 8 | ||||
false | 969882 | 1 | T1 | 72 | T2 | 110 | T3 | 77 | ||||
true | 916164 | 1 | T4 | 6092 | T5 | 2 | T11 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 6 | 0 | 6 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
others[0] | 138 | 1 | T2 | 7 | T47 | 3 | T48 | 7 | ||||
others[1] | 134 | 1 | T2 | 6 | T47 | 5 | T48 | 5 | ||||
others[2] | 129 | 1 | T2 | 5 | T47 | 7 | T48 | 1 | ||||
others[3] | 216 | 1 | T2 | 5 | T47 | 4 | T48 | 8 | ||||
false | 3299366 | 1 | T1 | 72 | T2 | 124 | T3 | 78 | ||||
true | 3245676 | 1 | T2 | 4 | T3 | 1 | T4 | 83621 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 6 | 0 | 6 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
others[0] | 138 | 1 | T2 | 7 | T47 | 3 | T48 | 7 | ||||
others[1] | 134 | 1 | T2 | 6 | T47 | 5 | T48 | 5 | ||||
others[2] | 129 | 1 | T2 | 5 | T47 | 7 | T48 | 1 | ||||
others[3] | 216 | 1 | T2 | 5 | T47 | 4 | T48 | 8 | ||||
false | 3299366 | 1 | T1 | 72 | T2 | 124 | T3 | 78 | ||||
true | 3245676 | 1 | T2 | 4 | T3 | 1 | T4 | 83621 |
0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |