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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.27 97.99 95.77 93.40 100.00 98.55 98.51 96.64


Total test records in report: 1004
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html

T814 /workspace/coverage/default/35.lc_ctrl_security_escalation.2367377784 Jul 23 05:53:25 PM PDT 24 Jul 23 05:53:40 PM PDT 24 960949001 ps
T815 /workspace/coverage/default/29.lc_ctrl_stress_all.259195185 Jul 23 05:53:08 PM PDT 24 Jul 23 05:55:10 PM PDT 24 5262256528 ps
T816 /workspace/coverage/default/10.lc_ctrl_jtag_errors.3946457147 Jul 23 05:52:22 PM PDT 24 Jul 23 05:53:02 PM PDT 24 5273665566 ps
T817 /workspace/coverage/default/36.lc_ctrl_security_escalation.3366126433 Jul 23 05:53:25 PM PDT 24 Jul 23 05:53:42 PM PDT 24 355704128 ps
T818 /workspace/coverage/default/5.lc_ctrl_jtag_regwen_during_op.3579253464 Jul 23 05:51:50 PM PDT 24 Jul 23 05:52:13 PM PDT 24 3047444376 ps
T819 /workspace/coverage/default/5.lc_ctrl_state_post_trans.1046532651 Jul 23 05:51:45 PM PDT 24 Jul 23 05:51:52 PM PDT 24 282503715 ps
T820 /workspace/coverage/default/7.lc_ctrl_alert_test.3002683896 Jul 23 05:52:01 PM PDT 24 Jul 23 05:52:04 PM PDT 24 18336325 ps
T821 /workspace/coverage/default/9.lc_ctrl_sec_token_digest.4219314608 Jul 23 05:52:09 PM PDT 24 Jul 23 05:52:25 PM PDT 24 1342862937 ps
T822 /workspace/coverage/default/38.lc_ctrl_alert_test.2412626999 Jul 23 05:53:36 PM PDT 24 Jul 23 05:53:41 PM PDT 24 46210250 ps
T823 /workspace/coverage/default/8.lc_ctrl_jtag_smoke.601935524 Jul 23 05:52:01 PM PDT 24 Jul 23 05:52:05 PM PDT 24 367204235 ps
T824 /workspace/coverage/default/15.lc_ctrl_smoke.3601185484 Jul 23 05:52:31 PM PDT 24 Jul 23 05:52:37 PM PDT 24 106117493 ps
T825 /workspace/coverage/default/47.lc_ctrl_stress_all.493194421 Jul 23 05:53:53 PM PDT 24 Jul 23 05:55:49 PM PDT 24 24929136266 ps
T826 /workspace/coverage/default/13.lc_ctrl_sec_mubi.398680224 Jul 23 05:52:24 PM PDT 24 Jul 23 05:52:40 PM PDT 24 220305766 ps
T827 /workspace/coverage/default/46.lc_ctrl_sec_token_mux.1918152799 Jul 23 05:53:55 PM PDT 24 Jul 23 05:54:06 PM PDT 24 650897326 ps
T206 /workspace/coverage/default/5.lc_ctrl_claim_transition_if.224731488 Jul 23 05:51:49 PM PDT 24 Jul 23 05:51:51 PM PDT 24 11428856 ps
T828 /workspace/coverage/default/40.lc_ctrl_sec_token_mux.1526184538 Jul 23 05:53:37 PM PDT 24 Jul 23 05:53:46 PM PDT 24 2445347937 ps
T829 /workspace/coverage/default/2.lc_ctrl_sec_mubi.1246568761 Jul 23 05:51:28 PM PDT 24 Jul 23 05:51:38 PM PDT 24 760484357 ps
T830 /workspace/coverage/default/9.lc_ctrl_jtag_access.2072471328 Jul 23 05:52:10 PM PDT 24 Jul 23 05:52:15 PM PDT 24 435501648 ps
T831 /workspace/coverage/default/12.lc_ctrl_state_post_trans.942997418 Jul 23 05:52:26 PM PDT 24 Jul 23 05:52:32 PM PDT 24 91357333 ps
T832 /workspace/coverage/default/3.lc_ctrl_volatile_unlock_smoke.540999278 Jul 23 05:51:38 PM PDT 24 Jul 23 05:51:39 PM PDT 24 12762010 ps
T833 /workspace/coverage/default/9.lc_ctrl_jtag_priority.2058136057 Jul 23 05:52:09 PM PDT 24 Jul 23 05:52:26 PM PDT 24 2340707531 ps
T161 /workspace/coverage/default/34.lc_ctrl_stress_all_with_rand_reset.2879950664 Jul 23 05:53:25 PM PDT 24 Jul 23 06:04:10 PM PDT 24 44760613862 ps
T834 /workspace/coverage/default/25.lc_ctrl_smoke.3414211900 Jul 23 05:53:03 PM PDT 24 Jul 23 05:53:08 PM PDT 24 71031270 ps
T835 /workspace/coverage/default/37.lc_ctrl_state_post_trans.71236194 Jul 23 05:53:33 PM PDT 24 Jul 23 05:53:44 PM PDT 24 164550775 ps
T836 /workspace/coverage/default/16.lc_ctrl_jtag_prog_failure.4155007841 Jul 23 05:52:31 PM PDT 24 Jul 23 05:52:44 PM PDT 24 574333784 ps
T837 /workspace/coverage/default/45.lc_ctrl_smoke.3637241653 Jul 23 05:53:43 PM PDT 24 Jul 23 05:53:47 PM PDT 24 18266946 ps
T838 /workspace/coverage/default/12.lc_ctrl_security_escalation.634839153 Jul 23 05:52:22 PM PDT 24 Jul 23 05:52:35 PM PDT 24 2073445681 ps
T839 /workspace/coverage/default/47.lc_ctrl_sec_token_digest.1459130979 Jul 23 05:53:55 PM PDT 24 Jul 23 05:54:05 PM PDT 24 268477489 ps
T840 /workspace/coverage/default/1.lc_ctrl_jtag_prog_failure.2878841441 Jul 23 05:51:21 PM PDT 24 Jul 23 05:51:27 PM PDT 24 91666858 ps
T841 /workspace/coverage/default/4.lc_ctrl_regwen_during_op.2233581042 Jul 23 05:51:38 PM PDT 24 Jul 23 05:51:55 PM PDT 24 260972721 ps
T842 /workspace/coverage/default/49.lc_ctrl_sec_mubi.692174635 Jul 23 05:54:00 PM PDT 24 Jul 23 05:54:14 PM PDT 24 5186633062 ps
T843 /workspace/coverage/default/33.lc_ctrl_prog_failure.4193021160 Jul 23 05:53:23 PM PDT 24 Jul 23 05:53:27 PM PDT 24 157883249 ps
T844 /workspace/coverage/default/39.lc_ctrl_errors.1943131729 Jul 23 05:53:38 PM PDT 24 Jul 23 05:53:55 PM PDT 24 585356904 ps
T845 /workspace/coverage/default/11.lc_ctrl_jtag_smoke.2493080562 Jul 23 05:52:22 PM PDT 24 Jul 23 05:52:28 PM PDT 24 161992295 ps
T846 /workspace/coverage/default/5.lc_ctrl_volatile_unlock_smoke.3179604394 Jul 23 05:51:45 PM PDT 24 Jul 23 05:51:47 PM PDT 24 54466679 ps
T847 /workspace/coverage/default/4.lc_ctrl_jtag_state_post_trans.415910654 Jul 23 05:51:41 PM PDT 24 Jul 23 05:52:10 PM PDT 24 5190070398 ps
T848 /workspace/coverage/default/27.lc_ctrl_jtag_access.2867467614 Jul 23 05:53:10 PM PDT 24 Jul 23 05:53:17 PM PDT 24 802147359 ps
T849 /workspace/coverage/default/49.lc_ctrl_prog_failure.1853655198 Jul 23 05:54:01 PM PDT 24 Jul 23 05:54:08 PM PDT 24 112404205 ps
T850 /workspace/coverage/default/3.lc_ctrl_jtag_errors.1069016379 Jul 23 05:51:39 PM PDT 24 Jul 23 05:52:39 PM PDT 24 14730925034 ps
T851 /workspace/coverage/default/6.lc_ctrl_jtag_state_post_trans.25019753 Jul 23 05:51:52 PM PDT 24 Jul 23 05:52:03 PM PDT 24 2499590798 ps
T852 /workspace/coverage/default/5.lc_ctrl_regwen_during_op.144279562 Jul 23 05:51:47 PM PDT 24 Jul 23 05:51:55 PM PDT 24 264921271 ps
T853 /workspace/coverage/default/10.lc_ctrl_state_post_trans.476438251 Jul 23 05:52:12 PM PDT 24 Jul 23 05:52:21 PM PDT 24 77846653 ps
T854 /workspace/coverage/default/17.lc_ctrl_errors.3356666642 Jul 23 05:52:41 PM PDT 24 Jul 23 05:52:52 PM PDT 24 340101319 ps
T855 /workspace/coverage/default/33.lc_ctrl_errors.3273030065 Jul 23 05:53:20 PM PDT 24 Jul 23 05:53:35 PM PDT 24 1059825092 ps
T856 /workspace/coverage/default/34.lc_ctrl_state_post_trans.727825828 Jul 23 05:53:25 PM PDT 24 Jul 23 05:53:38 PM PDT 24 87475961 ps
T857 /workspace/coverage/default/9.lc_ctrl_prog_failure.2696009331 Jul 23 05:52:10 PM PDT 24 Jul 23 05:52:15 PM PDT 24 163519648 ps
T858 /workspace/coverage/default/5.lc_ctrl_jtag_prog_failure.2036029829 Jul 23 05:51:51 PM PDT 24 Jul 23 05:52:07 PM PDT 24 2198179239 ps
T859 /workspace/coverage/default/40.lc_ctrl_alert_test.2836531373 Jul 23 05:53:39 PM PDT 24 Jul 23 05:53:44 PM PDT 24 49759085 ps
T860 /workspace/coverage/default/17.lc_ctrl_prog_failure.3921265722 Jul 23 05:52:40 PM PDT 24 Jul 23 05:52:46 PM PDT 24 116923270 ps
T861 /workspace/coverage/default/49.lc_ctrl_sec_token_mux.1931182074 Jul 23 05:54:01 PM PDT 24 Jul 23 05:54:18 PM PDT 24 1862561082 ps
T862 /workspace/coverage/default/39.lc_ctrl_smoke.542564666 Jul 23 05:53:38 PM PDT 24 Jul 23 05:53:45 PM PDT 24 39558579 ps
T863 /workspace/coverage/default/28.lc_ctrl_state_failure.4073952653 Jul 23 05:53:11 PM PDT 24 Jul 23 05:53:36 PM PDT 24 336022193 ps
T864 /workspace/coverage/default/16.lc_ctrl_sec_mubi.967643409 Jul 23 05:52:36 PM PDT 24 Jul 23 05:52:51 PM PDT 24 449495286 ps
T865 /workspace/coverage/default/16.lc_ctrl_state_post_trans.4076257243 Jul 23 05:52:32 PM PDT 24 Jul 23 05:52:40 PM PDT 24 207951197 ps
T866 /workspace/coverage/default/14.lc_ctrl_jtag_smoke.1504074204 Jul 23 05:52:31 PM PDT 24 Jul 23 05:52:41 PM PDT 24 250727297 ps
T867 /workspace/coverage/default/9.lc_ctrl_jtag_regwen_during_op.1588493779 Jul 23 05:52:09 PM PDT 24 Jul 23 05:52:27 PM PDT 24 3497119887 ps
T868 /workspace/coverage/default/3.lc_ctrl_jtag_state_post_trans.1786048412 Jul 23 05:51:34 PM PDT 24 Jul 23 05:51:53 PM PDT 24 1304311196 ps
T869 /workspace/coverage/default/45.lc_ctrl_volatile_unlock_smoke.2629524369 Jul 23 05:53:48 PM PDT 24 Jul 23 05:53:51 PM PDT 24 13212736 ps
T870 /workspace/coverage/default/48.lc_ctrl_errors.2726985410 Jul 23 05:53:56 PM PDT 24 Jul 23 05:54:15 PM PDT 24 379574568 ps
T871 /workspace/coverage/default/35.lc_ctrl_state_failure.1967818021 Jul 23 05:53:24 PM PDT 24 Jul 23 05:54:02 PM PDT 24 344533358 ps
T204 /workspace/coverage/default/7.lc_ctrl_claim_transition_if.3057455036 Jul 23 05:52:02 PM PDT 24 Jul 23 05:52:04 PM PDT 24 14711948 ps
T872 /workspace/coverage/default/34.lc_ctrl_stress_all.2702797994 Jul 23 05:53:22 PM PDT 24 Jul 23 06:04:16 PM PDT 24 22347450744 ps
T873 /workspace/coverage/default/2.lc_ctrl_errors.2942964335 Jul 23 05:51:28 PM PDT 24 Jul 23 05:51:49 PM PDT 24 9234604310 ps
T874 /workspace/coverage/default/37.lc_ctrl_errors.2894612812 Jul 23 05:53:37 PM PDT 24 Jul 23 05:53:56 PM PDT 24 1518647512 ps
T875 /workspace/coverage/default/39.lc_ctrl_alert_test.833488355 Jul 23 05:53:32 PM PDT 24 Jul 23 05:53:38 PM PDT 24 17578260 ps
T876 /workspace/coverage/default/31.lc_ctrl_errors.1030978172 Jul 23 05:53:23 PM PDT 24 Jul 23 05:53:44 PM PDT 24 890494367 ps
T877 /workspace/coverage/default/25.lc_ctrl_errors.1017652366 Jul 23 05:53:03 PM PDT 24 Jul 23 05:53:22 PM PDT 24 387762264 ps
T878 /workspace/coverage/default/7.lc_ctrl_jtag_access.508024055 Jul 23 05:52:03 PM PDT 24 Jul 23 05:52:08 PM PDT 24 597791801 ps
T879 /workspace/coverage/default/14.lc_ctrl_security_escalation.2640832980 Jul 23 05:52:25 PM PDT 24 Jul 23 05:52:43 PM PDT 24 1527908891 ps
T102 /workspace/coverage/cover_reg_top/18.lc_ctrl_csr_mem_rw_with_rand_reset.2494016970 Jul 23 04:49:47 PM PDT 24 Jul 23 04:49:53 PM PDT 24 54108365 ps
T99 /workspace/coverage/cover_reg_top/7.lc_ctrl_tl_errors.2818983033 Jul 23 04:49:28 PM PDT 24 Jul 23 04:49:38 PM PDT 24 488548155 ps
T100 /workspace/coverage/cover_reg_top/6.lc_ctrl_csr_mem_rw_with_rand_reset.2261635353 Jul 23 04:49:31 PM PDT 24 Jul 23 04:49:39 PM PDT 24 55981857 ps
T101 /workspace/coverage/cover_reg_top/8.lc_ctrl_tl_intg_err.886136781 Jul 23 04:49:39 PM PDT 24 Jul 23 04:49:49 PM PDT 24 426311520 ps
T133 /workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_rw.3813635815 Jul 23 04:49:10 PM PDT 24 Jul 23 04:49:18 PM PDT 24 211963161 ps
T147 /workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_same_csr_outstanding.1946804437 Jul 23 04:49:12 PM PDT 24 Jul 23 04:49:20 PM PDT 24 130951365 ps
T105 /workspace/coverage/cover_reg_top/1.lc_ctrl_csr_hw_reset.2474432820 Jul 23 04:49:18 PM PDT 24 Jul 23 04:49:25 PM PDT 24 14516345 ps
T119 /workspace/coverage/cover_reg_top/19.lc_ctrl_csr_mem_rw_with_rand_reset.91922051 Jul 23 04:49:56 PM PDT 24 Jul 23 04:50:02 PM PDT 24 25946760 ps
T134 /workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_rw.1780210589 Jul 23 04:49:13 PM PDT 24 Jul 23 04:49:20 PM PDT 24 80557244 ps
T104 /workspace/coverage/cover_reg_top/0.lc_ctrl_tl_intg_err.3779397873 Jul 23 04:49:13 PM PDT 24 Jul 23 04:49:22 PM PDT 24 70066791 ps
T135 /workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_bit_bash.724035474 Jul 23 04:49:18 PM PDT 24 Jul 23 04:49:37 PM PDT 24 4796870131 ps
T130 /workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.1565548314 Jul 23 04:49:29 PM PDT 24 Jul 23 04:49:39 PM PDT 24 672200612 ps
T103 /workspace/coverage/cover_reg_top/16.lc_ctrl_tl_intg_err.3719397855 Jul 23 04:49:45 PM PDT 24 Jul 23 04:49:54 PM PDT 24 84819960 ps
T106 /workspace/coverage/cover_reg_top/0.lc_ctrl_csr_mem_rw_with_rand_reset.3153936649 Jul 23 04:49:12 PM PDT 24 Jul 23 04:49:20 PM PDT 24 103444086 ps
T192 /workspace/coverage/cover_reg_top/9.lc_ctrl_same_csr_outstanding.3079764034 Jul 23 04:49:38 PM PDT 24 Jul 23 04:49:45 PM PDT 24 21447443 ps
T120 /workspace/coverage/cover_reg_top/11.lc_ctrl_csr_mem_rw_with_rand_reset.2077679733 Jul 23 04:49:39 PM PDT 24 Jul 23 04:49:46 PM PDT 24 177281466 ps
T114 /workspace/coverage/cover_reg_top/17.lc_ctrl_tl_errors.3887248559 Jul 23 04:49:46 PM PDT 24 Jul 23 04:49:52 PM PDT 24 76000793 ps
T111 /workspace/coverage/cover_reg_top/19.lc_ctrl_tl_errors.1112329610 Jul 23 04:49:47 PM PDT 24 Jul 23 04:49:55 PM PDT 24 171384081 ps
T148 /workspace/coverage/cover_reg_top/8.lc_ctrl_same_csr_outstanding.3270013448 Jul 23 04:49:36 PM PDT 24 Jul 23 04:49:43 PM PDT 24 206512684 ps
T880 /workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_alert_test.190709030 Jul 23 04:49:36 PM PDT 24 Jul 23 04:49:43 PM PDT 24 167514187 ps
T117 /workspace/coverage/cover_reg_top/11.lc_ctrl_tl_intg_err.1380327226 Jul 23 04:49:35 PM PDT 24 Jul 23 04:49:44 PM PDT 24 102715518 ps
T193 /workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_same_csr_outstanding.815185564 Jul 23 04:49:38 PM PDT 24 Jul 23 04:49:46 PM PDT 24 90511069 ps
T118 /workspace/coverage/cover_reg_top/12.lc_ctrl_tl_intg_err.25839158 Jul 23 04:49:39 PM PDT 24 Jul 23 04:49:49 PM PDT 24 381494665 ps
T881 /workspace/coverage/cover_reg_top/1.lc_ctrl_csr_mem_rw_with_rand_reset.3020450990 Jul 23 04:49:09 PM PDT 24 Jul 23 04:49:16 PM PDT 24 19460012 ps
T107 /workspace/coverage/cover_reg_top/4.lc_ctrl_tl_errors.2906193941 Jul 23 04:49:30 PM PDT 24 Jul 23 04:49:40 PM PDT 24 305631055 ps
T131 /workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_aliasing.419559540 Jul 23 04:49:36 PM PDT 24 Jul 23 04:49:48 PM PDT 24 2036028882 ps
T108 /workspace/coverage/cover_reg_top/7.lc_ctrl_csr_mem_rw_with_rand_reset.224866347 Jul 23 04:49:28 PM PDT 24 Jul 23 04:49:36 PM PDT 24 156472951 ps
T177 /workspace/coverage/cover_reg_top/13.lc_ctrl_csr_rw.1405452192 Jul 23 04:49:45 PM PDT 24 Jul 23 04:49:52 PM PDT 24 12387845 ps
T882 /workspace/coverage/cover_reg_top/7.lc_ctrl_csr_rw.3870277401 Jul 23 04:49:32 PM PDT 24 Jul 23 04:49:39 PM PDT 24 31144736 ps
T883 /workspace/coverage/cover_reg_top/5.lc_ctrl_tl_errors.686840894 Jul 23 04:49:24 PM PDT 24 Jul 23 04:49:35 PM PDT 24 54070643 ps
T194 /workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_same_csr_outstanding.1866338456 Jul 23 04:49:28 PM PDT 24 Jul 23 04:49:36 PM PDT 24 91942391 ps
T884 /workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_alert_test.1793307061 Jul 23 04:49:38 PM PDT 24 Jul 23 04:49:44 PM PDT 24 573824376 ps
T885 /workspace/coverage/cover_reg_top/5.lc_ctrl_csr_mem_rw_with_rand_reset.3606078863 Jul 23 04:49:19 PM PDT 24 Jul 23 04:49:27 PM PDT 24 45738531 ps
T178 /workspace/coverage/cover_reg_top/4.lc_ctrl_csr_aliasing.3628736234 Jul 23 04:49:18 PM PDT 24 Jul 23 04:49:26 PM PDT 24 86218115 ps
T886 /workspace/coverage/cover_reg_top/2.lc_ctrl_csr_rw.3043678098 Jul 23 04:49:12 PM PDT 24 Jul 23 04:49:20 PM PDT 24 25163331 ps
T195 /workspace/coverage/cover_reg_top/12.lc_ctrl_same_csr_outstanding.3432895007 Jul 23 04:49:47 PM PDT 24 Jul 23 04:49:53 PM PDT 24 221209144 ps
T887 /workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_alert_test.525878271 Jul 23 04:49:10 PM PDT 24 Jul 23 04:49:18 PM PDT 24 241428252 ps
T179 /workspace/coverage/cover_reg_top/15.lc_ctrl_csr_rw.2985890343 Jul 23 04:49:45 PM PDT 24 Jul 23 04:49:51 PM PDT 24 21034079 ps
T121 /workspace/coverage/cover_reg_top/17.lc_ctrl_tl_intg_err.3401728564 Jul 23 04:49:46 PM PDT 24 Jul 23 04:49:53 PM PDT 24 246661903 ps
T888 /workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.3450128461 Jul 23 04:49:20 PM PDT 24 Jul 23 04:49:30 PM PDT 24 1849107215 ps
T115 /workspace/coverage/cover_reg_top/18.lc_ctrl_tl_intg_err.1684551839 Jul 23 04:49:50 PM PDT 24 Jul 23 04:49:56 PM PDT 24 111309466 ps
T889 /workspace/coverage/cover_reg_top/9.lc_ctrl_tl_errors.296577580 Jul 23 04:49:39 PM PDT 24 Jul 23 04:49:47 PM PDT 24 318472809 ps
T890 /workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_hw_reset.1817428158 Jul 23 04:49:40 PM PDT 24 Jul 23 04:49:49 PM PDT 24 442057467 ps
T891 /workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_aliasing.1661470124 Jul 23 04:49:22 PM PDT 24 Jul 23 04:49:36 PM PDT 24 228074959 ps
T132 /workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_aliasing.1173859582 Jul 23 04:49:16 PM PDT 24 Jul 23 04:49:28 PM PDT 24 736428708 ps
T196 /workspace/coverage/cover_reg_top/14.lc_ctrl_same_csr_outstanding.3176187130 Jul 23 04:49:45 PM PDT 24 Jul 23 04:49:51 PM PDT 24 87029099 ps
T892 /workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_hw_reset.1521614245 Jul 23 04:49:28 PM PDT 24 Jul 23 04:49:36 PM PDT 24 58510804 ps
T197 /workspace/coverage/cover_reg_top/16.lc_ctrl_csr_rw.2786363977 Jul 23 04:49:49 PM PDT 24 Jul 23 04:49:54 PM PDT 24 14543949 ps
T109 /workspace/coverage/cover_reg_top/2.lc_ctrl_tl_intg_err.1340860310 Jul 23 04:49:10 PM PDT 24 Jul 23 04:49:18 PM PDT 24 150580672 ps
T893 /workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_same_csr_outstanding.4064578632 Jul 23 04:49:15 PM PDT 24 Jul 23 04:49:24 PM PDT 24 209501593 ps
T894 /workspace/coverage/cover_reg_top/0.lc_ctrl_csr_bit_bash.3154747745 Jul 23 04:49:13 PM PDT 24 Jul 23 04:49:21 PM PDT 24 27180820 ps
T895 /workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_rw.2345960208 Jul 23 04:49:39 PM PDT 24 Jul 23 04:49:47 PM PDT 24 141352316 ps
T896 /workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.2983418956 Jul 23 04:49:29 PM PDT 24 Jul 23 04:49:37 PM PDT 24 425917379 ps
T897 /workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_same_csr_outstanding.2090249753 Jul 23 04:49:11 PM PDT 24 Jul 23 04:49:19 PM PDT 24 204828589 ps
T898 /workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_csr_rw.2919654364 Jul 23 04:49:19 PM PDT 24 Jul 23 04:49:28 PM PDT 24 1642602720 ps
T180 /workspace/coverage/cover_reg_top/3.lc_ctrl_csr_hw_reset.841719184 Jul 23 04:49:21 PM PDT 24 Jul 23 04:49:30 PM PDT 24 25137184 ps
T112 /workspace/coverage/cover_reg_top/4.lc_ctrl_tl_intg_err.3122387035 Jul 23 04:49:18 PM PDT 24 Jul 23 04:49:27 PM PDT 24 240685329 ps
T181 /workspace/coverage/cover_reg_top/19.lc_ctrl_csr_rw.2841054221 Jul 23 04:49:46 PM PDT 24 Jul 23 04:49:52 PM PDT 24 85024813 ps
T899 /workspace/coverage/cover_reg_top/12.lc_ctrl_csr_mem_rw_with_rand_reset.2564715286 Jul 23 04:49:47 PM PDT 24 Jul 23 04:49:53 PM PDT 24 222825172 ps
T900 /workspace/coverage/cover_reg_top/4.lc_ctrl_csr_bit_bash.1343182888 Jul 23 04:49:18 PM PDT 24 Jul 23 04:49:26 PM PDT 24 37327253 ps
T901 /workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_alert_test.617895417 Jul 23 04:49:11 PM PDT 24 Jul 23 04:49:18 PM PDT 24 99183905 ps
T902 /workspace/coverage/cover_reg_top/13.lc_ctrl_tl_errors.997822336 Jul 23 04:49:47 PM PDT 24 Jul 23 04:49:55 PM PDT 24 150548127 ps
T903 /workspace/coverage/cover_reg_top/2.lc_ctrl_csr_hw_reset.1912425221 Jul 23 04:49:18 PM PDT 24 Jul 23 04:49:26 PM PDT 24 127781311 ps
T182 /workspace/coverage/cover_reg_top/4.lc_ctrl_csr_hw_reset.466135216 Jul 23 04:49:22 PM PDT 24 Jul 23 04:49:31 PM PDT 24 40290617 ps
T904 /workspace/coverage/cover_reg_top/5.lc_ctrl_csr_rw.2004237882 Jul 23 04:49:21 PM PDT 24 Jul 23 04:49:29 PM PDT 24 118918260 ps
T116 /workspace/coverage/cover_reg_top/5.lc_ctrl_tl_intg_err.2116709702 Jul 23 04:49:20 PM PDT 24 Jul 23 04:49:29 PM PDT 24 238747409 ps
T905 /workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.3273128958 Jul 23 04:49:37 PM PDT 24 Jul 23 04:49:45 PM PDT 24 501045925 ps
T183 /workspace/coverage/cover_reg_top/3.lc_ctrl_csr_aliasing.1582850881 Jul 23 04:49:19 PM PDT 24 Jul 23 04:49:28 PM PDT 24 59113536 ps
T906 /workspace/coverage/cover_reg_top/16.lc_ctrl_same_csr_outstanding.370533566 Jul 23 04:49:46 PM PDT 24 Jul 23 04:49:52 PM PDT 24 33463193 ps
T907 /workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_rw.1203263518 Jul 23 04:49:24 PM PDT 24 Jul 23 04:49:35 PM PDT 24 262992000 ps
T908 /workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.1773121429 Jul 23 04:49:30 PM PDT 24 Jul 23 04:49:38 PM PDT 24 257607163 ps
T184 /workspace/coverage/cover_reg_top/11.lc_ctrl_csr_rw.1699980587 Jul 23 04:49:38 PM PDT 24 Jul 23 04:49:45 PM PDT 24 40123336 ps
T909 /workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_alert_test.2551073712 Jul 23 04:49:13 PM PDT 24 Jul 23 04:49:21 PM PDT 24 84496710 ps
T185 /workspace/coverage/cover_reg_top/14.lc_ctrl_csr_rw.3442275698 Jul 23 04:49:45 PM PDT 24 Jul 23 04:49:51 PM PDT 24 15952923 ps
T910 /workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_alert_test.1094736394 Jul 23 04:49:18 PM PDT 24 Jul 23 04:49:27 PM PDT 24 52718844 ps
T911 /workspace/coverage/cover_reg_top/3.lc_ctrl_csr_mem_rw_with_rand_reset.1853265421 Jul 23 04:49:19 PM PDT 24 Jul 23 04:49:27 PM PDT 24 261793362 ps
T912 /workspace/coverage/cover_reg_top/18.lc_ctrl_tl_errors.2301323557 Jul 23 04:49:46 PM PDT 24 Jul 23 04:49:54 PM PDT 24 304867340 ps
T913 /workspace/coverage/cover_reg_top/7.lc_ctrl_same_csr_outstanding.3186101017 Jul 23 04:49:29 PM PDT 24 Jul 23 04:49:37 PM PDT 24 21859702 ps
T914 /workspace/coverage/cover_reg_top/0.lc_ctrl_csr_rw.871246013 Jul 23 04:49:11 PM PDT 24 Jul 23 04:49:18 PM PDT 24 17808060 ps
T915 /workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_hw_reset.1334386982 Jul 23 04:49:11 PM PDT 24 Jul 23 04:49:19 PM PDT 24 202125365 ps
T916 /workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_aliasing.1589869947 Jul 23 04:49:29 PM PDT 24 Jul 23 04:49:39 PM PDT 24 261055700 ps
T917 /workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_rw.2065060348 Jul 23 04:49:34 PM PDT 24 Jul 23 04:49:42 PM PDT 24 59194061 ps
T113 /workspace/coverage/cover_reg_top/9.lc_ctrl_tl_intg_err.3402832191 Jul 23 04:49:38 PM PDT 24 Jul 23 04:49:47 PM PDT 24 150208406 ps
T918 /workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_bit_bash.2491871989 Jul 23 04:49:29 PM PDT 24 Jul 23 04:49:42 PM PDT 24 560786000 ps
T126 /workspace/coverage/cover_reg_top/7.lc_ctrl_tl_intg_err.2457539485 Jul 23 04:49:30 PM PDT 24 Jul 23 04:49:38 PM PDT 24 46590546 ps
T186 /workspace/coverage/cover_reg_top/9.lc_ctrl_csr_rw.567714977 Jul 23 04:49:38 PM PDT 24 Jul 23 04:49:44 PM PDT 24 53929851 ps
T919 /workspace/coverage/cover_reg_top/2.lc_ctrl_csr_mem_rw_with_rand_reset.3945987639 Jul 23 04:49:13 PM PDT 24 Jul 23 04:49:21 PM PDT 24 17469883 ps
T920 /workspace/coverage/cover_reg_top/2.lc_ctrl_csr_aliasing.2443754271 Jul 23 04:49:13 PM PDT 24 Jul 23 04:49:21 PM PDT 24 85340645 ps
T921 /workspace/coverage/cover_reg_top/14.lc_ctrl_tl_errors.1200795742 Jul 23 04:49:43 PM PDT 24 Jul 23 04:49:52 PM PDT 24 71175368 ps
T922 /workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_bit_bash.1415241148 Jul 23 04:49:26 PM PDT 24 Jul 23 04:50:09 PM PDT 24 9326087134 ps
T923 /workspace/coverage/cover_reg_top/5.lc_ctrl_same_csr_outstanding.1164372024 Jul 23 04:49:29 PM PDT 24 Jul 23 04:49:36 PM PDT 24 86081537 ps
T924 /workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_hw_reset.3789319907 Jul 23 04:49:12 PM PDT 24 Jul 23 04:49:21 PM PDT 24 574138572 ps
T925 /workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.617703088 Jul 23 04:49:10 PM PDT 24 Jul 23 04:49:18 PM PDT 24 106689504 ps
T127 /workspace/coverage/cover_reg_top/10.lc_ctrl_tl_intg_err.887090839 Jul 23 04:49:39 PM PDT 24 Jul 23 04:49:49 PM PDT 24 216784731 ps
T926 /workspace/coverage/cover_reg_top/2.lc_ctrl_same_csr_outstanding.3198167254 Jul 23 04:49:11 PM PDT 24 Jul 23 04:49:19 PM PDT 24 77633818 ps
T927 /workspace/coverage/cover_reg_top/17.lc_ctrl_csr_rw.639126841 Jul 23 04:49:46 PM PDT 24 Jul 23 04:49:52 PM PDT 24 153058485 ps
T928 /workspace/coverage/cover_reg_top/4.lc_ctrl_same_csr_outstanding.4010852234 Jul 23 04:49:19 PM PDT 24 Jul 23 04:49:28 PM PDT 24 51742935 ps
T929 /workspace/coverage/cover_reg_top/13.lc_ctrl_same_csr_outstanding.808119906 Jul 23 04:49:49 PM PDT 24 Jul 23 04:49:54 PM PDT 24 42397814 ps
T930 /workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_aliasing.1337254223 Jul 23 04:49:29 PM PDT 24 Jul 23 04:49:41 PM PDT 24 515654324 ps
T931 /workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_bit_bash.3620442676 Jul 23 04:49:20 PM PDT 24 Jul 23 04:49:36 PM PDT 24 2775098131 ps
T932 /workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_bit_bash.3787461472 Jul 23 04:49:29 PM PDT 24 Jul 23 04:50:04 PM PDT 24 2619439807 ps
T933 /workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_alert_test.971402929 Jul 23 04:49:33 PM PDT 24 Jul 23 04:49:41 PM PDT 24 129968549 ps
T934 /workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_alert_test.3457134516 Jul 23 04:49:34 PM PDT 24 Jul 23 04:49:42 PM PDT 24 43589090 ps
T935 /workspace/coverage/cover_reg_top/11.lc_ctrl_tl_errors.1240812081 Jul 23 04:49:38 PM PDT 24 Jul 23 04:49:46 PM PDT 24 153677001 ps
T936 /workspace/coverage/cover_reg_top/12.lc_ctrl_tl_errors.280982738 Jul 23 04:49:37 PM PDT 24 Jul 23 04:49:45 PM PDT 24 68596857 ps
T937 /workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_alert_test.2972522946 Jul 23 04:49:19 PM PDT 24 Jul 23 04:49:27 PM PDT 24 27512296 ps
T938 /workspace/coverage/cover_reg_top/17.lc_ctrl_csr_mem_rw_with_rand_reset.990425931 Jul 23 04:49:46 PM PDT 24 Jul 23 04:49:52 PM PDT 24 50604090 ps
T939 /workspace/coverage/cover_reg_top/3.lc_ctrl_tl_errors.3840281341 Jul 23 04:49:23 PM PDT 24 Jul 23 04:49:33 PM PDT 24 108151793 ps
T940 /workspace/coverage/cover_reg_top/1.lc_ctrl_tl_errors.1852281296 Jul 23 04:49:10 PM PDT 24 Jul 23 04:49:19 PM PDT 24 153101562 ps
T941 /workspace/coverage/cover_reg_top/4.lc_ctrl_csr_rw.3110208676 Jul 23 04:49:20 PM PDT 24 Jul 23 04:49:29 PM PDT 24 27650331 ps
T942 /workspace/coverage/cover_reg_top/1.lc_ctrl_csr_bit_bash.1026996660 Jul 23 04:49:22 PM PDT 24 Jul 23 04:49:31 PM PDT 24 135785283 ps
T123 /workspace/coverage/cover_reg_top/15.lc_ctrl_tl_intg_err.3328242705 Jul 23 04:49:45 PM PDT 24 Jul 23 04:49:54 PM PDT 24 2151433795 ps
T124 /workspace/coverage/cover_reg_top/1.lc_ctrl_tl_intg_err.3128317879 Jul 23 04:49:08 PM PDT 24 Jul 23 04:49:17 PM PDT 24 288470377 ps
T943 /workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_same_csr_outstanding.1970783878 Jul 23 04:49:36 PM PDT 24 Jul 23 04:49:42 PM PDT 24 82714541 ps
T187 /workspace/coverage/cover_reg_top/8.lc_ctrl_csr_rw.2704934252 Jul 23 04:49:37 PM PDT 24 Jul 23 04:49:43 PM PDT 24 12147575 ps
T944 /workspace/coverage/cover_reg_top/10.lc_ctrl_same_csr_outstanding.3666031343 Jul 23 04:49:38 PM PDT 24 Jul 23 04:49:46 PM PDT 24 41913413 ps
T189 /workspace/coverage/cover_reg_top/0.lc_ctrl_csr_aliasing.806482699 Jul 23 04:49:13 PM PDT 24 Jul 23 04:49:21 PM PDT 24 39970878 ps
T945 /workspace/coverage/cover_reg_top/10.lc_ctrl_csr_rw.3066841158 Jul 23 04:49:37 PM PDT 24 Jul 23 04:49:43 PM PDT 24 13729290 ps
T946 /workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_same_csr_outstanding.3971868210 Jul 23 04:49:19 PM PDT 24 Jul 23 04:49:28 PM PDT 24 19280052 ps
T947 /workspace/coverage/cover_reg_top/6.lc_ctrl_tl_errors.2661975692 Jul 23 04:49:28 PM PDT 24 Jul 23 04:49:39 PM PDT 24 110870138 ps
T948 /workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_rw.2626340692 Jul 23 04:49:31 PM PDT 24 Jul 23 04:49:39 PM PDT 24 58507970 ps
T949 /workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_hw_reset.1306740182 Jul 23 04:49:34 PM PDT 24 Jul 23 04:49:44 PM PDT 24 267844594 ps
T190 /workspace/coverage/cover_reg_top/6.lc_ctrl_csr_rw.1796956930 Jul 23 04:49:31 PM PDT 24 Jul 23 04:49:38 PM PDT 24 34354906 ps
T950 /workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_hw_reset.1305809808 Jul 23 04:49:21 PM PDT 24 Jul 23 04:49:30 PM PDT 24 106789235 ps
T951 /workspace/coverage/cover_reg_top/8.lc_ctrl_tl_errors.3053254654 Jul 23 04:49:41 PM PDT 24 Jul 23 04:49:50 PM PDT 24 129415503 ps
T952 /workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_bit_bash.357404750 Jul 23 04:49:36 PM PDT 24 Jul 23 04:50:00 PM PDT 24 696899920 ps
T953 /workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_hw_reset.1823808189 Jul 23 04:49:21 PM PDT 24 Jul 23 04:49:34 PM PDT 24 999527736 ps
T954 /workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.2981924085 Jul 23 04:49:22 PM PDT 24 Jul 23 04:49:33 PM PDT 24 271691586 ps
T955 /workspace/coverage/cover_reg_top/2.lc_ctrl_tl_errors.357840280 Jul 23 04:49:18 PM PDT 24 Jul 23 04:49:27 PM PDT 24 575349853 ps
T956 /workspace/coverage/cover_reg_top/0.lc_ctrl_tl_errors.3247108523 Jul 23 04:49:09 PM PDT 24 Jul 23 04:49:18 PM PDT 24 106762022 ps
T957 /workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_csr_aliasing.1281575817 Jul 23 04:49:29 PM PDT 24 Jul 23 04:49:38 PM PDT 24 1732196352 ps
T958 /workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_hw_reset.2237225349 Jul 23 04:49:29 PM PDT 24 Jul 23 04:49:39 PM PDT 24 148673787 ps
T959 /workspace/coverage/cover_reg_top/1.lc_ctrl_csr_aliasing.3278606926 Jul 23 04:49:18 PM PDT 24 Jul 23 04:49:26 PM PDT 24 144312925 ps
T960 /workspace/coverage/cover_reg_top/15.lc_ctrl_same_csr_outstanding.2591268513 Jul 23 04:49:44 PM PDT 24 Jul 23 04:49:51 PM PDT 24 28463010 ps
T961 /workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_rw.3685147539 Jul 23 04:49:30 PM PDT 24 Jul 23 04:49:38 PM PDT 24 78403640 ps
T962 /workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.899515274 Jul 23 04:49:11 PM PDT 24 Jul 23 04:49:21 PM PDT 24 302151541 ps
T963 /workspace/coverage/cover_reg_top/0.lc_ctrl_same_csr_outstanding.582896214 Jul 23 04:49:14 PM PDT 24 Jul 23 04:49:23 PM PDT 24 186270472 ps
T964 /workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_csr_bit_bash.2509858983 Jul 23 04:49:22 PM PDT 24 Jul 23 04:49:37 PM PDT 24 767464668 ps
T188 /workspace/coverage/cover_reg_top/0.lc_ctrl_csr_hw_reset.2858451981 Jul 23 04:49:13 PM PDT 24 Jul 23 04:49:21 PM PDT 24 22576569 ps
T965 /workspace/coverage/cover_reg_top/4.lc_ctrl_csr_mem_rw_with_rand_reset.2019278246 Jul 23 04:49:18 PM PDT 24 Jul 23 04:49:26 PM PDT 24 55440364 ps
T966 /workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.806791740 Jul 23 04:49:19 PM PDT 24 Jul 23 04:49:28 PM PDT 24 102181547 ps
T122 /workspace/coverage/cover_reg_top/14.lc_ctrl_tl_intg_err.127822628 Jul 23 04:49:44 PM PDT 24 Jul 23 04:49:53 PM PDT 24 1309208999 ps
T967 /workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_bit_bash.539876578 Jul 23 04:49:21 PM PDT 24 Jul 23 04:49:34 PM PDT 24 353334883 ps
T968 /workspace/coverage/cover_reg_top/6.lc_ctrl_same_csr_outstanding.1970722923 Jul 23 04:49:27 PM PDT 24 Jul 23 04:49:35 PM PDT 24 58718789 ps
T969 /workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_aliasing.4028959020 Jul 23 04:49:11 PM PDT 24 Jul 23 04:49:31 PM PDT 24 2303102044 ps
T970 /workspace/coverage/cover_reg_top/18.lc_ctrl_same_csr_outstanding.1610862129 Jul 23 04:49:45 PM PDT 24 Jul 23 04:49:52 PM PDT 24 38607710 ps
T971 /workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_rw.3860510624 Jul 23 04:49:21 PM PDT 24 Jul 23 04:49:29 PM PDT 24 75345193 ps
T972 /workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_same_csr_outstanding.3820664546 Jul 23 04:49:19 PM PDT 24 Jul 23 04:49:26 PM PDT 24 20752854 ps
T973 /workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.1203702785 Jul 23 04:49:29 PM PDT 24 Jul 23 04:49:38 PM PDT 24 663226881 ps
T974 /workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_hw_reset.608811133 Jul 23 04:49:13 PM PDT 24 Jul 23 04:49:23 PM PDT 24 110884145 ps
T975 /workspace/coverage/cover_reg_top/16.lc_ctrl_tl_errors.4072439168 Jul 23 04:49:46 PM PDT 24 Jul 23 04:49:55 PM PDT 24 179903557 ps
T976 /workspace/coverage/cover_reg_top/1.lc_ctrl_csr_rw.1360337223 Jul 23 04:49:12 PM PDT 24 Jul 23 04:49:19 PM PDT 24 113698080 ps
T128 /workspace/coverage/cover_reg_top/13.lc_ctrl_tl_intg_err.862203839 Jul 23 04:49:47 PM PDT 24 Jul 23 04:49:54 PM PDT 24 278119009 ps
T129 /workspace/coverage/cover_reg_top/3.lc_ctrl_tl_intg_err.481938906 Jul 23 04:49:19 PM PDT 24 Jul 23 04:49:29 PM PDT 24 232561916 ps
T977 /workspace/coverage/cover_reg_top/13.lc_ctrl_csr_mem_rw_with_rand_reset.89560324 Jul 23 04:49:49 PM PDT 24 Jul 23 04:49:54 PM PDT 24 238932184 ps
T978 /workspace/coverage/cover_reg_top/1.lc_ctrl_same_csr_outstanding.3029589267 Jul 23 04:49:11 PM PDT 24 Jul 23 04:49:19 PM PDT 24 76789048 ps
T979 /workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_aliasing.2764861183 Jul 23 04:49:21 PM PDT 24 Jul 23 04:49:41 PM PDT 24 2185408983 ps
T980 /workspace/coverage/cover_reg_top/16.lc_ctrl_csr_mem_rw_with_rand_reset.2145383463 Jul 23 04:49:45 PM PDT 24 Jul 23 04:49:52 PM PDT 24 55581878 ps
T981 /workspace/coverage/cover_reg_top/3.lc_ctrl_csr_bit_bash.2177444021 Jul 23 04:49:19 PM PDT 24 Jul 23 04:49:28 PM PDT 24 98498965 ps
T110 /workspace/coverage/cover_reg_top/19.lc_ctrl_tl_intg_err.2078479771 Jul 23 04:49:45 PM PDT 24 Jul 23 04:49:53 PM PDT 24 172150793 ps
T982 /workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_aliasing.2695945142 Jul 23 04:49:28 PM PDT 24 Jul 23 04:49:41 PM PDT 24 229857601 ps
T983 /workspace/coverage/cover_reg_top/18.lc_ctrl_csr_rw.1072972797 Jul 23 04:49:47 PM PDT 24 Jul 23 04:49:53 PM PDT 24 15846911 ps
T984 /workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_alert_test.2986627686 Jul 23 04:49:21 PM PDT 24 Jul 23 04:49:29 PM PDT 24 41134173 ps
T985 /workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_same_csr_outstanding.3642311924 Jul 23 04:49:27 PM PDT 24 Jul 23 04:49:36 PM PDT 24 51304422 ps
T986 /workspace/coverage/cover_reg_top/9.lc_ctrl_csr_mem_rw_with_rand_reset.2494089329 Jul 23 04:49:38 PM PDT 24 Jul 23 04:49:44 PM PDT 24 497574809 ps
T987 /workspace/coverage/cover_reg_top/3.lc_ctrl_same_csr_outstanding.3937284021 Jul 23 04:49:20 PM PDT 24 Jul 23 04:49:28 PM PDT 24 51073858 ps
T988 /workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_bit_bash.1740886148 Jul 23 04:49:14 PM PDT 24 Jul 23 04:49:31 PM PDT 24 970177930 ps
T989 /workspace/coverage/cover_reg_top/19.lc_ctrl_same_csr_outstanding.2267626238 Jul 23 04:49:58 PM PDT 24 Jul 23 04:50:04 PM PDT 24 41100344 ps
T990 /workspace/coverage/cover_reg_top/14.lc_ctrl_csr_mem_rw_with_rand_reset.2276067748 Jul 23 04:49:45 PM PDT 24 Jul 23 04:49:52 PM PDT 24 103136784 ps
T991 /workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_bit_bash.1670648868 Jul 23 04:49:13 PM PDT 24 Jul 23 04:49:25 PM PDT 24 421670807 ps
T992 /workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_csr_hw_reset.2674842523 Jul 23 04:49:18 PM PDT 24 Jul 23 04:49:28 PM PDT 24 106837015 ps
T993 /workspace/coverage/cover_reg_top/17.lc_ctrl_same_csr_outstanding.1990363784 Jul 23 04:49:45 PM PDT 24 Jul 23 04:49:52 PM PDT 24 574956775 ps
T994 /workspace/coverage/cover_reg_top/11.lc_ctrl_same_csr_outstanding.4292814700 Jul 23 04:49:40 PM PDT 24 Jul 23 04:49:47 PM PDT 24 16661148 ps
T995 /workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_aliasing.1171861005 Jul 23 04:49:27 PM PDT 24 Jul 23 04:49:41 PM PDT 24 580670392 ps
T996 /workspace/coverage/cover_reg_top/15.lc_ctrl_tl_errors.1766675556 Jul 23 04:49:47 PM PDT 24 Jul 23 04:49:54 PM PDT 24 97103035 ps
T997 /workspace/coverage/cover_reg_top/8.lc_ctrl_csr_mem_rw_with_rand_reset.1600120266 Jul 23 04:49:36 PM PDT 24 Jul 23 04:49:44 PM PDT 24 20299522 ps
T998 /workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_same_csr_outstanding.2091358141 Jul 23 04:49:30 PM PDT 24 Jul 23 04:49:37 PM PDT 24 44028317 ps
T999 /workspace/coverage/cover_reg_top/15.lc_ctrl_csr_mem_rw_with_rand_reset.4287580180 Jul 23 04:49:45 PM PDT 24 Jul 23 04:49:52 PM PDT 24 15814339 ps
T1000 /workspace/coverage/cover_reg_top/10.lc_ctrl_csr_mem_rw_with_rand_reset.724546653 Jul 23 04:49:39 PM PDT 24 Jul 23 04:49:47 PM PDT 24 109473333 ps
T1001 /workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_rw.1792015457 Jul 23 04:49:12 PM PDT 24 Jul 23 04:49:19 PM PDT 24 103295948 ps
T1002 /workspace/coverage/cover_reg_top/10.lc_ctrl_tl_errors.2771685166 Jul 23 04:49:39 PM PDT 24 Jul 23 04:49:48 PM PDT 24 520901476 ps
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