SCORE | INSTANCES | WEIGHT | GOAL | AT LEAST | PER INSTANCE | AUTO BIN MAX | PRINT MISSING |
100.00 | 91.67 | 1 | 100 | 1 | 1 | 64 | 64 |
NAME | SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
mubi4_cov_of_tb.dut.u_otp_lc_data_i_rma_token_valid_if | 83.33 | 1 | 100 | 1 | 64 | 64 |
mubi4_cov_of_tb.dut.u_otp_lc_data_i_secrets_valid_if | 83.33 | 1 | 100 | 1 | 64 | 64 |
mubi4_cov_of_tb.dut.u_otp_lc_data_i_test_tokens_valid_if | 83.33 | 1 | 100 | 1 | 64 | 64 |
mubi4_cov_of_tb.dut.u_lc_clk_byp_ack_i_if | 100.00 | 1 | 100 | 1 | 64 | 64 |
mubi4_cov_of_tb.dut.u_lc_flash_rma_ack_i_if.gen_connect_lc_tx_items[0].lc_tx_if | 100.00 | 1 | 100 | 1 | 64 | 64 |
mubi4_cov_of_tb.dut.u_lc_flash_rma_ack_i_if.gen_connect_lc_tx_items[1].lc_tx_if | 100.00 | 1 | 100 | 1 | 64 | 64 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
83.33 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 6 | 1 | 5 | 83.33 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_value | 6 | 1 | 5 | 83.33 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
83.33 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 6 | 1 | 5 | 83.33 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_value | 6 | 1 | 5 | 83.33 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
83.33 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 6 | 1 | 5 | 83.33 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_value | 6 | 1 | 5 | 83.33 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 6 | 0 | 6 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_value | 6 | 0 | 6 | 100.00 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 6 | 0 | 6 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_value | 6 | 0 | 6 | 100.00 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 6 | 0 | 6 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_value | 6 | 0 | 6 | 100.00 | 100 | 1 | 1 | 0 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 6 | 1 | 5 | 83.33 |
NAME | COUNT | AT LEAST | NUMBER | STATUS |
false | 0 | 1 | 1 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
others[0] | 396 | 1 | T3 | 10 | T62 | 10 | T63 | 16 | ||||
others[1] | 344 | 1 | T3 | 4 | T62 | 12 | T63 | 12 | ||||
others[2] | 268 | 1 | T62 | 6 | T63 | 1 | T238 | 2 | ||||
others[3] | 533 | 1 | T3 | 4 | T62 | 7 | T63 | 9 | ||||
true | 57556 | 1 | T1 | 1 | T2 | 89 | T3 | 58 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 6 | 1 | 5 | 83.33 |
NAME | COUNT | AT LEAST | NUMBER | STATUS |
true | 0 | 1 | 1 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
others[0] | 267 | 1 | T3 | 6 | T62 | 4 | T63 | 4 | ||||
others[1] | 339 | 1 | T3 | 5 | T62 | 2 | T63 | 4 | ||||
others[2] | 345 | 1 | T3 | 2 | T62 | 2 | T63 | 8 | ||||
others[3] | 553 | 1 | T3 | 5 | T62 | 4 | T63 | 18 | ||||
false | 57556 | 1 | T1 | 1 | T2 | 89 | T3 | 56 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 6 | 1 | 5 | 83.33 |
NAME | COUNT | AT LEAST | NUMBER | STATUS |
false | 0 | 1 | 1 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
others[0] | 305 | 1 | T3 | 7 | T62 | 6 | T63 | 2 | ||||
others[1] | 336 | 1 | T3 | 6 | T62 | 8 | T63 | 14 | ||||
others[2] | 373 | 1 | T3 | 4 | T62 | 6 | T63 | 8 | ||||
others[3] | 493 | 1 | T3 | 8 | T62 | 2 | T63 | 8 | ||||
true | 57567 | 1 | T1 | 1 | T2 | 89 | T3 | 55 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 6 | 0 | 6 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
others[0] | 166 | 1 | T3 | 4 | T62 | 1 | T63 | 7 | ||||
others[1] | 144 | 1 | T3 | 5 | T63 | 4 | T238 | 2 | ||||
others[2] | 137 | 1 | T3 | 1 | T62 | 2 | T63 | 6 | ||||
others[3] | 240 | 1 | T3 | 6 | T62 | 4 | T63 | 7 | ||||
false | 1041030 | 1 | T1 | 1 | T2 | 89 | T3 | 75 | ||||
true | 982669 | 1 | T1 | 1 | T11 | 2 | T12 | 3 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 6 | 0 | 6 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
others[0] | 169 | 1 | T3 | 2 | T62 | 4 | T63 | 5 | ||||
others[1] | 156 | 1 | T3 | 4 | T62 | 1 | T63 | 2 | ||||
others[2] | 176 | 1 | T3 | 4 | T62 | 2 | T63 | 5 | ||||
others[3] | 308 | 1 | T3 | 3 | T62 | 5 | T63 | 8 | ||||
false | 3366148 | 1 | T1 | 1 | T2 | 89 | T3 | 73 | ||||
true | 3307807 | 1 | T3 | 7 | T4 | 1 | T11 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 6 | 0 | 6 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
others[0] | 169 | 1 | T3 | 2 | T62 | 4 | T63 | 5 | ||||
others[1] | 156 | 1 | T3 | 4 | T62 | 1 | T63 | 2 | ||||
others[2] | 176 | 1 | T3 | 4 | T62 | 2 | T63 | 5 | ||||
others[3] | 308 | 1 | T3 | 3 | T62 | 5 | T63 | 8 | ||||
false | 3366148 | 1 | T1 | 1 | T2 | 89 | T3 | 73 | ||||
true | 3307807 | 1 | T3 | 7 | T4 | 1 | T11 | 2 |
0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |