SCORE | INSTANCES | WEIGHT | GOAL | AT LEAST | PER INSTANCE | AUTO BIN MAX | PRINT MISSING |
100.00 | 91.67 | 1 | 100 | 1 | 1 | 64 | 64 |
NAME | SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
mubi4_cov_of_tb.dut.u_otp_lc_data_i_rma_token_valid_if | 83.33 | 1 | 100 | 1 | 64 | 64 |
mubi4_cov_of_tb.dut.u_otp_lc_data_i_secrets_valid_if | 83.33 | 1 | 100 | 1 | 64 | 64 |
mubi4_cov_of_tb.dut.u_otp_lc_data_i_test_tokens_valid_if | 83.33 | 1 | 100 | 1 | 64 | 64 |
mubi4_cov_of_tb.dut.u_lc_clk_byp_ack_i_if | 100.00 | 1 | 100 | 1 | 64 | 64 |
mubi4_cov_of_tb.dut.u_lc_flash_rma_ack_i_if.gen_connect_lc_tx_items[0].lc_tx_if | 100.00 | 1 | 100 | 1 | 64 | 64 |
mubi4_cov_of_tb.dut.u_lc_flash_rma_ack_i_if.gen_connect_lc_tx_items[1].lc_tx_if | 100.00 | 1 | 100 | 1 | 64 | 64 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
83.33 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 6 | 1 | 5 | 83.33 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_value | 6 | 1 | 5 | 83.33 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
83.33 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 6 | 1 | 5 | 83.33 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_value | 6 | 1 | 5 | 83.33 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
83.33 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 6 | 1 | 5 | 83.33 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_value | 6 | 1 | 5 | 83.33 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 6 | 0 | 6 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_value | 6 | 0 | 6 | 100.00 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 6 | 0 | 6 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_value | 6 | 0 | 6 | 100.00 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 6 | 0 | 6 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_value | 6 | 0 | 6 | 100.00 | 100 | 1 | 1 | 0 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 6 | 1 | 5 | 83.33 |
NAME | COUNT | AT LEAST | NUMBER | STATUS |
false | 0 | 1 | 1 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
others[0] | 352 | 1 | T3 | 8 | T65 | 10 | T46 | 6 | ||||
others[1] | 331 | 1 | T3 | 10 | T65 | 2 | T46 | 6 | ||||
others[2] | 264 | 1 | T3 | 8 | T65 | 6 | T46 | 6 | ||||
others[3] | 539 | 1 | T3 | 19 | T65 | 10 | T46 | 8 | ||||
true | 43381 | 1 | T1 | 379 | T2 | 85 | T3 | 85 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 6 | 1 | 5 | 83.33 |
NAME | COUNT | AT LEAST | NUMBER | STATUS |
true | 0 | 1 | 1 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
others[0] | 354 | 1 | T3 | 12 | T65 | 4 | T46 | 10 | ||||
others[1] | 355 | 1 | T3 | 14 | T65 | 6 | T46 | 6 | ||||
others[2] | 344 | 1 | T3 | 6 | T65 | 4 | T46 | 4 | ||||
others[3] | 583 | 1 | T3 | 6 | T65 | 8 | T46 | 4 | ||||
false | 43316 | 1 | T1 | 379 | T2 | 85 | T3 | 88 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 6 | 1 | 5 | 83.33 |
NAME | COUNT | AT LEAST | NUMBER | STATUS |
false | 0 | 1 | 1 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
others[0] | 322 | 1 | T3 | 6 | T65 | 10 | T46 | 2 | ||||
others[1] | 325 | 1 | T3 | 6 | T65 | 10 | T46 | 2 | ||||
others[2] | 299 | 1 | T3 | 4 | T65 | 4 | T46 | 4 | ||||
others[3] | 546 | 1 | T3 | 12 | T65 | 8 | T46 | 10 | ||||
true | 43360 | 1 | T1 | 379 | T2 | 85 | T3 | 91 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 6 | 0 | 6 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
others[0] | 178 | 1 | T3 | 7 | T65 | 3 | T46 | 2 | ||||
others[1] | 146 | 1 | T3 | 4 | T46 | 1 | T227 | 5 | ||||
others[2] | 149 | 1 | T3 | 3 | T65 | 3 | T46 | 4 | ||||
others[3] | 248 | 1 | T3 | 3 | T65 | 5 | T46 | 4 | ||||
false | 664008 | 1 | T1 | 4265 | T2 | 85 | T3 | 110 | ||||
true | 619807 | 1 | T1 | 3886 | T11 | 1235 | T4 | 5 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 6 | 0 | 6 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
others[0] | 190 | 1 | T3 | 6 | T65 | 4 | T46 | 1 | ||||
others[1] | 157 | 1 | T3 | 1 | T65 | 2 | T46 | 3 | ||||
others[2] | 194 | 1 | T3 | 7 | T65 | 3 | T46 | 5 | ||||
others[3] | 305 | 1 | T3 | 5 | T65 | 4 | T46 | 7 | ||||
false | 1387753 | 1 | T1 | 37208 | T2 | 88 | T3 | 116 | ||||
true | 1343578 | 1 | T1 | 36829 | T2 | 3 | T3 | 4 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 6 | 0 | 6 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
others[0] | 190 | 1 | T3 | 6 | T65 | 4 | T46 | 1 | ||||
others[1] | 157 | 1 | T3 | 1 | T65 | 2 | T46 | 3 | ||||
others[2] | 194 | 1 | T3 | 7 | T65 | 3 | T46 | 5 | ||||
others[3] | 305 | 1 | T3 | 5 | T65 | 4 | T46 | 7 | ||||
false | 1387753 | 1 | T1 | 37208 | T2 | 88 | T3 | 116 | ||||
true | 1343578 | 1 | T1 | 36829 | T2 | 3 | T3 | 4 |
0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |