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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.25 97.99 95.68 93.40 100.00 98.55 99.00 96.11


Total test records in report: 1007
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T814 /workspace/coverage/default/1.lc_ctrl_security_escalation.3447807211 Aug 18 04:32:27 PM PDT 24 Aug 18 04:32:37 PM PDT 24 670999500 ps
T171 /workspace/coverage/default/25.lc_ctrl_stress_all.4054626980 Aug 18 04:33:52 PM PDT 24 Aug 18 04:36:35 PM PDT 24 9524675495 ps
T815 /workspace/coverage/default/23.lc_ctrl_sec_token_mux.449114221 Aug 18 04:33:50 PM PDT 24 Aug 18 04:34:03 PM PDT 24 493521810 ps
T816 /workspace/coverage/default/40.lc_ctrl_sec_mubi.2993675258 Aug 18 04:34:40 PM PDT 24 Aug 18 04:34:51 PM PDT 24 339651641 ps
T817 /workspace/coverage/default/41.lc_ctrl_sec_token_mux.3802020595 Aug 18 04:34:38 PM PDT 24 Aug 18 04:34:48 PM PDT 24 2483979026 ps
T818 /workspace/coverage/default/46.lc_ctrl_volatile_unlock_smoke.1312624423 Aug 18 04:34:49 PM PDT 24 Aug 18 04:34:50 PM PDT 24 11278070 ps
T819 /workspace/coverage/default/27.lc_ctrl_sec_token_mux.3883303068 Aug 18 04:34:00 PM PDT 24 Aug 18 04:34:12 PM PDT 24 313172321 ps
T820 /workspace/coverage/default/35.lc_ctrl_smoke.2234262500 Aug 18 04:34:23 PM PDT 24 Aug 18 04:34:25 PM PDT 24 77500268 ps
T89 /workspace/coverage/default/24.lc_ctrl_smoke.2717136762 Aug 18 04:33:52 PM PDT 24 Aug 18 04:33:54 PM PDT 24 32433924 ps
T821 /workspace/coverage/default/26.lc_ctrl_alert_test.802986613 Aug 18 04:33:55 PM PDT 24 Aug 18 04:33:57 PM PDT 24 22046689 ps
T822 /workspace/coverage/default/15.lc_ctrl_state_failure.3391662860 Aug 18 04:33:29 PM PDT 24 Aug 18 04:33:55 PM PDT 24 545816976 ps
T823 /workspace/coverage/default/45.lc_ctrl_stress_all.160162813 Aug 18 04:34:47 PM PDT 24 Aug 18 04:41:17 PM PDT 24 58253695534 ps
T824 /workspace/coverage/default/15.lc_ctrl_volatile_unlock_smoke.169186885 Aug 18 04:33:28 PM PDT 24 Aug 18 04:33:30 PM PDT 24 11958787 ps
T825 /workspace/coverage/default/41.lc_ctrl_jtag_access.3685088018 Aug 18 04:34:40 PM PDT 24 Aug 18 04:34:42 PM PDT 24 430710519 ps
T826 /workspace/coverage/default/24.lc_ctrl_errors.2283269487 Aug 18 04:33:52 PM PDT 24 Aug 18 04:34:03 PM PDT 24 991024862 ps
T827 /workspace/coverage/default/11.lc_ctrl_sec_token_digest.975708366 Aug 18 04:33:09 PM PDT 24 Aug 18 04:33:20 PM PDT 24 434451393 ps
T828 /workspace/coverage/default/10.lc_ctrl_sec_token_mux.2624595540 Aug 18 04:33:06 PM PDT 24 Aug 18 04:33:21 PM PDT 24 2616889242 ps
T829 /workspace/coverage/default/2.lc_ctrl_volatile_unlock_smoke.2442853518 Aug 18 04:32:25 PM PDT 24 Aug 18 04:32:26 PM PDT 24 32361014 ps
T830 /workspace/coverage/default/13.lc_ctrl_stress_all.3095750541 Aug 18 04:33:18 PM PDT 24 Aug 18 04:41:30 PM PDT 24 50776406918 ps
T831 /workspace/coverage/default/4.lc_ctrl_jtag_prog_failure.1972471013 Aug 18 04:32:34 PM PDT 24 Aug 18 04:32:40 PM PDT 24 755306141 ps
T832 /workspace/coverage/default/12.lc_ctrl_jtag_state_post_trans.1385174456 Aug 18 04:33:10 PM PDT 24 Aug 18 04:33:19 PM PDT 24 650271902 ps
T833 /workspace/coverage/default/21.lc_ctrl_state_post_trans.2674778299 Aug 18 04:33:45 PM PDT 24 Aug 18 04:33:53 PM PDT 24 326316348 ps
T834 /workspace/coverage/default/30.lc_ctrl_state_post_trans.1036025377 Aug 18 04:34:13 PM PDT 24 Aug 18 04:34:20 PM PDT 24 108017921 ps
T835 /workspace/coverage/default/48.lc_ctrl_alert_test.1301053854 Aug 18 04:34:56 PM PDT 24 Aug 18 04:34:57 PM PDT 24 167715293 ps
T836 /workspace/coverage/default/27.lc_ctrl_stress_all.1265836764 Aug 18 04:34:02 PM PDT 24 Aug 18 04:35:54 PM PDT 24 3557096253 ps
T837 /workspace/coverage/default/21.lc_ctrl_prog_failure.1351803767 Aug 18 04:33:49 PM PDT 24 Aug 18 04:33:51 PM PDT 24 152192842 ps
T838 /workspace/coverage/default/38.lc_ctrl_security_escalation.2873259386 Aug 18 04:34:30 PM PDT 24 Aug 18 04:34:44 PM PDT 24 409011135 ps
T839 /workspace/coverage/default/0.lc_ctrl_stress_all_with_rand_reset.2732386857 Aug 18 04:32:27 PM PDT 24 Aug 18 04:34:22 PM PDT 24 86447320123 ps
T840 /workspace/coverage/default/11.lc_ctrl_errors.1568594140 Aug 18 04:33:09 PM PDT 24 Aug 18 04:33:19 PM PDT 24 1136440180 ps
T841 /workspace/coverage/default/37.lc_ctrl_sec_mubi.1065034781 Aug 18 04:34:30 PM PDT 24 Aug 18 04:34:43 PM PDT 24 441051781 ps
T842 /workspace/coverage/default/26.lc_ctrl_sec_token_digest.570495236 Aug 18 04:33:51 PM PDT 24 Aug 18 04:34:00 PM PDT 24 986022328 ps
T843 /workspace/coverage/default/15.lc_ctrl_stress_all.373723176 Aug 18 04:33:26 PM PDT 24 Aug 18 04:36:12 PM PDT 24 38493013202 ps
T164 /workspace/coverage/default/6.lc_ctrl_stress_all_with_rand_reset.4199533480 Aug 18 04:32:43 PM PDT 24 Aug 18 04:33:59 PM PDT 24 11854228566 ps
T844 /workspace/coverage/default/17.lc_ctrl_alert_test.1809320250 Aug 18 04:33:36 PM PDT 24 Aug 18 04:33:37 PM PDT 24 64954159 ps
T845 /workspace/coverage/default/11.lc_ctrl_state_post_trans.884177340 Aug 18 04:33:09 PM PDT 24 Aug 18 04:33:17 PM PDT 24 115986190 ps
T846 /workspace/coverage/default/2.lc_ctrl_state_post_trans.1901061571 Aug 18 04:32:25 PM PDT 24 Aug 18 04:32:28 PM PDT 24 56419730 ps
T847 /workspace/coverage/default/14.lc_ctrl_prog_failure.3626608188 Aug 18 04:33:19 PM PDT 24 Aug 18 04:33:21 PM PDT 24 30270881 ps
T848 /workspace/coverage/default/22.lc_ctrl_smoke.380988961 Aug 18 04:33:48 PM PDT 24 Aug 18 04:33:52 PM PDT 24 93267318 ps
T849 /workspace/coverage/default/3.lc_ctrl_stress_all.1249727773 Aug 18 04:32:36 PM PDT 24 Aug 18 04:35:09 PM PDT 24 6798151122 ps
T850 /workspace/coverage/default/8.lc_ctrl_prog_failure.1846491799 Aug 18 04:32:52 PM PDT 24 Aug 18 04:32:55 PM PDT 24 250611573 ps
T851 /workspace/coverage/default/12.lc_ctrl_state_post_trans.3618638323 Aug 18 04:33:09 PM PDT 24 Aug 18 04:33:13 PM PDT 24 400993560 ps
T852 /workspace/coverage/default/41.lc_ctrl_prog_failure.3765395688 Aug 18 04:34:39 PM PDT 24 Aug 18 04:34:42 PM PDT 24 207677311 ps
T853 /workspace/coverage/default/30.lc_ctrl_sec_token_digest.3874921218 Aug 18 04:34:09 PM PDT 24 Aug 18 04:34:19 PM PDT 24 539134648 ps
T59 /workspace/coverage/default/4.lc_ctrl_sec_cm.3572171887 Aug 18 04:32:42 PM PDT 24 Aug 18 04:33:19 PM PDT 24 3092279657 ps
T854 /workspace/coverage/default/46.lc_ctrl_prog_failure.3494845854 Aug 18 04:34:46 PM PDT 24 Aug 18 04:34:49 PM PDT 24 37468133 ps
T855 /workspace/coverage/default/22.lc_ctrl_sec_token_mux.1620183436 Aug 18 04:33:42 PM PDT 24 Aug 18 04:33:55 PM PDT 24 1408854434 ps
T856 /workspace/coverage/default/9.lc_ctrl_jtag_access.3005903555 Aug 18 04:33:00 PM PDT 24 Aug 18 04:33:07 PM PDT 24 283624364 ps
T857 /workspace/coverage/default/32.lc_ctrl_jtag_access.3330815868 Aug 18 04:34:20 PM PDT 24 Aug 18 04:34:26 PM PDT 24 1635842101 ps
T858 /workspace/coverage/default/31.lc_ctrl_sec_token_mux.1446208373 Aug 18 04:34:08 PM PDT 24 Aug 18 04:34:15 PM PDT 24 1949321974 ps
T168 /workspace/coverage/default/47.lc_ctrl_stress_all.2722342738 Aug 18 04:34:47 PM PDT 24 Aug 18 04:35:26 PM PDT 24 1919227499 ps
T859 /workspace/coverage/default/38.lc_ctrl_volatile_unlock_smoke.423149638 Aug 18 04:34:28 PM PDT 24 Aug 18 04:34:29 PM PDT 24 15704274 ps
T860 /workspace/coverage/default/10.lc_ctrl_jtag_state_post_trans.1383144879 Aug 18 04:33:06 PM PDT 24 Aug 18 04:33:17 PM PDT 24 1399987556 ps
T861 /workspace/coverage/default/44.lc_ctrl_smoke.999725626 Aug 18 04:34:43 PM PDT 24 Aug 18 04:34:47 PM PDT 24 54738030 ps
T862 /workspace/coverage/default/38.lc_ctrl_stress_all.2802813272 Aug 18 04:34:36 PM PDT 24 Aug 18 04:36:59 PM PDT 24 15658737929 ps
T863 /workspace/coverage/default/2.lc_ctrl_security_escalation.3504095758 Aug 18 04:32:26 PM PDT 24 Aug 18 04:32:41 PM PDT 24 424655532 ps
T864 /workspace/coverage/default/19.lc_ctrl_sec_token_mux.2046831443 Aug 18 04:33:44 PM PDT 24 Aug 18 04:33:55 PM PDT 24 478032934 ps
T865 /workspace/coverage/default/44.lc_ctrl_sec_token_mux.439484037 Aug 18 04:34:41 PM PDT 24 Aug 18 04:34:52 PM PDT 24 416405697 ps
T866 /workspace/coverage/default/0.lc_ctrl_jtag_errors.1794208929 Aug 18 04:32:28 PM PDT 24 Aug 18 04:32:58 PM PDT 24 940600722 ps
T867 /workspace/coverage/default/0.lc_ctrl_errors.2000636915 Aug 18 04:32:20 PM PDT 24 Aug 18 04:32:35 PM PDT 24 556286519 ps
T868 /workspace/coverage/default/1.lc_ctrl_state_failure.212527235 Aug 18 04:32:28 PM PDT 24 Aug 18 04:32:52 PM PDT 24 1122338688 ps
T869 /workspace/coverage/default/5.lc_ctrl_alert_test.486620306 Aug 18 04:32:39 PM PDT 24 Aug 18 04:32:40 PM PDT 24 53273627 ps
T870 /workspace/coverage/default/16.lc_ctrl_security_escalation.2087157830 Aug 18 04:33:32 PM PDT 24 Aug 18 04:33:42 PM PDT 24 684720746 ps
T173 /workspace/coverage/default/47.lc_ctrl_stress_all_with_rand_reset.1954216754 Aug 18 04:34:47 PM PDT 24 Aug 18 04:35:57 PM PDT 24 2201402574 ps
T871 /workspace/coverage/default/42.lc_ctrl_sec_token_mux.3201100492 Aug 18 04:34:39 PM PDT 24 Aug 18 04:34:47 PM PDT 24 246139608 ps
T872 /workspace/coverage/default/34.lc_ctrl_smoke.2571285095 Aug 18 04:34:19 PM PDT 24 Aug 18 04:34:23 PM PDT 24 50912822 ps
T873 /workspace/coverage/default/44.lc_ctrl_stress_all.506812005 Aug 18 04:34:43 PM PDT 24 Aug 18 04:35:19 PM PDT 24 1436132715 ps
T874 /workspace/coverage/default/24.lc_ctrl_prog_failure.1264637939 Aug 18 04:33:56 PM PDT 24 Aug 18 04:33:59 PM PDT 24 65594874 ps
T875 /workspace/coverage/default/34.lc_ctrl_state_post_trans.3606781871 Aug 18 04:34:22 PM PDT 24 Aug 18 04:34:25 PM PDT 24 62161449 ps
T876 /workspace/coverage/default/43.lc_ctrl_stress_all.908968936 Aug 18 04:34:47 PM PDT 24 Aug 18 04:36:46 PM PDT 24 5901257731 ps
T877 /workspace/coverage/default/25.lc_ctrl_prog_failure.2597767780 Aug 18 04:33:53 PM PDT 24 Aug 18 04:33:55 PM PDT 24 85129902 ps
T878 /workspace/coverage/default/2.lc_ctrl_regwen_during_op.1424511127 Aug 18 04:32:25 PM PDT 24 Aug 18 04:32:43 PM PDT 24 329623908 ps
T879 /workspace/coverage/default/9.lc_ctrl_jtag_state_failure.2312065553 Aug 18 04:33:03 PM PDT 24 Aug 18 04:34:04 PM PDT 24 5633886502 ps
T119 /workspace/coverage/cover_reg_top/15.lc_ctrl_csr_mem_rw_with_rand_reset.2039183776 Aug 18 04:28:11 PM PDT 24 Aug 18 04:28:13 PM PDT 24 61714014 ps
T120 /workspace/coverage/cover_reg_top/9.lc_ctrl_tl_intg_err.171537537 Aug 18 04:28:03 PM PDT 24 Aug 18 04:28:06 PM PDT 24 451210691 ps
T129 /workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_rw.739959204 Aug 18 04:28:01 PM PDT 24 Aug 18 04:28:03 PM PDT 24 300746071 ps
T150 /workspace/coverage/cover_reg_top/2.lc_ctrl_csr_aliasing.36471555 Aug 18 04:27:33 PM PDT 24 Aug 18 04:27:35 PM PDT 24 41411599 ps
T128 /workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.2231221452 Aug 18 04:27:54 PM PDT 24 Aug 18 04:27:55 PM PDT 24 200146131 ps
T125 /workspace/coverage/cover_reg_top/14.lc_ctrl_csr_mem_rw_with_rand_reset.2151518910 Aug 18 04:28:06 PM PDT 24 Aug 18 04:28:08 PM PDT 24 25349573 ps
T153 /workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_alert_test.3748743187 Aug 18 04:27:30 PM PDT 24 Aug 18 04:27:32 PM PDT 24 231318669 ps
T880 /workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_alert_test.614086336 Aug 18 04:27:32 PM PDT 24 Aug 18 04:27:34 PM PDT 24 733495853 ps
T126 /workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_aliasing.2108887849 Aug 18 04:27:32 PM PDT 24 Aug 18 04:27:50 PM PDT 24 3690410953 ps
T149 /workspace/coverage/cover_reg_top/12.lc_ctrl_same_csr_outstanding.324948274 Aug 18 04:28:00 PM PDT 24 Aug 18 04:28:02 PM PDT 24 22612754 ps
T212 /workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_bit_bash.563192928 Aug 18 04:28:00 PM PDT 24 Aug 18 04:28:05 PM PDT 24 833529074 ps
T203 /workspace/coverage/cover_reg_top/13.lc_ctrl_same_csr_outstanding.93831234 Aug 18 04:27:55 PM PDT 24 Aug 18 04:27:56 PM PDT 24 64170262 ps
T121 /workspace/coverage/cover_reg_top/11.lc_ctrl_tl_errors.399335266 Aug 18 04:28:05 PM PDT 24 Aug 18 04:28:09 PM PDT 24 259603689 ps
T122 /workspace/coverage/cover_reg_top/12.lc_ctrl_tl_intg_err.1259105939 Aug 18 04:28:00 PM PDT 24 Aug 18 04:28:03 PM PDT 24 110946356 ps
T204 /workspace/coverage/cover_reg_top/8.lc_ctrl_same_csr_outstanding.97332825 Aug 18 04:28:04 PM PDT 24 Aug 18 04:28:05 PM PDT 24 50633840 ps
T881 /workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_rw.373948745 Aug 18 04:27:31 PM PDT 24 Aug 18 04:27:35 PM PDT 24 718577793 ps
T882 /workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_alert_test.529440417 Aug 18 04:28:01 PM PDT 24 Aug 18 04:28:02 PM PDT 24 14875477 ps
T136 /workspace/coverage/cover_reg_top/17.lc_ctrl_csr_mem_rw_with_rand_reset.3322506774 Aug 18 04:28:25 PM PDT 24 Aug 18 04:28:27 PM PDT 24 33276116 ps
T883 /workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_bit_bash.1489144844 Aug 18 04:27:35 PM PDT 24 Aug 18 04:27:52 PM PDT 24 771927733 ps
T123 /workspace/coverage/cover_reg_top/6.lc_ctrl_tl_intg_err.2924690350 Aug 18 04:27:54 PM PDT 24 Aug 18 04:27:56 PM PDT 24 77921521 ps
T124 /workspace/coverage/cover_reg_top/16.lc_ctrl_tl_errors.3041224653 Aug 18 04:28:21 PM PDT 24 Aug 18 04:28:24 PM PDT 24 311712741 ps
T884 /workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_alert_test.2714490810 Aug 18 04:28:06 PM PDT 24 Aug 18 04:28:08 PM PDT 24 202791856 ps
T133 /workspace/coverage/cover_reg_top/18.lc_ctrl_tl_errors.1609355233 Aug 18 04:28:08 PM PDT 24 Aug 18 04:28:14 PM PDT 24 1899810578 ps
T205 /workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_same_csr_outstanding.906046011 Aug 18 04:27:43 PM PDT 24 Aug 18 04:27:44 PM PDT 24 99106333 ps
T885 /workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_aliasing.1389557476 Aug 18 04:27:50 PM PDT 24 Aug 18 04:27:58 PM PDT 24 298863042 ps
T886 /workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_alert_test.1825559160 Aug 18 04:27:33 PM PDT 24 Aug 18 04:27:35 PM PDT 24 72126140 ps
T206 /workspace/coverage/cover_reg_top/6.lc_ctrl_same_csr_outstanding.2490545789 Aug 18 04:27:56 PM PDT 24 Aug 18 04:27:57 PM PDT 24 120191328 ps
T130 /workspace/coverage/cover_reg_top/2.lc_ctrl_tl_intg_err.2135182140 Aug 18 04:27:32 PM PDT 24 Aug 18 04:27:36 PM PDT 24 136240989 ps
T887 /workspace/coverage/cover_reg_top/1.lc_ctrl_csr_bit_bash.3314862720 Aug 18 04:27:44 PM PDT 24 Aug 18 04:27:46 PM PDT 24 150253129 ps
T207 /workspace/coverage/cover_reg_top/15.lc_ctrl_same_csr_outstanding.3533328559 Aug 18 04:28:17 PM PDT 24 Aug 18 04:28:18 PM PDT 24 22354567 ps
T888 /workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.3301925413 Aug 18 04:27:47 PM PDT 24 Aug 18 04:27:49 PM PDT 24 475240592 ps
T889 /workspace/coverage/cover_reg_top/7.lc_ctrl_csr_mem_rw_with_rand_reset.2222747760 Aug 18 04:27:55 PM PDT 24 Aug 18 04:27:56 PM PDT 24 20523967 ps
T208 /workspace/coverage/cover_reg_top/11.lc_ctrl_same_csr_outstanding.1155157126 Aug 18 04:28:08 PM PDT 24 Aug 18 04:28:09 PM PDT 24 55298532 ps
T134 /workspace/coverage/cover_reg_top/15.lc_ctrl_tl_errors.1938391375 Aug 18 04:27:54 PM PDT 24 Aug 18 04:28:00 PM PDT 24 612803807 ps
T127 /workspace/coverage/cover_reg_top/3.lc_ctrl_csr_mem_rw_with_rand_reset.2058678568 Aug 18 04:28:06 PM PDT 24 Aug 18 04:28:08 PM PDT 24 23549911 ps
T209 /workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_same_csr_outstanding.1647925553 Aug 18 04:27:28 PM PDT 24 Aug 18 04:27:29 PM PDT 24 67490240 ps
T890 /workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_aliasing.1190654651 Aug 18 04:27:33 PM PDT 24 Aug 18 04:27:40 PM PDT 24 1228985216 ps
T210 /workspace/coverage/cover_reg_top/1.lc_ctrl_same_csr_outstanding.3116428982 Aug 18 04:27:46 PM PDT 24 Aug 18 04:27:47 PM PDT 24 19775773 ps
T144 /workspace/coverage/cover_reg_top/1.lc_ctrl_tl_intg_err.2477456335 Aug 18 04:27:48 PM PDT 24 Aug 18 04:27:51 PM PDT 24 213274803 ps
T141 /workspace/coverage/cover_reg_top/19.lc_ctrl_tl_intg_err.1731478774 Aug 18 04:28:00 PM PDT 24 Aug 18 04:28:02 PM PDT 24 147220468 ps
T891 /workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_csr_hw_reset.3852935417 Aug 18 04:28:03 PM PDT 24 Aug 18 04:28:05 PM PDT 24 102862121 ps
T192 /workspace/coverage/cover_reg_top/2.lc_ctrl_csr_hw_reset.1679199770 Aug 18 04:28:05 PM PDT 24 Aug 18 04:28:06 PM PDT 24 26025965 ps
T211 /workspace/coverage/cover_reg_top/2.lc_ctrl_same_csr_outstanding.3755046513 Aug 18 04:27:36 PM PDT 24 Aug 18 04:27:37 PM PDT 24 14466873 ps
T193 /workspace/coverage/cover_reg_top/19.lc_ctrl_csr_rw.4290517150 Aug 18 04:28:10 PM PDT 24 Aug 18 04:28:11 PM PDT 24 15551781 ps
T892 /workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_bit_bash.275408335 Aug 18 04:27:33 PM PDT 24 Aug 18 04:27:45 PM PDT 24 1049311794 ps
T893 /workspace/coverage/cover_reg_top/1.lc_ctrl_csr_rw.3341674089 Aug 18 04:27:50 PM PDT 24 Aug 18 04:27:51 PM PDT 24 35496885 ps
T151 /workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.2863228872 Aug 18 04:27:52 PM PDT 24 Aug 18 04:27:55 PM PDT 24 502505282 ps
T894 /workspace/coverage/cover_reg_top/4.lc_ctrl_same_csr_outstanding.629262590 Aug 18 04:27:43 PM PDT 24 Aug 18 04:27:44 PM PDT 24 36037299 ps
T895 /workspace/coverage/cover_reg_top/12.lc_ctrl_tl_errors.1434446746 Aug 18 04:27:53 PM PDT 24 Aug 18 04:27:55 PM PDT 24 32545331 ps
T896 /workspace/coverage/cover_reg_top/9.lc_ctrl_csr_rw.2657001699 Aug 18 04:28:05 PM PDT 24 Aug 18 04:28:06 PM PDT 24 28687648 ps
T897 /workspace/coverage/cover_reg_top/10.lc_ctrl_same_csr_outstanding.977823283 Aug 18 04:27:50 PM PDT 24 Aug 18 04:27:51 PM PDT 24 20684954 ps
T194 /workspace/coverage/cover_reg_top/2.lc_ctrl_csr_rw.3730752411 Aug 18 04:28:07 PM PDT 24 Aug 18 04:28:08 PM PDT 24 19775181 ps
T898 /workspace/coverage/cover_reg_top/10.lc_ctrl_tl_errors.1675782632 Aug 18 04:28:02 PM PDT 24 Aug 18 04:28:05 PM PDT 24 96862476 ps
T899 /workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.1257513034 Aug 18 04:27:55 PM PDT 24 Aug 18 04:27:59 PM PDT 24 300966243 ps
T900 /workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_csr_bit_bash.215931840 Aug 18 04:27:39 PM PDT 24 Aug 18 04:27:48 PM PDT 24 7953038602 ps
T901 /workspace/coverage/cover_reg_top/6.lc_ctrl_tl_errors.3665514519 Aug 18 04:27:32 PM PDT 24 Aug 18 04:27:37 PM PDT 24 417906138 ps
T902 /workspace/coverage/cover_reg_top/7.lc_ctrl_tl_errors.1312754862 Aug 18 04:28:06 PM PDT 24 Aug 18 04:28:08 PM PDT 24 49922065 ps
T903 /workspace/coverage/cover_reg_top/9.lc_ctrl_csr_mem_rw_with_rand_reset.1894775107 Aug 18 04:27:53 PM PDT 24 Aug 18 04:27:55 PM PDT 24 25305075 ps
T904 /workspace/coverage/cover_reg_top/0.lc_ctrl_same_csr_outstanding.513144925 Aug 18 04:27:37 PM PDT 24 Aug 18 04:27:39 PM PDT 24 21253836 ps
T905 /workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_same_csr_outstanding.3641281096 Aug 18 04:27:56 PM PDT 24 Aug 18 04:27:58 PM PDT 24 41282784 ps
T217 /workspace/coverage/cover_reg_top/3.lc_ctrl_tl_intg_err.472133829 Aug 18 04:27:31 PM PDT 24 Aug 18 04:27:34 PM PDT 24 156924627 ps
T906 /workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_same_csr_outstanding.1027624655 Aug 18 04:27:48 PM PDT 24 Aug 18 04:27:49 PM PDT 24 30174676 ps
T907 /workspace/coverage/cover_reg_top/4.lc_ctrl_csr_aliasing.3550870365 Aug 18 04:27:32 PM PDT 24 Aug 18 04:27:33 PM PDT 24 39341867 ps
T152 /workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.122599587 Aug 18 04:27:54 PM PDT 24 Aug 18 04:27:58 PM PDT 24 500763814 ps
T908 /workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_alert_test.3929155810 Aug 18 04:27:29 PM PDT 24 Aug 18 04:27:30 PM PDT 24 64773190 ps
T909 /workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_same_csr_outstanding.3628699066 Aug 18 04:27:32 PM PDT 24 Aug 18 04:27:34 PM PDT 24 115843657 ps
T910 /workspace/coverage/cover_reg_top/0.lc_ctrl_csr_mem_rw_with_rand_reset.981956305 Aug 18 04:27:32 PM PDT 24 Aug 18 04:27:33 PM PDT 24 66520994 ps
T911 /workspace/coverage/cover_reg_top/2.lc_ctrl_csr_mem_rw_with_rand_reset.2136677585 Aug 18 04:27:32 PM PDT 24 Aug 18 04:27:33 PM PDT 24 27888336 ps
T912 /workspace/coverage/cover_reg_top/18.lc_ctrl_csr_mem_rw_with_rand_reset.598747383 Aug 18 04:28:07 PM PDT 24 Aug 18 04:28:08 PM PDT 24 42902848 ps
T913 /workspace/coverage/cover_reg_top/4.lc_ctrl_csr_hw_reset.1025894232 Aug 18 04:27:32 PM PDT 24 Aug 18 04:27:33 PM PDT 24 14749189 ps
T914 /workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_bit_bash.3794063236 Aug 18 04:27:36 PM PDT 24 Aug 18 04:27:47 PM PDT 24 1397974676 ps
T915 /workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_same_csr_outstanding.2796380415 Aug 18 04:28:00 PM PDT 24 Aug 18 04:28:02 PM PDT 24 169257030 ps
T139 /workspace/coverage/cover_reg_top/15.lc_ctrl_tl_intg_err.4208100562 Aug 18 04:27:59 PM PDT 24 Aug 18 04:28:01 PM PDT 24 175691084 ps
T916 /workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_hw_reset.1909358584 Aug 18 04:27:52 PM PDT 24 Aug 18 04:27:54 PM PDT 24 734215115 ps
T917 /workspace/coverage/cover_reg_top/3.lc_ctrl_csr_aliasing.2979980843 Aug 18 04:27:56 PM PDT 24 Aug 18 04:27:58 PM PDT 24 26408361 ps
T918 /workspace/coverage/cover_reg_top/2.lc_ctrl_csr_bit_bash.3170068185 Aug 18 04:27:56 PM PDT 24 Aug 18 04:27:58 PM PDT 24 43681898 ps
T919 /workspace/coverage/cover_reg_top/8.lc_ctrl_csr_rw.326156979 Aug 18 04:28:09 PM PDT 24 Aug 18 04:28:11 PM PDT 24 16666047 ps
T920 /workspace/coverage/cover_reg_top/9.lc_ctrl_tl_errors.1309973872 Aug 18 04:28:02 PM PDT 24 Aug 18 04:28:07 PM PDT 24 234275406 ps
T921 /workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_bit_bash.2027208225 Aug 18 04:27:33 PM PDT 24 Aug 18 04:27:44 PM PDT 24 4550523118 ps
T922 /workspace/coverage/cover_reg_top/4.lc_ctrl_tl_errors.260008338 Aug 18 04:27:36 PM PDT 24 Aug 18 04:27:39 PM PDT 24 456924567 ps
T923 /workspace/coverage/cover_reg_top/5.lc_ctrl_tl_errors.906607075 Aug 18 04:27:32 PM PDT 24 Aug 18 04:27:35 PM PDT 24 109765378 ps
T924 /workspace/coverage/cover_reg_top/16.lc_ctrl_same_csr_outstanding.1418334430 Aug 18 04:28:08 PM PDT 24 Aug 18 04:28:10 PM PDT 24 49364434 ps
T925 /workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_aliasing.2459650865 Aug 18 04:27:32 PM PDT 24 Aug 18 04:27:38 PM PDT 24 3285616196 ps
T926 /workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_csr_aliasing.836484083 Aug 18 04:27:54 PM PDT 24 Aug 18 04:28:01 PM PDT 24 1316884707 ps
T927 /workspace/coverage/cover_reg_top/19.lc_ctrl_same_csr_outstanding.2798499739 Aug 18 04:28:07 PM PDT 24 Aug 18 04:28:08 PM PDT 24 186767740 ps
T142 /workspace/coverage/cover_reg_top/11.lc_ctrl_tl_intg_err.3443866442 Aug 18 04:28:03 PM PDT 24 Aug 18 04:28:06 PM PDT 24 120058337 ps
T928 /workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_aliasing.3392542861 Aug 18 04:27:28 PM PDT 24 Aug 18 04:27:33 PM PDT 24 3360199972 ps
T929 /workspace/coverage/cover_reg_top/3.lc_ctrl_tl_errors.1837635405 Aug 18 04:27:55 PM PDT 24 Aug 18 04:27:57 PM PDT 24 232808619 ps
T131 /workspace/coverage/cover_reg_top/14.lc_ctrl_tl_intg_err.142184704 Aug 18 04:27:49 PM PDT 24 Aug 18 04:27:53 PM PDT 24 76084489 ps
T930 /workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_hw_reset.1924965862 Aug 18 04:27:49 PM PDT 24 Aug 18 04:27:51 PM PDT 24 56097235 ps
T931 /workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_aliasing.1197008225 Aug 18 04:28:03 PM PDT 24 Aug 18 04:28:13 PM PDT 24 1083712713 ps
T932 /workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_hw_reset.818047970 Aug 18 04:28:08 PM PDT 24 Aug 18 04:28:09 PM PDT 24 251670013 ps
T933 /workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_aliasing.1481767670 Aug 18 04:27:25 PM PDT 24 Aug 18 04:27:41 PM PDT 24 2987122540 ps
T934 /workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_same_csr_outstanding.2122960200 Aug 18 04:28:05 PM PDT 24 Aug 18 04:28:06 PM PDT 24 19639827 ps
T935 /workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_bit_bash.225568388 Aug 18 04:27:32 PM PDT 24 Aug 18 04:27:53 PM PDT 24 9137332780 ps
T936 /workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_alert_test.1267407396 Aug 18 04:28:04 PM PDT 24 Aug 18 04:28:05 PM PDT 24 534295825 ps
T195 /workspace/coverage/cover_reg_top/3.lc_ctrl_csr_rw.272951889 Aug 18 04:27:50 PM PDT 24 Aug 18 04:27:51 PM PDT 24 108681083 ps
T132 /workspace/coverage/cover_reg_top/0.lc_ctrl_tl_intg_err.2200625051 Aug 18 04:27:53 PM PDT 24 Aug 18 04:27:55 PM PDT 24 185135908 ps
T937 /workspace/coverage/cover_reg_top/14.lc_ctrl_same_csr_outstanding.2294426393 Aug 18 04:28:00 PM PDT 24 Aug 18 04:28:01 PM PDT 24 150777897 ps
T938 /workspace/coverage/cover_reg_top/3.lc_ctrl_csr_bit_bash.1834139601 Aug 18 04:27:44 PM PDT 24 Aug 18 04:27:45 PM PDT 24 52437962 ps
T196 /workspace/coverage/cover_reg_top/15.lc_ctrl_csr_rw.1002269901 Aug 18 04:28:03 PM PDT 24 Aug 18 04:28:04 PM PDT 24 14159628 ps
T939 /workspace/coverage/cover_reg_top/18.lc_ctrl_same_csr_outstanding.1548073397 Aug 18 04:28:11 PM PDT 24 Aug 18 04:28:13 PM PDT 24 49400120 ps
T940 /workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.2667401390 Aug 18 04:27:32 PM PDT 24 Aug 18 04:27:35 PM PDT 24 112669064 ps
T197 /workspace/coverage/cover_reg_top/6.lc_ctrl_csr_rw.1180701192 Aug 18 04:27:59 PM PDT 24 Aug 18 04:28:00 PM PDT 24 42425380 ps
T941 /workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_alert_test.1197040641 Aug 18 04:27:44 PM PDT 24 Aug 18 04:27:46 PM PDT 24 253841426 ps
T942 /workspace/coverage/cover_reg_top/1.lc_ctrl_tl_errors.1670138075 Aug 18 04:27:34 PM PDT 24 Aug 18 04:27:36 PM PDT 24 25653670 ps
T943 /workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_alert_test.440627921 Aug 18 04:27:32 PM PDT 24 Aug 18 04:27:35 PM PDT 24 610908087 ps
T135 /workspace/coverage/cover_reg_top/16.lc_ctrl_tl_intg_err.924255343 Aug 18 04:28:10 PM PDT 24 Aug 18 04:28:14 PM PDT 24 228555711 ps
T944 /workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_hw_reset.3219789782 Aug 18 04:27:49 PM PDT 24 Aug 18 04:27:52 PM PDT 24 600928159 ps
T138 /workspace/coverage/cover_reg_top/17.lc_ctrl_tl_intg_err.1350818752 Aug 18 04:28:11 PM PDT 24 Aug 18 04:28:13 PM PDT 24 165839368 ps
T945 /workspace/coverage/cover_reg_top/10.lc_ctrl_csr_rw.1000610361 Aug 18 04:28:03 PM PDT 24 Aug 18 04:28:04 PM PDT 24 40571774 ps
T946 /workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_alert_test.1563926354 Aug 18 04:27:31 PM PDT 24 Aug 18 04:27:33 PM PDT 24 108820865 ps
T947 /workspace/coverage/cover_reg_top/1.lc_ctrl_csr_mem_rw_with_rand_reset.1065875540 Aug 18 04:27:31 PM PDT 24 Aug 18 04:27:32 PM PDT 24 29261529 ps
T948 /workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_hw_reset.736418489 Aug 18 04:27:30 PM PDT 24 Aug 18 04:27:33 PM PDT 24 618859270 ps
T949 /workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_same_csr_outstanding.2735496057 Aug 18 04:27:47 PM PDT 24 Aug 18 04:27:53 PM PDT 24 30768741 ps
T950 /workspace/coverage/cover_reg_top/7.lc_ctrl_same_csr_outstanding.1240665340 Aug 18 04:28:04 PM PDT 24 Aug 18 04:28:05 PM PDT 24 47822487 ps
T198 /workspace/coverage/cover_reg_top/4.lc_ctrl_csr_rw.2025525872 Aug 18 04:28:00 PM PDT 24 Aug 18 04:28:01 PM PDT 24 43626659 ps
T951 /workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.3791017510 Aug 18 04:27:31 PM PDT 24 Aug 18 04:27:36 PM PDT 24 146621285 ps
T952 /workspace/coverage/cover_reg_top/4.lc_ctrl_csr_mem_rw_with_rand_reset.2395927762 Aug 18 04:27:43 PM PDT 24 Aug 18 04:27:44 PM PDT 24 25468708 ps
T199 /workspace/coverage/cover_reg_top/17.lc_ctrl_csr_rw.2916748057 Aug 18 04:28:05 PM PDT 24 Aug 18 04:28:06 PM PDT 24 19468149 ps
T200 /workspace/coverage/cover_reg_top/0.lc_ctrl_csr_rw.4240514705 Aug 18 04:27:57 PM PDT 24 Aug 18 04:27:59 PM PDT 24 139863702 ps
T953 /workspace/coverage/cover_reg_top/6.lc_ctrl_csr_mem_rw_with_rand_reset.4183364395 Aug 18 04:27:58 PM PDT 24 Aug 18 04:28:00 PM PDT 24 344450209 ps
T954 /workspace/coverage/cover_reg_top/2.lc_ctrl_tl_errors.82481686 Aug 18 04:27:33 PM PDT 24 Aug 18 04:27:36 PM PDT 24 173507285 ps
T955 /workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_rw.1358032266 Aug 18 04:27:51 PM PDT 24 Aug 18 04:27:53 PM PDT 24 61284460 ps
T956 /workspace/coverage/cover_reg_top/17.lc_ctrl_tl_errors.1154169376 Aug 18 04:28:05 PM PDT 24 Aug 18 04:28:09 PM PDT 24 329055097 ps
T957 /workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_hw_reset.1789355709 Aug 18 04:27:21 PM PDT 24 Aug 18 04:27:23 PM PDT 24 55289097 ps
T958 /workspace/coverage/cover_reg_top/3.lc_ctrl_same_csr_outstanding.4060008385 Aug 18 04:27:41 PM PDT 24 Aug 18 04:27:42 PM PDT 24 22273836 ps
T959 /workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_rw.552607424 Aug 18 04:27:53 PM PDT 24 Aug 18 04:27:55 PM PDT 24 128157121 ps
T960 /workspace/coverage/cover_reg_top/4.lc_ctrl_csr_bit_bash.3150620883 Aug 18 04:27:31 PM PDT 24 Aug 18 04:27:32 PM PDT 24 19210653 ps
T961 /workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_same_csr_outstanding.1595973935 Aug 18 04:28:10 PM PDT 24 Aug 18 04:28:11 PM PDT 24 50318672 ps
T962 /workspace/coverage/cover_reg_top/1.lc_ctrl_csr_hw_reset.1875089548 Aug 18 04:27:29 PM PDT 24 Aug 18 04:27:31 PM PDT 24 22271844 ps
T963 /workspace/coverage/cover_reg_top/11.lc_ctrl_csr_mem_rw_with_rand_reset.484509639 Aug 18 04:27:55 PM PDT 24 Aug 18 04:27:56 PM PDT 24 20017422 ps
T964 /workspace/coverage/cover_reg_top/5.lc_ctrl_csr_mem_rw_with_rand_reset.3660775440 Aug 18 04:27:42 PM PDT 24 Aug 18 04:27:43 PM PDT 24 282305804 ps
T965 /workspace/coverage/cover_reg_top/8.lc_ctrl_csr_mem_rw_with_rand_reset.4217936321 Aug 18 04:27:55 PM PDT 24 Aug 18 04:27:56 PM PDT 24 74517022 ps
T145 /workspace/coverage/cover_reg_top/7.lc_ctrl_tl_intg_err.3576108439 Aug 18 04:27:49 PM PDT 24 Aug 18 04:27:51 PM PDT 24 155886655 ps
T201 /workspace/coverage/cover_reg_top/0.lc_ctrl_csr_aliasing.3293467834 Aug 18 04:27:43 PM PDT 24 Aug 18 04:27:45 PM PDT 24 97484035 ps
T966 /workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.3990864921 Aug 18 04:27:48 PM PDT 24 Aug 18 04:27:56 PM PDT 24 616287014 ps
T967 /workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_aliasing.2328281672 Aug 18 04:27:56 PM PDT 24 Aug 18 04:28:05 PM PDT 24 1813576124 ps
T968 /workspace/coverage/cover_reg_top/9.lc_ctrl_same_csr_outstanding.1338253678 Aug 18 04:28:03 PM PDT 24 Aug 18 04:28:05 PM PDT 24 24739256 ps
T143 /workspace/coverage/cover_reg_top/5.lc_ctrl_tl_intg_err.3330176787 Aug 18 04:27:42 PM PDT 24 Aug 18 04:27:45 PM PDT 24 98629906 ps
T969 /workspace/coverage/cover_reg_top/13.lc_ctrl_csr_rw.1730721856 Aug 18 04:28:02 PM PDT 24 Aug 18 04:28:03 PM PDT 24 43764558 ps
T970 /workspace/coverage/cover_reg_top/12.lc_ctrl_csr_mem_rw_with_rand_reset.2956090931 Aug 18 04:27:59 PM PDT 24 Aug 18 04:28:00 PM PDT 24 64806844 ps
T148 /workspace/coverage/cover_reg_top/18.lc_ctrl_tl_intg_err.2519494601 Aug 18 04:28:04 PM PDT 24 Aug 18 04:28:06 PM PDT 24 311729092 ps
T971 /workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_hw_reset.3557477237 Aug 18 04:27:45 PM PDT 24 Aug 18 04:27:47 PM PDT 24 142759263 ps
T972 /workspace/coverage/cover_reg_top/17.lc_ctrl_same_csr_outstanding.1572983907 Aug 18 04:28:03 PM PDT 24 Aug 18 04:28:05 PM PDT 24 119156311 ps
T973 /workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_bit_bash.26813922 Aug 18 04:28:00 PM PDT 24 Aug 18 04:28:12 PM PDT 24 1513533820 ps
T974 /workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_same_csr_outstanding.19958424 Aug 18 04:28:01 PM PDT 24 Aug 18 04:28:03 PM PDT 24 39763450 ps
T975 /workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_rw.3423408921 Aug 18 04:28:00 PM PDT 24 Aug 18 04:28:01 PM PDT 24 127638953 ps
T976 /workspace/coverage/cover_reg_top/14.lc_ctrl_tl_errors.1477376758 Aug 18 04:28:02 PM PDT 24 Aug 18 04:28:05 PM PDT 24 127976063 ps
T977 /workspace/coverage/cover_reg_top/3.lc_ctrl_csr_hw_reset.2714373942 Aug 18 04:28:06 PM PDT 24 Aug 18 04:28:08 PM PDT 24 68829671 ps
T978 /workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_bit_bash.2223223095 Aug 18 04:28:03 PM PDT 24 Aug 18 04:28:27 PM PDT 24 2238059337 ps
T979 /workspace/coverage/cover_reg_top/16.lc_ctrl_csr_rw.1659431840 Aug 18 04:28:08 PM PDT 24 Aug 18 04:28:09 PM PDT 24 42225559 ps
T980 /workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_hw_reset.3386205300 Aug 18 04:28:10 PM PDT 24 Aug 18 04:28:13 PM PDT 24 154987642 ps
T981 /workspace/coverage/cover_reg_top/5.lc_ctrl_csr_rw.3241034879 Aug 18 04:27:33 PM PDT 24 Aug 18 04:27:35 PM PDT 24 12884444 ps
T982 /workspace/coverage/cover_reg_top/1.lc_ctrl_csr_aliasing.3925087618 Aug 18 04:27:31 PM PDT 24 Aug 18 04:27:37 PM PDT 24 114131438 ps
T983 /workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_rw.3038672983 Aug 18 04:27:46 PM PDT 24 Aug 18 04:27:48 PM PDT 24 76557843 ps
T137 /workspace/coverage/cover_reg_top/4.lc_ctrl_tl_intg_err.323043049 Aug 18 04:27:35 PM PDT 24 Aug 18 04:27:38 PM PDT 24 522392874 ps
T984 /workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_csr_rw.2114862081 Aug 18 04:27:35 PM PDT 24 Aug 18 04:27:37 PM PDT 24 75758372 ps
T985 /workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_rw.4074753658 Aug 18 04:27:54 PM PDT 24 Aug 18 04:27:55 PM PDT 24 140152293 ps
T986 /workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.2531105041 Aug 18 04:27:51 PM PDT 24 Aug 18 04:27:54 PM PDT 24 267950309 ps
T987 /workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_bit_bash.1701844779 Aug 18 04:27:57 PM PDT 24 Aug 18 04:28:04 PM PDT 24 3064886099 ps
T988 /workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_rw.1412288736 Aug 18 04:27:53 PM PDT 24 Aug 18 04:27:55 PM PDT 24 814759780 ps
T989 /workspace/coverage/cover_reg_top/18.lc_ctrl_csr_rw.1903155082 Aug 18 04:27:58 PM PDT 24 Aug 18 04:27:59 PM PDT 24 56111164 ps
T990 /workspace/coverage/cover_reg_top/10.lc_ctrl_csr_mem_rw_with_rand_reset.3587727637 Aug 18 04:28:03 PM PDT 24 Aug 18 04:28:05 PM PDT 24 81509651 ps
T991 /workspace/coverage/cover_reg_top/7.lc_ctrl_csr_rw.681537451 Aug 18 04:27:51 PM PDT 24 Aug 18 04:27:52 PM PDT 24 41782016 ps
T992 /workspace/coverage/cover_reg_top/13.lc_ctrl_csr_mem_rw_with_rand_reset.3437465068 Aug 18 04:27:58 PM PDT 24 Aug 18 04:27:59 PM PDT 24 33801819 ps
T993 /workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_aliasing.635189606 Aug 18 04:28:04 PM PDT 24 Aug 18 04:28:28 PM PDT 24 1095767574 ps
T994 /workspace/coverage/cover_reg_top/0.lc_ctrl_tl_errors.531068159 Aug 18 04:27:52 PM PDT 24 Aug 18 04:27:54 PM PDT 24 28898257 ps
T995 /workspace/coverage/cover_reg_top/19.lc_ctrl_csr_mem_rw_with_rand_reset.287968635 Aug 18 04:28:10 PM PDT 24 Aug 18 04:28:12 PM PDT 24 59925702 ps
T996 /workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_hw_reset.1080500489 Aug 18 04:27:54 PM PDT 24 Aug 18 04:27:55 PM PDT 24 46244931 ps
T997 /workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.2033773420 Aug 18 04:27:33 PM PDT 24 Aug 18 04:27:38 PM PDT 24 106352353 ps
T998 /workspace/coverage/cover_reg_top/0.lc_ctrl_csr_bit_bash.3312210642 Aug 18 04:27:32 PM PDT 24 Aug 18 04:27:34 PM PDT 24 92323232 ps
T202 /workspace/coverage/cover_reg_top/0.lc_ctrl_csr_hw_reset.4086873150 Aug 18 04:27:43 PM PDT 24 Aug 18 04:27:44 PM PDT 24 80478277 ps
T146 /workspace/coverage/cover_reg_top/10.lc_ctrl_tl_intg_err.3365717164 Aug 18 04:28:07 PM PDT 24 Aug 18 04:28:09 PM PDT 24 53935016 ps
T999 /workspace/coverage/cover_reg_top/11.lc_ctrl_csr_rw.2604836733 Aug 18 04:28:03 PM PDT 24 Aug 18 04:28:05 PM PDT 24 14813162 ps
T1000 /workspace/coverage/cover_reg_top/5.lc_ctrl_same_csr_outstanding.1709686755 Aug 18 04:28:09 PM PDT 24 Aug 18 04:28:11 PM PDT 24 24730386 ps
T1001 /workspace/coverage/cover_reg_top/19.lc_ctrl_tl_errors.3132723614 Aug 18 04:28:05 PM PDT 24 Aug 18 04:28:08 PM PDT 24 171499405 ps
T1002 /workspace/coverage/cover_reg_top/8.lc_ctrl_tl_errors.4276775819 Aug 18 04:27:52 PM PDT 24 Aug 18 04:27:55 PM PDT 24 57537541 ps
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