LINE 1839 EXPRESSION (addr_hit[34] & reg_re & ((!reg_error))) ------1----- ---2-- -------3------
-1- | -2- | -3- | Status | Tests |
---|---|---|---|---|
0 | 1 | 1 | Covered | T21,T108,T109 |
1 | 0 | 1 | Covered | T108,T109,T114 |
1 | 1 | 0 | Not Covered | |
1 | 1 | 1 | Covered | T2,T3,T8 |
LINE 1840 EXPRESSION (addr_hit[35] & reg_re & ((!reg_error))) ------1----- ---2-- -------3------
-1- | -2- | -3- | Status | Tests |
---|---|---|---|---|
0 | 1 | 1 | Covered | T21,T108,T109 |
1 | 0 | 1 | Covered | T108,T109,T114 |
1 | 1 | 0 | Not Covered | |
1 | 1 | 1 | Covered | T2,T3,T8 |
0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |