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Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 9 1 10.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
others[0] 0 1 1
others[1] 0 1 1
others[2] 0 1 1
others[3] 0 1 1
others[4] 0 1 1
others[5] 0 1 1
others[6] 0 1 1
others[7] 0 1 1
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
false 14159 1 T1 14 T2 4 T3 107


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 9 1 10.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
others[0] 0 1 1
others[1] 0 1 1
others[2] 0 1 1
others[3] 0 1 1
others[4] 0 1 1
others[5] 0 1 1
others[6] 0 1 1
others[7] 0 1 1
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
false 14159 1 T1 14 T2 4 T3 107


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 8 2 20.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
others[0] 0 1 1
others[1] 0 1 1
others[2] 0 1 1
others[3] 0 1 1
others[4] 0 1 1
others[5] 0 1 1
others[6] 0 1 1
others[7] 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
false 10082 1 T1 9 T2 1 T3 74
true 16512 1 T1 14 T2 4 T3 111


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 8 2 20.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
others[0] 0 1 1
others[1] 0 1 1
others[2] 0 1 1
others[3] 0 1 1
others[4] 0 1 1
others[5] 0 1 1
others[6] 0 1 1
others[7] 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
false 11002 1 T1 11 T2 1 T3 85
true 16558 1 T1 14 T2 4 T3 111


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 108 1 T6 6 T100 2 T210 2
others[1] 78 1 T6 2 T99 2 T207 2
others[2] 102 1 T3 2 T99 2 T102 2
others[3] 92 1 T3 2 T103 2 T105 2
others[4] 78 1 T6 2 T102 2 T103 2
others[5] 92 1 T94 2 T102 2 T103 2
others[6] 98 1 T3 2 T6 2 T105 2
others[7] 94 1 T1 2 T3 2 T6 2
false 14159 1 T1 14 T2 4 T3 107


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 104 1 T99 2 T103 4 T104 2
others[1] 96 1 T3 2 T105 2 T210 2
others[2] 94 1 T6 4 T103 2 T378 2
others[3] 76 1 T102 2 T236 4 T124 2
others[4] 76 1 T6 2 T102 4 T115 2
others[5] 88 1 T3 2 T100 2 T71 2
others[6] 94 1 T6 2 T50 2 T236 2
others[7] 92 1 T3 2 T50 2 T209 2
false 14159 1 T1 14 T2 4 T3 107


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 92 1 T1 2 T6 6 T209 2
others[1] 88 1 T6 2 T99 2 T100 2
others[2] 86 1 T6 4 T50 2 T379 2
others[3] 114 1 T6 2 T98 2 T42 2
others[4] 84 1 T98 2 T100 2 T94 2
others[5] 84 1 T6 4 T98 2 T42 2
others[6] 104 1 T6 2 T101 2 T42 2
others[7] 98 1 T6 2 T101 2 T236 2
false 14159 1 T1 14 T2 4 T3 107


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 52 1 T100 2 T380 2 T236 2
others[1] 84 1 T3 4 T6 4 T97 2
others[2] 46 1 T6 2 T381 2 T281 4
others[3] 54 1 T6 2 T101 4 T98 2
others[4] 66 1 T3 2 T154 2 T236 2
others[5] 74 1 T6 2 T97 2 T42 2
others[6] 40 1 T378 2 T382 2 T260 2
others[7] 76 1 T99 2 T100 2 T144 2
false 14159 1 T1 14 T2 4 T3 107


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 110 1 T6 2 T42 2 T236 4
others[1] 82 1 T6 2 T94 4 T383 2
others[2] 94 1 T3 2 T42 2 T103 2
others[3] 82 1 T3 2 T379 2 T210 2
others[4] 92 1 T100 2 T102 4 T103 4
others[5] 88 1 T6 4 T209 2 T144 6
others[6] 112 1 T6 2 T71 2 T379 2
others[7] 104 1 T3 2 T6 2 T69 2
false 14159 1 T1 14 T2 4 T3 107


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 46 1 T3 2 T208 2 T236 4
others[1] 36 1 T6 2 T236 2 T384 2
others[2] 30 1 T236 4 T385 2 T386 2
others[3] 40 1 T1 2 T236 2 T387 4
others[4] 30 1 T64 2 T236 4 T388 2
others[5] 32 1 T1 2 T103 2 T208 2
others[6] 42 1 T103 2 T210 2 T115 2
others[7] 46 1 T3 2 T103 6 T236 2
false 14159 1 T1 14 T2 4 T3 107


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 82 1 T97 2 T71 2 T102 2
others[1] 78 1 T3 2 T100 2 T90 2
others[2] 90 1 T1 2 T3 8 T6 2
others[3] 80 1 T97 2 T42 2 T94 2
others[4] 108 1 T3 4 T6 4 T98 4
others[5] 96 1 T1 2 T6 2 T99 2
others[6] 70 1 T102 2 T104 2 T378 2
others[7] 120 1 T6 2 T256 2 T236 4
false 14159 1 T1 14 T2 4 T3 107


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 86 1 T3 2 T6 4 T103 2
others[1] 102 1 T6 2 T100 2 T42 2
others[2] 76 1 T99 2 T94 2 T103 2
others[3] 76 1 T1 2 T6 6 T102 2
others[4] 82 1 T3 2 T6 4 T94 2
others[5] 96 1 T94 2 T207 2 T389 2
others[6] 92 1 T6 6 T97 2 T103 2
others[7] 112 1 T6 4 T380 2 T236 2
false 14159 1 T1 14 T2 4 T3 107


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 98 1 T6 6 T103 2 T104 2
others[1] 78 1 T6 4 T100 2 T103 2
others[2] 100 1 T1 2 T6 8 T100 2
others[3] 84 1 T6 2 T256 2 T236 2
others[4] 118 1 T98 2 T42 2 T71 2
others[5] 84 1 T6 2 T64 2 T274 2
others[6] 100 1 T58 2 T42 2 T71 2
others[7] 98 1 T6 2 T103 2 T256 2
false 14159 1 T1 14 T2 4 T3 107


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 114 1 T6 2 T103 2 T50 2
others[1] 102 1 T103 2 T209 2 T210 2
others[2] 110 1 T6 4 T58 2 T100 2
others[3] 104 1 T1 2 T3 2 T6 2
others[4] 106 1 T3 2 T6 2 T98 2
others[5] 116 1 T6 2 T97 2 T98 2
others[6] 100 1 T100 2 T94 2 T104 2
others[7] 114 1 T3 2 T6 2 T102 2
false 14159 1 T1 14 T2 4 T3 107


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 106 1 T3 2 T6 2 T103 2
others[1] 102 1 T6 2 T71 2 T103 2
others[2] 94 1 T3 2 T103 2 T105 2
others[3] 88 1 T6 2 T103 2 T104 2
others[4] 68 1 T3 2 T6 2 T378 2
others[5] 70 1 T103 2 T210 2 T384 2
others[6] 78 1 T1 2 T3 4 T6 2
others[7] 124 1 T1 2 T6 4 T97 2
false 14159 1 T1 14 T2 4 T3 107


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 29 1 T257 1 T390 2 T182 2
others[1] 24 1 T13 1 T18 1 T280 2
others[2] 25 1 T144 2 T257 1 T279 1
others[3] 28 1 T33 1 T257 2 T391 2
others[4] 27 1 T7 1 T58 2 T144 2
others[5] 15 1 T279 1 T331 1 T282 1
others[6] 22 1 T14 1 T17 1 T331 1
others[7] 25 1 T3 2 T33 1 T257 2
false 14159 1 T1 14 T2 4 T3 107
true 2269 1 T1 2 T3 24 T5 1


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 21 1 T257 1 T148 1 T391 2
others[1] 26 1 T7 1 T144 2 T257 2
others[2] 30 1 T58 2 T257 1 T392 2
others[3] 24 1 T144 2 T257 1 T279 1
others[4] 18 1 T14 1 T33 1 T331 1
others[5] 18 1 T33 1 T280 1 T282 2
others[6] 30 1 T3 2 T17 1 T257 1
others[7] 28 1 T13 1 T331 1 T148 1
false 11478 1 T1 12 T2 2 T3 89
true 18795 1 T1 16 T2 5 T3 135


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 98 1 T6 2 T102 2 T50 2
others[1] 84 1 T6 4 T34 2 T236 4
others[2] 94 1 T3 2 T99 2 T236 4
others[3] 96 1 T3 2 T6 2 T97 2
others[4] 82 1 T6 4 T105 2 T210 2
others[5] 84 1 T3 4 T102 2 T103 4
others[6] 80 1 T6 2 T100 2 T94 2
others[7] 124 1 T1 2 T103 2 T207 2
false 7687 1 T1 1 T2 2 T3 38
true 16626 1 T1 14 T2 5 T3 109


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 86 1 T34 2 T378 2 T393 2
others[1] 80 1 T3 4 T50 2 T105 2
others[2] 96 1 T6 2 T102 2 T236 2
others[3] 90 1 T6 2 T71 2 T103 4
others[4] 88 1 T100 2 T104 2 T210 2
others[5] 100 1 T99 2 T102 2 T103 2
others[6] 86 1 T6 2 T102 2 T103 2
others[7] 94 1 T3 2 T6 2 T103 2
false 6709 1 T1 1 T2 1 T3 41
true 16382 1 T1 14 T2 4 T3 109


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 94 1 T6 4 T42 2 T207 2
others[1] 106 1 T6 6 T101 2 T103 2
others[2] 98 1 T1 2 T98 2 T94 2
others[3] 86 1 T6 2 T103 2 T378 2
others[4] 88 1 T100 4 T103 2 T154 4
others[5] 64 1 T6 4 T98 2 T99 2
others[6] 86 1 T6 2 T378 2 T236 2
others[7] 128 1 T6 4 T101 2 T98 2
false 7251 1 T1 3 T2 1 T3 43
true 16397 1 T1 14 T2 4 T3 109


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 24 1 T33 1 T247 3 T257 1
others[1] 29 1 T236 2 T331 1 T280 1
others[2] 22 1 T7 2 T379 2 T247 2
others[3] 17 1 T161 2 T279 1 T148 1
others[4] 39 1 T6 2 T13 1 T236 2
others[5] 26 1 T7 1 T33 1 T280 1
others[6] 15 1 T33 2 T280 1 T19 1
others[7] 30 1 T33 1 T257 1 T18 1
false 11419 1 T1 12 T2 1 T3 89
true 18697 1 T1 17 T2 4 T3 137


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 50 1 T3 2 T6 2 T100 2
others[1] 60 1 T6 2 T97 2 T99 2
others[2] 64 1 T6 2 T97 2 T236 2
others[3] 66 1 T3 2 T6 2 T100 2
others[4] 66 1 T6 2 T100 4 T236 2
others[5] 64 1 T3 2 T101 2 T42 2
others[6] 78 1 T98 2 T100 2 T103 2
others[7] 44 1 T101 2 T104 2 T314 2
false 8873 1 T1 12 T2 1 T3 55
true 16609 1 T1 14 T2 4 T3 109


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 19 1 T14 2 T257 1 T18 1
others[1] 33 1 T7 1 T14 1 T17 2
others[2] 36 1 T13 1 T105 2 T257 1
others[3] 30 1 T6 2 T7 1 T139 1
others[4] 20 1 T279 1 T331 1 T283 1
others[5] 15 1 T7 1 T257 1 T279 1
others[6] 23 1 T33 2 T279 1 T18 2
others[7] 30 1 T209 2 T247 1 T280 1
false 11362 1 T1 12 T2 1 T3 89
true 18685 1 T1 16 T2 4 T3 134


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 114 1 T6 4 T103 2 T208 2
others[1] 76 1 T6 2 T103 2 T210 2
others[2] 82 1 T3 2 T42 2 T209 4
others[3] 80 1 T42 2 T69 2 T209 2
others[4] 84 1 T3 2 T103 2 T394 2
others[5] 112 1 T3 2 T6 2 T102 2
others[6] 96 1 T6 2 T102 2 T379 2
others[7] 120 1 T6 2 T100 2 T94 4
false 7661 1 T1 1 T2 1 T3 39
true 16549 1 T1 14 T2 4 T3 109


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 26 1 T144 2 T280 2 T337 2
others[1] 40 1 T209 2 T236 2 T247 1
others[2] 23 1 T247 1 T279 2 T18 1
others[3] 24 1 T7 1 T64 2 T247 1
others[4] 21 1 T161 2 T247 1 T331 1
others[5] 30 1 T7 2 T18 2 T280 1
others[6] 20 1 T13 1 T33 1 T257 1
others[7] 26 1 T13 1 T17 1 T156 1
false 11314 1 T1 12 T2 1 T3 89
true 18693 1 T1 17 T2 4 T3 134


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 42 1 T1 4 T103 2 T236 4
others[1] 40 1 T103 2 T210 2 T328 2
others[2] 34 1 T3 2 T64 2 T103 4
others[3] 24 1 T336 2 T385 2 T182 4
others[4] 24 1 T384 2 T336 2 T395 2
others[5] 46 1 T103 2 T236 2 T336 2
others[6] 54 1 T6 2 T208 4 T209 2
others[7] 38 1 T3 2 T115 2 T336 2
false 9836 1 T1 1 T2 1 T3 69
true 16578 1 T1 14 T2 4 T3 111


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 96 1 T3 2 T6 2 T97 2
others[1] 100 1 T1 2 T3 2 T6 2
others[2] 92 1 T3 2 T236 6 T314 4
others[3] 86 1 T3 4 T100 2 T103 2
others[4] 58 1 T97 2 T98 2 T42 2
others[5] 104 1 T1 2 T98 2 T104 2
others[6] 88 1 T6 4 T94 2 T103 2
others[7] 100 1 T3 4 T6 2 T102 2
false 6918 1 T1 1 T2 1 T3 32
true 16389 1 T1 14 T2 4 T3 109


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 112 1 T6 2 T42 2 T94 2
others[1] 68 1 T1 2 T6 2 T396 2
others[2] 66 1 T3 2 T6 6 T94 2
others[3] 94 1 T6 2 T94 2 T103 2
others[4] 98 1 T6 6 T100 2 T50 2
others[5] 94 1 T6 2 T97 2 T102 2
others[6] 94 1 T6 4 T103 2 T207 2
others[7] 96 1 T3 2 T6 2 T99 2
false 6918 1 T1 1 T2 1 T3 32
true 16389 1 T1 14 T2 4 T3 109


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 84 1 T6 6 T42 2 T71 2
others[1] 114 1 T6 6 T100 2 T103 2
others[2] 104 1 T103 2 T104 4 T274 2
others[3] 104 1 T1 2 T6 2 T71 2
others[4] 96 1 T6 4 T98 2 T103 4
others[5] 70 1 T64 2 T103 4 T397 2
others[6] 94 1 T6 2 T42 2 T256 2
others[7] 94 1 T6 4 T58 2 T100 2
false 6250 1 T1 4 T2 1 T3 36
true 16375 1 T1 14 T2 4 T3 109


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 90 1 T3 2 T6 2 T98 2
others[1] 102 1 T104 2 T389 2 T236 2
others[2] 118 1 T6 2 T97 2 T100 2
others[3] 124 1 T1 2 T3 2 T58 2
others[4] 100 1 T6 4 T103 2 T208 2
others[5] 102 1 T3 2 T6 2 T100 2
others[6] 94 1 T103 2 T209 2 T236 6
others[7] 136 1 T6 4 T98 2 T99 2
false 6250 1 T1 4 T2 1 T3 36
true 16375 1 T1 14 T2 4 T3 109


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 58 1 T236 2 T397 2 T144 2
others[1] 60 1 T6 2 T101 2 T100 2
others[2] 68 1 T1 2 T6 10 T379 2
others[3] 72 1 T64 2 T98 2 T94 2
others[4] 70 1 T94 2 T236 4 T393 4
others[5] 66 1 T3 2 T6 6 T236 2
others[6] 66 1 T6 2 T100 2 T236 4
others[7] 92 1 T102 2 T236 2 T384 2
false 6721 1 T1 3 T2 1 T3 37
true 17670 1 T1 16 T2 4 T3 120


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 88 1 T3 2 T6 2 T94 2
others[1] 54 1 T3 2 T101 2 T388 2
others[2] 60 1 T256 2 T154 2 T393 2
others[3] 60 1 T101 2 T42 2 T34 2
others[4] 86 1 T3 2 T100 2 T393 2
others[5] 72 1 T3 2 T58 2 T94 2
others[6] 62 1 T103 2 T236 2 T144 2
others[7] 78 1 T3 2 T6 4 T209 2
false 6721 1 T1 3 T2 1 T3 37
true 17670 1 T1 16 T2 4 T3 120


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 22 1 T279 1 T280 1 T398 2
others[1] 18 1 T257 1 T279 1 T280 1
others[2] 26 1 T7 1 T379 2 T247 1
others[3] 28 1 T7 1 T33 2 T257 1
others[4] 27 1 T33 1 T384 2 T247 1
others[5] 17 1 T257 1 T331 1 T18 1
others[6] 17 1 T33 1 T257 1 T399 2
others[7] 25 1 T13 2 T280 1 T148 1
false 11555 1 T1 12 T2 2 T3 89
true 18826 1 T1 16 T2 5 T3 134


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 86 1 T104 2 T379 2 T378 2
others[1] 88 1 T1 2 T3 2 T6 2
others[2] 90 1 T103 2 T208 2 T154 2
others[3] 50 1 T3 2 T6 2 T71 2
others[4] 110 1 T6 4 T99 2 T103 6
others[5] 76 1 T1 2 T3 4 T50 2
others[6] 98 1 T6 2 T98 2 T379 2
others[7] 132 1 T3 2 T6 4 T98 2
false 7664 1 T1 3 T2 2 T3 41
true 16569 1 T1 14 T2 5 T3 110


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 11 1 T7 1 T247 1 T257 1
others[1] 29 1 T33 1 T279 2 T18 1
others[2] 33 1 T33 1 T236 4 T247 1
others[3] 22 1 T7 1 T379 2 T247 1
others[4] 27 1 T161 2 T33 1 T331 1
others[5] 24 1 T33 1 T337 2 T284 1
others[6] 28 1 T6 2 T7 1 T33 1
others[7] 28 1 T13 1 T247 1 T257 1
false 14159 1 T1 14 T2 4 T3 107
true 2223 1 T1 3 T3 26 T47 1

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%