Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

2 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64
tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	9055793	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

12432447

1

T1

2657

T2

421

T3

481

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	9212522	1			T1	6810		T2	801		T3	843
values[0x0]	4491016	1			T1	423		T2	72		T3	66
values[0x1]	7784702	1			T1	402		T2	79		T3	62

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	5182141	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

16306099

1

T1

3868

T2

540

T3

583

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	76550	1			T1	30		T2	2		T4	24
valid_sources[0x01]	76801	1			T1	34		T2	4		T4	4
valid_sources[0x02]	77457	1			T1	22		T2	4		T4	23
valid_sources[0x03]	83271	1			T1	32		T2	2		T4	17
valid_sources[0x04]	77552	1			T1	40		T2	6		T4	17
valid_sources[0x05]	87991	1			T1	25		T2	7		T4	11
valid_sources[0x06]	88190	1			T1	16		T2	1		T4	19
valid_sources[0x07]	79086	1			T1	24		T2	2		T4	15
valid_sources[0x08]	82063	1			T1	26		T2	1		T4	17
valid_sources[0x09]	77469	1			T1	29		T2	4		T4	5
valid_sources[0x0a]	80487	1			T1	28		T2	3		T4	25
valid_sources[0x0b]	80040	1			T1	30		T4	16		T9	4
valid_sources[0x0c]	76908	1			T1	26		T2	2		T4	13
valid_sources[0x0d]	77079	1			T1	35		T2	5		T4	24
valid_sources[0x0e]	103621	1			T1	29		T2	3		T4	15
valid_sources[0x0f]	81330	1			T1	27		T2	2		T4	24
valid_sources[0x10]	75088	1			T1	23		T2	3		T4	13
valid_sources[0x11]	77504	1			T1	31		T2	5		T4	17
valid_sources[0x12]	78400	1			T1	25		T2	2		T4	16
valid_sources[0x13]	81352	1			T1	31		T2	1		T4	21
valid_sources[0x14]	79220	1			T1	34		T2	2		T4	15
valid_sources[0x15]	77565	1			T1	31		T2	6		T4	16
valid_sources[0x16]	79500	1			T1	19		T2	9		T4	23
valid_sources[0x17]	79153	1			T1	24		T2	9		T4	18
valid_sources[0x18]	89172	1			T1	21		T2	6		T4	27
valid_sources[0x19]	96330	1			T1	28		T2	4		T4	19
valid_sources[0x1a]	88661	1			T1	19		T4	18		T9	8
valid_sources[0x1b]	87852	1			T1	33		T2	1		T4	13
valid_sources[0x1c]	82389	1			T1	23		T2	3		T4	21
valid_sources[0x1d]	77883	1			T1	33		T2	1		T4	14
valid_sources[0x1e]	82623	1			T1	25		T4	14		T9	2
valid_sources[0x1f]	78138	1			T1	28		T2	1		T4	22
valid_sources[0x20]	79725	1			T1	27		T2	6		T4	34
valid_sources[0x21]	78522	1			T1	32		T2	2		T4	22
valid_sources[0x22]	84846	1			T1	33		T2	4		T4	8
valid_sources[0x23]	75977	1			T1	34		T2	2		T4	19
valid_sources[0x24]	79454	1			T1	31		T2	13		T4	17
valid_sources[0x25]	75089	1			T1	39		T2	5		T4	25
valid_sources[0x26]	78319	1			T1	32		T2	2		T4	13
valid_sources[0x27]	78801	1			T1	35		T2	5		T4	16
valid_sources[0x28]	78732	1			T1	29		T2	2		T4	24
valid_sources[0x29]	98228	1			T1	31		T2	3		T4	27
valid_sources[0x2a]	91185	1			T1	37		T2	1		T4	25
valid_sources[0x2b]	77776	1			T1	18		T2	4		T4	19
valid_sources[0x2c]	78882	1			T1	23		T2	3		T4	18
valid_sources[0x2d]	80826	1			T1	25		T2	4		T4	14
valid_sources[0x2e]	98266	1			T1	40		T2	1		T4	27
valid_sources[0x2f]	82083	1			T1	29		T2	2		T4	17
valid_sources[0x30]	80223	1			T1	26		T2	4		T3	971
valid_sources[0x31]	79538	1			T1	30		T2	4		T4	15
valid_sources[0x32]	81873	1			T1	35		T2	1		T4	13
valid_sources[0x33]	79007	1			T1	28		T4	13		T9	1
valid_sources[0x34]	86768	1			T1	43		T2	2		T4	14
valid_sources[0x35]	85616	1			T1	35		T2	2		T4	19
valid_sources[0x36]	76927	1			T1	20		T2	5		T4	13
valid_sources[0x37]	86298	1			T1	36		T2	7		T4	30
valid_sources[0x38]	86260	1			T1	27		T2	2		T4	16
valid_sources[0x39]	81797	1			T1	26		T4	13		T9	2
valid_sources[0x3a]	74649	1			T1	32		T2	5		T4	27
valid_sources[0x3b]	79761	1			T1	37		T2	3		T4	19
valid_sources[0x3c]	79408	1			T1	32		T2	2		T4	27
valid_sources[0x3d]	82186	1			T1	24		T4	17		T9	2
valid_sources[0x3e]	85597	1			T1	18		T2	3		T4	19
valid_sources[0x3f]	78519	1			T1	34		T2	1		T4	19
valid_sources[0x40]	88191	1			T1	28		T4	20		T9	1
valid_sources[0x41]	80257	1			T1	24		T2	4		T4	15
valid_sources[0x42]	90537	1			T1	34		T2	4		T4	17
valid_sources[0x43]	75105	1			T1	32		T2	4		T4	12
valid_sources[0x44]	90035	1			T1	45		T2	2		T4	20
valid_sources[0x45]	76624	1			T1	32		T2	9		T4	13
valid_sources[0x46]	84644	1			T1	31		T2	5		T4	20
valid_sources[0x47]	78206	1			T1	38		T2	1		T4	16
valid_sources[0x48]	79237	1			T1	40		T4	11		T9	4
valid_sources[0x49]	81659	1			T1	30		T2	5		T4	18
valid_sources[0x4a]	79751	1			T1	23		T2	1		T4	19
valid_sources[0x4b]	80283	1			T1	28		T2	2		T4	14
valid_sources[0x4c]	84765	1			T1	28		T2	4		T4	21
valid_sources[0x4d]	86228	1			T1	16		T2	5		T4	17
valid_sources[0x4e]	78004	1			T1	20		T4	10		T9	3
valid_sources[0x4f]	89404	1			T1	28		T2	4		T4	15
valid_sources[0x50]	78504	1			T1	27		T4	18		T9	4
valid_sources[0x51]	84292	1			T1	25		T2	6		T4	22
valid_sources[0x52]	80497	1			T1	22		T2	6		T4	22
valid_sources[0x53]	82731	1			T1	26		T2	3		T4	8
valid_sources[0x54]	80655	1			T1	26		T2	3		T4	36
valid_sources[0x55]	89169	1			T1	31		T2	2		T4	19
valid_sources[0x56]	84023	1			T1	21		T2	8		T4	8
valid_sources[0x57]	79827	1			T1	38		T2	5		T4	17
valid_sources[0x58]	83097	1			T1	28		T2	1		T4	14
valid_sources[0x59]	78461	1			T1	29		T2	3		T4	22
valid_sources[0x5a]	82872	1			T1	26		T2	5		T4	31
valid_sources[0x5b]	78428	1			T1	39		T2	2		T4	23
valid_sources[0x5c]	83224	1			T1	19		T2	1		T4	14
valid_sources[0x5d]	79694	1			T1	30		T2	1		T4	20
valid_sources[0x5e]	79733	1			T1	34		T2	2		T4	18
valid_sources[0x5f]	78474	1			T1	31		T2	4		T4	23
valid_sources[0x60]	78127	1			T1	35		T2	3		T4	10
valid_sources[0x61]	85525	1			T1	38		T2	2		T4	18
valid_sources[0x62]	75834	1			T1	22		T2	2		T4	16
valid_sources[0x63]	89869	1			T1	36		T2	7		T4	26
valid_sources[0x64]	86124	1			T1	35		T2	2		T4	24
valid_sources[0x65]	80793	1			T1	25		T2	1		T4	4
valid_sources[0x66]	80250	1			T1	28		T2	4		T4	15
valid_sources[0x67]	87023	1			T1	24		T2	2		T4	15
valid_sources[0x68]	99251	1			T1	28		T4	16		T9	3
valid_sources[0x69]	152499	1			T1	41		T2	2		T4	11
valid_sources[0x6a]	80404	1			T1	35		T2	3		T4	14
valid_sources[0x6b]	129019	1			T1	30		T2	8		T4	14
valid_sources[0x6c]	83851	1			T1	29		T2	6		T4	17
valid_sources[0x6d]	79071	1			T1	37		T2	6		T4	17
valid_sources[0x6e]	78077	1			T1	36		T2	13		T4	22
valid_sources[0x6f]	104492	1			T1	29		T2	1		T4	18
valid_sources[0x70]	86295	1			T1	37		T2	9		T4	10
valid_sources[0x71]	82360	1			T1	21		T2	5		T4	21
valid_sources[0x72]	80501	1			T1	24		T2	5		T4	16
valid_sources[0x73]	82237	1			T1	37		T2	1		T4	14
valid_sources[0x74]	77812	1			T1	21		T2	1		T4	27
valid_sources[0x75]	80631	1			T1	29		T2	3		T4	7
valid_sources[0x76]	80368	1			T1	24		T2	5		T4	23
valid_sources[0x77]	78236	1			T1	30		T2	8		T4	15
valid_sources[0x78]	85670	1			T1	27		T2	2		T4	12
valid_sources[0x79]	82054	1			T1	40		T2	1		T4	15
valid_sources[0x7a]	84515	1			T1	20		T2	3		T4	25
valid_sources[0x7b]	85419	1			T1	36		T2	1		T4	18
valid_sources[0x7c]	79190	1			T1	29		T2	1		T4	16
valid_sources[0x7d]	79421	1			T1	28		T2	7		T4	16
valid_sources[0x7e]	80003	1			T1	28		T2	3		T4	16
valid_sources[0x7f]	99557	1			T1	23		T2	7		T4	12
valid_sources[0x80]	82436	1			T1	31		T2	1		T4	14

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

4611633

1

T1

2295

T2

350

T3

421

values[0x0]

all_enables

biggest_size

3946825

1

T1

213

T2

44

T3

36

values[0x1]

all_enables

biggest_size

3873989

1

T1

149

T2

27

T3

24

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	543000	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

19944311

1

T1

180

T2

220

T3

100

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	5034086	1			T1	90		T2	110		T3	50
values[0x0]	7494172	1			T1	47		T2	51		T3	27
values[0x1]	7959053	1			T1	43		T2	59		T3	23

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	188797	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

20298514

1

T1

180

T2

220

T3

100

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	82284	1			T2	3		T12	4		T13	1
valid_sources[0x01]	76165	1			T2	4		T5	1		T63	1
valid_sources[0x02]	81768	1			T11	1		T12	1		T5	1
valid_sources[0x03]	77423	1			T63	1		T143	1		T145	2
valid_sources[0x04]	77917	1			T3	2		T11	1		T5	2
valid_sources[0x05]	81323	1			T3	3		T13	1		T31	1
valid_sources[0x06]	75716	1			T13	2		T143	1		T145	3
valid_sources[0x07]	79387	1			T12	1		T5	1		T13	1
valid_sources[0x08]	82400	1			T5	1		T63	1		T145	1
valid_sources[0x09]	78300	1			T3	2		T13	1		T63	1
valid_sources[0x0a]	84403	1			T12	1		T5	1		T13	1
valid_sources[0x0b]	77394	1			T2	8		T3	1		T11	1
valid_sources[0x0c]	81407	1			T3	1		T11	1		T12	1
valid_sources[0x0d]	80185	1			T1	7		T3	1		T4	100
valid_sources[0x0e]	81018	1			T3	1		T13	2		T63	1
valid_sources[0x0f]	77402	1			T2	6		T5	1		T63	1
valid_sources[0x10]	78582	1			T11	1		T5	2		T63	1
valid_sources[0x11]	74272	1			T12	1		T13	4		T31	1
valid_sources[0x12]	78681	1			T1	1		T3	1		T12	1
valid_sources[0x13]	76498	1			T1	1		T5	2		T13	1
valid_sources[0x14]	81593	1			T12	1		T13	1		T52	1
valid_sources[0x15]	81592	1			T3	1		T11	1		T5	1
valid_sources[0x16]	78568	1			T2	2		T3	1		T63	2
valid_sources[0x17]	80981	1			T3	1		T11	1		T5	2
valid_sources[0x18]	80784	1			T5	1		T62	3		T97	1
valid_sources[0x19]	76291	1			T11	1		T5	1		T13	1
valid_sources[0x1a]	79416	1			T2	2		T13	1		T143	1
valid_sources[0x1b]	80944	1			T1	11		T12	1		T5	1
valid_sources[0x1c]	78203	1			T3	1		T62	1		T239	2
valid_sources[0x1d]	77726	1			T2	1		T13	2		T145	7
valid_sources[0x1e]	80463	1			T3	2		T63	1		T31	2
valid_sources[0x1f]	78252	1			T31	2		T62	2		T97	4
valid_sources[0x20]	75682	1			T3	2		T11	1		T12	2
valid_sources[0x21]	79322	1			T3	1		T5	1		T143	1
valid_sources[0x22]	83545	1			T3	1		T62	1		T7	1048
valid_sources[0x23]	79507	1			T11	1		T5	1		T31	1
valid_sources[0x24]	81383	1			T11	1		T12	1		T13	1
valid_sources[0x25]	80725	1			T2	4		T13	1		T63	1
valid_sources[0x26]	83212	1			T3	1		T12	1		T5	2
valid_sources[0x27]	81847	1			T1	2		T11	1		T12	2
valid_sources[0x28]	82113	1			T2	1		T11	1		T12	1
valid_sources[0x29]	74617	1			T12	1		T63	2		T52	3
valid_sources[0x2a]	79029	1			T1	5		T2	5		T12	1
valid_sources[0x2b]	84972	1			T2	2		T3	2		T5	1
valid_sources[0x2c]	81838	1			T3	1		T5	1		T52	7
valid_sources[0x2d]	79101	1			T2	1		T3	1		T12	1
valid_sources[0x2e]	80136	1			T13	1		T107	45		T31	1
valid_sources[0x2f]	81555	1			T3	1		T13	2		T106	1
valid_sources[0x30]	84807	1			T5	1		T145	2		T62	2
valid_sources[0x31]	82586	1			T3	1		T5	2		T63	1
valid_sources[0x32]	83223	1			T1	8		T2	7		T12	1
valid_sources[0x33]	81830	1			T12	2		T143	1		T52	6
valid_sources[0x34]	80324	1			T2	3		T5	2		T63	2
valid_sources[0x35]	81029	1			T2	3		T3	2		T11	1
valid_sources[0x36]	76793	1			T2	2		T5	2		T13	1
valid_sources[0x37]	82198	1			T12	3		T5	1		T63	1
valid_sources[0x38]	79126	1			T5	1		T63	1		T143	1
valid_sources[0x39]	77452	1			T11	2		T5	2		T62	1
valid_sources[0x3a]	81845	1			T11	1		T143	1		T62	5
valid_sources[0x3b]	78982	1			T13	1		T109	1		T62	1
valid_sources[0x3c]	79099	1			T5	1		T63	1		T143	2
valid_sources[0x3d]	76729	1			T12	2		T109	1		T143	1
valid_sources[0x3e]	77899	1			T3	1		T52	11		T97	1
valid_sources[0x3f]	82170	1			T3	1		T62	1		T7	2174
valid_sources[0x40]	78622	1			T3	1		T5	2		T63	1
valid_sources[0x41]	80960	1			T1	2		T12	1		T5	1
valid_sources[0x42]	77464	1			T2	2		T12	1		T143	1
valid_sources[0x43]	82150	1			T3	1		T11	1		T13	1
valid_sources[0x44]	79907	1			T2	1		T12	1		T5	1
valid_sources[0x45]	83038	1			T12	2		T5	1		T63	1
valid_sources[0x46]	79499	1			T106	1		T145	3		T62	6
valid_sources[0x47]	85672	1			T2	1		T13	2		T63	1
valid_sources[0x48]	78244	1			T11	1		T5	1		T13	2
valid_sources[0x49]	78196	1			T5	1		T143	1		T62	1
valid_sources[0x4a]	79548	1			T3	1		T5	1		T52	3
valid_sources[0x4b]	83210	1			T1	1		T12	2		T13	4
valid_sources[0x4c]	83529	1			T3	1		T12	1		T5	3
valid_sources[0x4d]	82254	1			T1	5		T2	2		T62	4
valid_sources[0x4e]	81130	1			T2	11		T11	2		T5	1
valid_sources[0x4f]	82022	1			T1	6		T63	1		T143	1
valid_sources[0x50]	79632	1			T109	1		T62	1		T239	1
valid_sources[0x51]	78925	1			T2	3		T3	1		T5	1
valid_sources[0x52]	80429	1			T2	3		T13	1		T109	1
valid_sources[0x53]	80717	1			T3	1		T63	2		T143	2
valid_sources[0x54]	79604	1			T1	6		T2	1		T3	1
valid_sources[0x55]	83370	1			T12	1		T13	1		T62	1
valid_sources[0x56]	82934	1			T2	2		T11	2		T143	1
valid_sources[0x57]	83575	1			T3	1		T12	2		T5	1
valid_sources[0x58]	78652	1			T1	1		T2	7		T13	3
valid_sources[0x59]	77952	1			T3	1		T5	1		T13	1
valid_sources[0x5a]	76771	1			T2	4		T3	1		T13	1
valid_sources[0x5b]	77675	1			T63	1		T109	1		T62	1
valid_sources[0x5c]	79400	1			T2	4		T5	2		T52	2
valid_sources[0x5d]	80517	1			T11	1		T143	1		T62	2
valid_sources[0x5e]	81006	1			T2	4		T3	1		T5	1
valid_sources[0x5f]	83572	1			T1	4		T13	1		T145	5
valid_sources[0x60]	76845	1			T11	1		T5	1		T31	1
valid_sources[0x61]	80764	1			T1	17		T2	6		T13	1
valid_sources[0x62]	80051	1			T109	1		T143	2		T6	1
valid_sources[0x63]	82247	1			T12	1		T5	2		T63	1
valid_sources[0x64]	76183	1			T5	1		T13	2		T105	100
valid_sources[0x65]	77413	1			T5	2		T13	1		T52	7
valid_sources[0x66]	82617	1			T3	2		T12	2		T13	1
valid_sources[0x67]	72255	1			T12	1		T5	2		T13	1
valid_sources[0x68]	80464	1			T5	1		T13	2		T143	1
valid_sources[0x69]	83248	1			T2	11		T5	1		T13	1
valid_sources[0x6a]	80525	1			T11	1		T63	1		T143	1
valid_sources[0x6b]	79740	1			T63	1		T143	1		T31	3
valid_sources[0x6c]	80355	1			T2	13		T5	2		T63	1
valid_sources[0x6d]	78960	1			T2	4		T11	1		T12	1
valid_sources[0x6e]	76864	1			T63	1		T62	2		T180	2
valid_sources[0x6f]	80625	1			T2	1		T12	1		T5	1
valid_sources[0x70]	84306	1			T1	5		T13	1		T63	1
valid_sources[0x71]	80390	1			T11	1		T12	1		T5	2
valid_sources[0x72]	79862	1			T1	9		T12	1		T13	1
valid_sources[0x73]	82304	1			T3	1		T12	4		T145	3
valid_sources[0x74]	86184	1			T1	2		T106	2		T31	1
valid_sources[0x75]	83519	1			T3	1		T13	1		T63	1
valid_sources[0x76]	77398	1			T12	1		T63	2		T143	5
valid_sources[0x77]	78774	1			T3	1		T11	1		T143	2
valid_sources[0x78]	78902	1			T13	3		T143	1		T31	1
valid_sources[0x79]	82462	1			T143	1		T145	5		T6	1
valid_sources[0x7a]	77908	1			T5	1		T63	1		T31	2
valid_sources[0x7b]	78471	1			T102	7		T143	3		T62	1
valid_sources[0x7c]	77507	1			T63	1		T109	1		T31	2
valid_sources[0x7d]	75593	1			T5	2		T13	1		T31	1
valid_sources[0x7e]	78478	1			T2	3		T31	1		T62	2
valid_sources[0x7f]	85027	1			T3	1		T5	1		T31	1
valid_sources[0x80]	77771	1			T2	2		T63	2		T109	1

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

5021359

1

T1

90

T2

110

T3

50

values[0x0]

all_enables

biggest_size

7456603

1

T1

47

T2

51

T3

27

values[0x1]

all_enables

biggest_size

7466349

1

T1

43

T2

59

T3

23