Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

2 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64
tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	7147300	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

7199626

1

T1

210

T2

216

T3

2374

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	8278710	1			T1	420		T2	670		T3	4428
values[0x0]	2298954	1			T1	152		T2	146		T3	244
values[0x1]	3769262	1			T1	127		T2	138		T3	241

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	4627233	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

9719693

1

T1

329

T2

408

T3

2906

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	59298	1			T3	14		T4	311		T10	51
valid_sources[0x01]	52781	1			T1	2		T2	3		T3	17
valid_sources[0x02]	57638	1			T1	3		T2	9		T3	24
valid_sources[0x03]	51211	1			T1	1		T2	3		T3	21
valid_sources[0x04]	64156	1			T1	4		T2	5		T3	19
valid_sources[0x05]	60307	1			T1	2		T2	3		T3	13
valid_sources[0x06]	52913	1			T1	2		T2	6		T3	16
valid_sources[0x07]	49731	1			T1	5		T2	3		T3	18
valid_sources[0x08]	51305	1			T1	7		T2	4		T3	19
valid_sources[0x09]	51477	1			T1	3		T2	4		T3	27
valid_sources[0x0a]	48980	1			T1	3		T2	4		T3	21
valid_sources[0x0b]	52311	1			T1	1		T2	2		T3	18
valid_sources[0x0c]	47481	1			T1	3		T3	14		T9	8
valid_sources[0x0d]	50002	1			T1	3		T2	7		T3	19
valid_sources[0x0e]	92137	1			T1	2		T2	4		T3	28
valid_sources[0x0f]	49109	1			T1	2		T2	8		T3	18
valid_sources[0x10]	53169	1			T1	1		T2	4		T3	17
valid_sources[0x11]	46086	1			T1	1		T2	2		T3	11
valid_sources[0x12]	79786	1			T2	1		T3	26		T4	158
valid_sources[0x13]	48861	1			T1	2		T2	5		T3	21
valid_sources[0x14]	51587	1			T1	6		T2	4		T3	10
valid_sources[0x15]	50268	1			T1	4		T2	5		T3	22
valid_sources[0x16]	49719	1			T1	3		T2	3		T3	15
valid_sources[0x17]	50367	1			T1	4		T2	2		T3	24
valid_sources[0x18]	54037	1			T1	5		T2	2		T3	9
valid_sources[0x19]	49709	1			T1	1		T2	3		T3	14
valid_sources[0x1a]	51348	1			T1	1		T3	11		T4	139
valid_sources[0x1b]	59069	1			T1	1		T2	5		T3	29
valid_sources[0x1c]	54401	1			T1	6		T3	11		T9	2
valid_sources[0x1d]	50848	1			T1	2		T2	5		T3	28
valid_sources[0x1e]	56169	1			T1	1		T2	2		T3	17
valid_sources[0x1f]	54177	1			T1	6		T2	5		T3	30
valid_sources[0x20]	60207	1			T1	3		T2	3		T3	16
valid_sources[0x21]	53634	1			T1	1		T2	5		T3	19
valid_sources[0x22]	55479	1			T1	3		T2	2		T3	15
valid_sources[0x23]	53767	1			T1	2		T2	1		T3	18
valid_sources[0x24]	48946	1			T1	4		T2	4		T3	19
valid_sources[0x25]	50829	1			T1	1		T2	3		T3	26
valid_sources[0x26]	47135	1			T1	3		T3	16		T4	214
valid_sources[0x27]	56490	1			T1	1		T2	2		T3	27
valid_sources[0x28]	52562	1			T1	4		T2	7		T3	10
valid_sources[0x29]	53200	1			T1	6		T2	4		T3	21
valid_sources[0x2a]	66017	1			T1	3		T2	5		T3	31
valid_sources[0x2b]	52461	1			T1	3		T2	11		T3	17
valid_sources[0x2c]	49818	1			T1	2		T2	2		T3	23
valid_sources[0x2d]	51473	1			T1	3		T2	5		T3	21
valid_sources[0x2e]	66911	1			T2	3		T3	17		T4	95
valid_sources[0x2f]	52517	1			T3	20		T4	1544		T10	26
valid_sources[0x30]	51454	1			T1	1		T2	4		T3	15
valid_sources[0x31]	54144	1			T1	3		T2	2		T3	22
valid_sources[0x32]	70439	1			T1	6		T2	3		T3	26
valid_sources[0x33]	59502	1			T1	3		T2	2		T3	24
valid_sources[0x34]	50580	1			T1	1		T2	3		T3	25
valid_sources[0x35]	55417	1			T1	4		T2	4		T3	9
valid_sources[0x36]	64921	1			T1	2		T3	27		T9	2
valid_sources[0x37]	56980	1			T1	1		T2	5		T3	14
valid_sources[0x38]	51592	1			T1	1		T2	2		T3	19
valid_sources[0x39]	49994	1			T1	5		T2	2		T3	20
valid_sources[0x3a]	93596	1			T2	5		T3	24		T4	518
valid_sources[0x3b]	57613	1			T1	1		T2	2		T3	15
valid_sources[0x3c]	46726	1			T1	5		T2	4		T3	17
valid_sources[0x3d]	52640	1			T1	3		T2	8		T3	21
valid_sources[0x3e]	48857	1			T1	2		T2	5		T3	20
valid_sources[0x3f]	52615	1			T1	3		T2	5		T3	22
valid_sources[0x40]	54557	1			T1	5		T2	6		T3	21
valid_sources[0x41]	70749	1			T1	2		T2	5		T3	15
valid_sources[0x42]	47077	1			T1	1		T2	8		T3	27
valid_sources[0x43]	51412	1			T1	2		T2	8		T3	18
valid_sources[0x44]	50656	1			T1	3		T2	2		T3	24
valid_sources[0x45]	57764	1			T1	3		T2	3		T3	18
valid_sources[0x46]	53946	1			T1	4		T2	3		T3	20
valid_sources[0x47]	49418	1			T1	2		T2	2		T3	31
valid_sources[0x48]	156061	1			T1	1		T2	1		T3	13
valid_sources[0x49]	52717	1			T1	2		T2	3		T3	26
valid_sources[0x4a]	53254	1			T1	1		T2	5		T3	13
valid_sources[0x4b]	50848	1			T1	2		T2	5		T3	13
valid_sources[0x4c]	49769	1			T1	6		T2	5		T3	25
valid_sources[0x4d]	51548	1			T1	6		T2	5		T3	22
valid_sources[0x4e]	49725	1			T1	1		T2	4		T3	21
valid_sources[0x4f]	52600	1			T1	3		T3	24		T4	355
valid_sources[0x50]	52782	1			T1	2		T2	10		T3	20
valid_sources[0x51]	47406	1			T1	5		T2	2		T3	15
valid_sources[0x52]	49572	1			T1	3		T2	3		T3	20
valid_sources[0x53]	55675	1			T1	3		T2	8		T3	21
valid_sources[0x54]	50124	1			T1	1		T2	3		T3	16
valid_sources[0x55]	49308	1			T1	5		T2	4		T3	16
valid_sources[0x56]	50313	1			T1	3		T2	3		T3	30
valid_sources[0x57]	55958	1			T1	1		T2	1		T3	17
valid_sources[0x58]	53732	1			T1	3		T3	18		T4	421
valid_sources[0x59]	55691	1			T1	3		T2	1		T3	15
valid_sources[0x5a]	57104	1			T1	2		T2	4		T3	13
valid_sources[0x5b]	52260	1			T1	3		T2	4		T3	15
valid_sources[0x5c]	49862	1			T1	4		T2	5		T3	15
valid_sources[0x5d]	50947	1			T1	3		T2	4		T3	9
valid_sources[0x5e]	50673	1			T1	3		T2	4		T3	25
valid_sources[0x5f]	49079	1			T1	3		T2	7		T3	33
valid_sources[0x60]	49402	1			T1	6		T2	4		T3	17
valid_sources[0x61]	49867	1			T1	1		T2	4		T3	27
valid_sources[0x62]	55986	1			T1	7		T2	3		T3	24
valid_sources[0x63]	52720	1			T1	1		T2	10		T3	18
valid_sources[0x64]	60345	1			T1	2		T3	21		T4	219
valid_sources[0x65]	49290	1			T1	1		T2	1		T3	14
valid_sources[0x66]	47818	1			T1	5		T2	3		T3	21
valid_sources[0x67]	52181	1			T1	5		T2	5		T3	13
valid_sources[0x68]	46093	1			T1	4		T2	5		T3	11
valid_sources[0x69]	49499	1			T1	4		T2	2		T3	24
valid_sources[0x6a]	57390	1			T1	2		T2	7		T3	23
valid_sources[0x6b]	48272	1			T2	1		T3	26		T4	494
valid_sources[0x6c]	50193	1			T1	3		T2	3		T3	18
valid_sources[0x6d]	51505	1			T1	2		T3	19		T9	2
valid_sources[0x6e]	57825	1			T1	2		T2	6		T3	20
valid_sources[0x6f]	53854	1			T2	2		T3	31		T4	235
valid_sources[0x70]	51676	1			T1	2		T2	4		T3	32
valid_sources[0x71]	50304	1			T1	2		T2	4		T3	31
valid_sources[0x72]	50882	1			T1	1		T2	2		T3	17
valid_sources[0x73]	55695	1			T1	1		T2	1		T3	28
valid_sources[0x74]	59095	1			T2	2		T3	14		T4	192
valid_sources[0x75]	53331	1			T1	1		T2	4		T3	15
valid_sources[0x76]	49332	1			T1	4		T2	4		T3	23
valid_sources[0x77]	47968	1			T1	3		T2	6		T3	8
valid_sources[0x78]	47377	1			T1	5		T2	1		T3	20
valid_sources[0x79]	58899	1			T1	4		T2	9		T3	18
valid_sources[0x7a]	58514	1			T1	1		T2	8		T3	13
valid_sources[0x7b]	46898	1			T1	2		T2	2		T3	24
valid_sources[0x7c]	50075	1			T1	5		T2	2		T3	13
valid_sources[0x7d]	54179	1			T1	1		T2	1		T3	32
valid_sources[0x7e]	57596	1			T1	2		T2	6		T3	15
valid_sources[0x7f]	59819	1			T1	4		T2	2		T3	16
valid_sources[0x80]	51409	1			T1	2		T2	1		T3	21

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

3469947

1

T1

105

T2

105

T3

2197

values[0x0]

all_enables

biggest_size

1902672

1

T1

63

T2

62

T3

103

values[0x1]

all_enables

biggest_size

1827007

1

T1

42

T2

49

T3

74

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	250707	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

8948300

1

T3

160

T4

87084

T5

120

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	2288815	1			T3	80		T4	21880		T5	60
values[0x0]	3353575	1			T3	38		T4	32593		T5	21
values[0x1]	3556617	1			T3	42		T4	35007		T5	39

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	90168	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

9108839

1

T3

160

T4

88639

T5

120

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	35282	1			T4	383		T5	1		T6	2
valid_sources[0x01]	36883	1			T4	304		T5	1		T7	618
valid_sources[0x02]	33853	1			T4	305		T6	3		T7	744
valid_sources[0x03]	36606	1			T4	378		T5	1		T7	708
valid_sources[0x04]	38401	1			T4	349		T10	2		T7	626
valid_sources[0x05]	34959	1			T4	336		T6	1		T10	6
valid_sources[0x06]	33529	1			T4	345		T5	1		T7	700
valid_sources[0x07]	34239	1			T4	362		T5	1		T7	802
valid_sources[0x08]	36203	1			T4	391		T7	778		T8	430
valid_sources[0x09]	35949	1			T4	339		T7	763		T112	1
valid_sources[0x0a]	36471	1			T4	305		T6	8		T10	5
valid_sources[0x0b]	35103	1			T4	316		T5	1		T7	535
valid_sources[0x0c]	36775	1			T4	304		T7	732		T8	400
valid_sources[0x0d]	36916	1			T4	336		T6	1		T10	2
valid_sources[0x0e]	36434	1			T4	360		T5	2		T6	2
valid_sources[0x0f]	34352	1			T4	419		T7	806		T8	441
valid_sources[0x10]	38289	1			T4	322		T5	2		T10	2
valid_sources[0x11]	35696	1			T4	396		T5	1		T11	1
valid_sources[0x12]	36698	1			T4	324		T5	1		T10	1
valid_sources[0x13]	35838	1			T4	330		T6	1		T12	1
valid_sources[0x14]	40704	1			T4	350		T7	625		T112	2
valid_sources[0x15]	36174	1			T4	347		T12	1		T7	832
valid_sources[0x16]	37469	1			T4	318		T11	1		T7	824
valid_sources[0x17]	34143	1			T4	418		T11	1		T12	1
valid_sources[0x18]	35683	1			T4	372		T6	1		T7	772
valid_sources[0x19]	36571	1			T4	369		T5	1		T7	803
valid_sources[0x1a]	35158	1			T4	343		T5	1		T10	1
valid_sources[0x1b]	35487	1			T4	327		T7	771		T112	1
valid_sources[0x1c]	35336	1			T4	272		T5	1		T6	2
valid_sources[0x1d]	34374	1			T4	338		T7	844		T8	466
valid_sources[0x1e]	33277	1			T4	377		T6	2		T11	2
valid_sources[0x1f]	36058	1			T4	449		T10	2		T11	1
valid_sources[0x20]	36856	1			T4	384		T6	4		T7	825
valid_sources[0x21]	38098	1			T4	330		T6	6		T7	798
valid_sources[0x22]	36571	1			T4	303		T7	738		T8	416
valid_sources[0x23]	32917	1			T4	296		T7	834		T118	1
valid_sources[0x24]	34432	1			T4	404		T7	734		T112	1
valid_sources[0x25]	38404	1			T4	333		T7	725		T140	2
valid_sources[0x26]	36076	1			T4	346		T11	2		T12	2
valid_sources[0x27]	33880	1			T4	327		T12	2		T7	844
valid_sources[0x28]	34502	1			T4	295		T12	1		T7	734
valid_sources[0x29]	38396	1			T4	411		T5	1		T7	783
valid_sources[0x2a]	37973	1			T4	286		T5	2		T6	1
valid_sources[0x2b]	37655	1			T4	343		T5	1		T6	3
valid_sources[0x2c]	36216	1			T4	306		T5	1		T7	657
valid_sources[0x2d]	35987	1			T4	363		T5	1		T6	1
valid_sources[0x2e]	37971	1			T4	381		T6	1		T11	1
valid_sources[0x2f]	35638	1			T4	376		T5	1		T10	5
valid_sources[0x30]	37078	1			T4	357		T7	793		T112	1
valid_sources[0x31]	36657	1			T4	402		T10	2		T7	822
valid_sources[0x32]	36545	1			T4	345		T12	1		T7	682
valid_sources[0x33]	37513	1			T4	318		T11	1		T7	663
valid_sources[0x34]	35642	1			T4	387		T5	1		T12	1
valid_sources[0x35]	38089	1			T4	449		T6	1		T10	2
valid_sources[0x36]	34404	1			T4	273		T5	1		T7	803
valid_sources[0x37]	36254	1			T4	324		T5	1		T7	695
valid_sources[0x38]	35194	1			T4	376		T11	5		T7	802
valid_sources[0x39]	37416	1			T4	350		T7	758		T33	2
valid_sources[0x3a]	36681	1			T4	376		T5	1		T10	1
valid_sources[0x3b]	36465	1			T4	293		T7	713		T112	1
valid_sources[0x3c]	36897	1			T4	437		T5	1		T6	2
valid_sources[0x3d]	37887	1			T4	393		T7	746		T33	2
valid_sources[0x3e]	37625	1			T4	424		T7	712		T112	1
valid_sources[0x3f]	36067	1			T4	388		T7	804		T112	2
valid_sources[0x40]	35928	1			T4	307		T7	862		T33	1
valid_sources[0x41]	35915	1			T4	325		T5	1		T7	757
valid_sources[0x42]	34005	1			T4	407		T12	1		T7	777
valid_sources[0x43]	35427	1			T4	327		T6	1		T7	781
valid_sources[0x44]	37832	1			T4	351		T7	704		T8	468
valid_sources[0x45]	36469	1			T4	351		T7	597		T8	450
valid_sources[0x46]	37141	1			T4	353		T5	1		T11	2
valid_sources[0x47]	33821	1			T4	408		T6	1		T7	759
valid_sources[0x48]	39456	1			T4	304		T7	806		T8	447
valid_sources[0x49]	31914	1			T4	301		T5	2		T10	1
valid_sources[0x4a]	35803	1			T4	409		T5	3		T7	610
valid_sources[0x4b]	36457	1			T4	335		T6	2		T12	1
valid_sources[0x4c]	34975	1			T4	342		T7	710		T112	1
valid_sources[0x4d]	35146	1			T4	325		T6	8		T7	672
valid_sources[0x4e]	33506	1			T4	424		T5	2		T7	789
valid_sources[0x4f]	38130	1			T4	332		T12	1		T7	841
valid_sources[0x50]	38622	1			T4	361		T12	1		T7	770
valid_sources[0x51]	37159	1			T4	296		T7	888		T8	443
valid_sources[0x52]	33500	1			T4	413		T12	3		T7	574
valid_sources[0x53]	35969	1			T4	365		T5	1		T10	1
valid_sources[0x54]	36574	1			T4	353		T11	6		T7	703
valid_sources[0x55]	37035	1			T4	411		T5	1		T7	843
valid_sources[0x56]	35301	1			T4	361		T6	3		T7	766
valid_sources[0x57]	32886	1			T4	398		T7	777		T8	449
valid_sources[0x58]	36992	1			T4	301		T5	1		T11	1
valid_sources[0x59]	35396	1			T4	450		T11	2		T12	3
valid_sources[0x5a]	36451	1			T4	346		T5	1		T6	1
valid_sources[0x5b]	37248	1			T4	259		T6	1		T7	803
valid_sources[0x5c]	36313	1			T4	368		T5	1		T7	709
valid_sources[0x5d]	36092	1			T4	368		T7	646		T8	424
valid_sources[0x5e]	35548	1			T4	317		T7	749		T8	417
valid_sources[0x5f]	37009	1			T4	309		T7	701		T112	1
valid_sources[0x60]	37606	1			T4	355		T6	1		T11	1
valid_sources[0x61]	36401	1			T4	360		T7	695		T33	3
valid_sources[0x62]	36236	1			T4	304		T12	1		T7	682
valid_sources[0x63]	32327	1			T4	288		T5	1		T6	3
valid_sources[0x64]	35455	1			T4	392		T7	742		T140	1
valid_sources[0x65]	36415	1			T4	373		T5	1		T6	2
valid_sources[0x66]	37929	1			T4	397		T7	731		T8	452
valid_sources[0x67]	34992	1			T4	324		T10	3		T7	796
valid_sources[0x68]	38080	1			T4	363		T7	800		T8	471
valid_sources[0x69]	35287	1			T4	351		T10	1		T7	725
valid_sources[0x6a]	36481	1			T4	313		T6	2		T7	724
valid_sources[0x6b]	37023	1			T4	365		T7	793		T112	2
valid_sources[0x6c]	37325	1			T4	306		T6	3		T7	743
valid_sources[0x6d]	33070	1			T4	304		T7	649		T33	1
valid_sources[0x6e]	34340	1			T4	305		T5	1		T12	2
valid_sources[0x6f]	35415	1			T4	393		T12	2		T7	789
valid_sources[0x70]	34805	1			T4	219		T10	2		T11	2
valid_sources[0x71]	34494	1			T4	336		T5	1		T7	755
valid_sources[0x72]	36065	1			T4	327		T12	1		T7	763
valid_sources[0x73]	34362	1			T4	328		T6	3		T11	3
valid_sources[0x74]	35164	1			T4	341		T11	1		T7	753
valid_sources[0x75]	37343	1			T4	378		T7	739		T112	1
valid_sources[0x76]	34868	1			T4	331		T5	2		T7	787
valid_sources[0x77]	35497	1			T4	324		T5	1		T6	6
valid_sources[0x78]	35882	1			T4	341		T6	1		T11	4
valid_sources[0x79]	34302	1			T4	331		T5	1		T7	686
valid_sources[0x7a]	34487	1			T4	394		T5	2		T7	797
valid_sources[0x7b]	35457	1			T4	364		T7	842		T112	1
valid_sources[0x7c]	33886	1			T4	355		T6	3		T7	756
valid_sources[0x7d]	36054	1			T4	354		T6	7		T7	729
valid_sources[0x7e]	36379	1			T4	343		T6	1		T11	1
valid_sources[0x7f]	38544	1			T4	298		T5	1		T11	4
valid_sources[0x80]	36703	1			T4	367		T6	1		T11	1

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

2275178

1

T3

80

T4

21861

T5

60

values[0x0]

all_enables

biggest_size

3336372

1

T3

38

T4

32418

T5

21

values[0x1]

all_enables

biggest_size

3336750

1

T3

42

T4

32805

T5

39