Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
dashboard | hierarchy | modlist | groups | tests | asserts

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 100.00 1 100 1 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

2 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64
tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64




Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0



Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 7024030 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 6622825 1 T1 2060 T2 640 T3 179



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 8197286 1 T1 5074 T2 959 T3 772
values[0x0] 2084321 1 T1 297 T2 298 T3 103
values[0x1] 3365248 1 T1 265 T2 279 T3 103



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 4611372 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 9035483 1 T1 2918 T2 838 T3 412



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 76233 1 T1 11 T3 12 T4 10
valid_sources[0x01] 82241 1 T1 12 T3 7 T4 35
valid_sources[0x02] 56802 1 T1 44 T4 8 T5 49
valid_sources[0x03] 47682 1 T1 9 T3 4 T4 1
valid_sources[0x04] 48494 1 T1 12 T4 29 T5 24
valid_sources[0x05] 50965 1 T1 30 T4 18 T5 36
valid_sources[0x06] 53317 1 T1 15 T4 13 T5 55
valid_sources[0x07] 53184 1 T1 10 T5 32 T10 30
valid_sources[0x08] 60015 1 T1 7 T3 1 T4 9
valid_sources[0x09] 47813 1 T1 52 T3 3 T5 33
valid_sources[0x0a] 66431 1 T1 16 T3 1 T4 9
valid_sources[0x0b] 55104 1 T1 18 T5 69 T10 44
valid_sources[0x0c] 53292 1 T1 23 T4 13 T5 32
valid_sources[0x0d] 58496 1 T1 24 T3 22 T4 4
valid_sources[0x0e] 51092 1 T1 25 T4 22 T5 44
valid_sources[0x0f] 55341 1 T1 14 T3 14 T4 29
valid_sources[0x10] 56610 1 T1 22 T4 3 T5 51
valid_sources[0x11] 51816 1 T1 22 T3 3 T4 30
valid_sources[0x12] 61006 1 T1 16 T5 27 T10 43
valid_sources[0x13] 51856 1 T1 26 T3 6 T4 9
valid_sources[0x14] 49430 1 T1 35 T4 7 T5 35
valid_sources[0x15] 53302 1 T1 22 T4 8 T5 21
valid_sources[0x16] 62186 1 T1 24 T3 8 T4 9
valid_sources[0x17] 47294 1 T1 6 T4 16 T5 46
valid_sources[0x18] 50970 1 T1 23 T4 5 T5 22
valid_sources[0x19] 47204 1 T1 43 T3 21 T4 23
valid_sources[0x1a] 50099 1 T1 46 T4 20 T5 17
valid_sources[0x1b] 47158 1 T1 8 T5 15 T10 55
valid_sources[0x1c] 47464 1 T1 38 T4 5 T5 34
valid_sources[0x1d] 53815 1 T1 54 T3 23 T4 16
valid_sources[0x1e] 54154 1 T1 14 T3 5 T4 15
valid_sources[0x1f] 46872 1 T1 14 T4 7 T5 31
valid_sources[0x20] 51498 1 T1 10 T3 5 T4 11
valid_sources[0x21] 49833 1 T1 9 T4 5 T5 45
valid_sources[0x22] 58007 1 T1 22 T4 12 T5 28
valid_sources[0x23] 47148 1 T1 12 T4 7 T5 29
valid_sources[0x24] 57747 1 T1 16 T4 17 T5 18
valid_sources[0x25] 47274 1 T1 44 T3 9 T4 6
valid_sources[0x26] 58537 1 T1 32 T4 18 T5 18
valid_sources[0x27] 62538 1 T1 17 T3 9 T4 27
valid_sources[0x28] 85711 1 T1 43 T3 4 T4 1
valid_sources[0x29] 47208 1 T1 17 T4 11 T5 21
valid_sources[0x2a] 53074 1 T1 18 T3 11 T4 14
valid_sources[0x2b] 46276 1 T1 37 T5 16 T10 40
valid_sources[0x2c] 51954 1 T1 11 T4 2 T5 33
valid_sources[0x2d] 70270 1 T1 9 T3 11 T4 2
valid_sources[0x2e] 46667 1 T1 59 T4 11 T5 19
valid_sources[0x2f] 48380 1 T1 41 T4 3 T5 43
valid_sources[0x30] 50522 1 T1 8 T4 17 T5 35
valid_sources[0x31] 47293 1 T1 10 T4 10 T5 36
valid_sources[0x32] 48229 1 T1 18 T3 4 T4 1
valid_sources[0x33] 47091 1 T1 34 T4 8 T5 16
valid_sources[0x34] 48036 1 T1 12 T3 23 T4 5
valid_sources[0x35] 51059 1 T1 22 T5 33 T10 40
valid_sources[0x36] 47382 1 T1 19 T4 17 T5 32
valid_sources[0x37] 53771 1 T1 7 T4 4 T5 38
valid_sources[0x38] 56695 1 T1 28 T4 13 T5 70
valid_sources[0x39] 49496 1 T1 51 T3 10 T4 9
valid_sources[0x3a] 49728 1 T1 48 T3 4 T4 8
valid_sources[0x3b] 50603 1 T1 2 T4 1 T5 11
valid_sources[0x3c] 148011 1 T1 21 T3 10 T4 27
valid_sources[0x3d] 53495 1 T1 25 T4 2 T5 7
valid_sources[0x3e] 46276 1 T1 21 T3 3 T4 5
valid_sources[0x3f] 46374 1 T1 20 T3 9 T4 23
valid_sources[0x40] 52104 1 T1 17 T4 13 T5 21
valid_sources[0x41] 70614 1 T1 11 T4 5 T5 51
valid_sources[0x42] 48627 1 T1 22 T4 28 T5 20
valid_sources[0x43] 46137 1 T1 21 T5 41 T10 44
valid_sources[0x44] 47076 1 T1 9 T4 25 T5 42
valid_sources[0x45] 47389 1 T1 45 T3 5 T4 43
valid_sources[0x46] 62169 1 T1 7 T3 11 T4 9
valid_sources[0x47] 52625 1 T1 10 T3 9 T4 10
valid_sources[0x48] 49849 1 T1 20 T3 2 T4 21
valid_sources[0x49] 59859 1 T1 22 T3 13 T4 9
valid_sources[0x4a] 45769 1 T1 24 T4 7 T5 12
valid_sources[0x4b] 51179 1 T1 2 T4 11 T5 32
valid_sources[0x4c] 48091 1 T1 17 T3 24 T4 22
valid_sources[0x4d] 47740 1 T1 60 T4 9 T5 37
valid_sources[0x4e] 44624 1 T1 34 T3 4 T4 10
valid_sources[0x4f] 52278 1 T1 34 T3 5 T4 10
valid_sources[0x50] 58657 1 T1 15 T3 12 T4 19
valid_sources[0x51] 55017 1 T1 30 T4 22 T5 32
valid_sources[0x52] 52255 1 T1 9 T3 8 T4 12
valid_sources[0x53] 46818 1 T1 20 T4 3 T5 24
valid_sources[0x54] 48291 1 T1 25 T3 17 T4 2
valid_sources[0x55] 51206 1 T1 2 T4 13 T5 19
valid_sources[0x56] 50652 1 T1 7 T3 16 T4 3
valid_sources[0x57] 47434 1 T1 43 T4 28 T5 49
valid_sources[0x58] 46704 1 T1 14 T4 16 T5 14
valid_sources[0x59] 48645 1 T1 5 T4 7 T5 20
valid_sources[0x5a] 50420 1 T1 14 T3 5 T5 40
valid_sources[0x5b] 50412 1 T1 17 T3 3 T4 6
valid_sources[0x5c] 49572 1 T1 16 T4 30 T5 22
valid_sources[0x5d] 56546 1 T1 34 T4 2 T5 22
valid_sources[0x5e] 52461 1 T1 20 T3 13 T4 1
valid_sources[0x5f] 48170 1 T1 51 T4 4 T5 37
valid_sources[0x60] 50218 1 T1 64 T3 4 T4 2
valid_sources[0x61] 50010 1 T1 25 T4 2 T5 60
valid_sources[0x62] 46001 1 T1 12 T4 1 T5 22
valid_sources[0x63] 68054 1 T1 18 T4 24 T5 33
valid_sources[0x64] 47599 1 T1 15 T4 3 T5 57
valid_sources[0x65] 66780 1 T1 28 T5 30 T10 37
valid_sources[0x66] 59099 1 T1 42 T3 1 T4 8
valid_sources[0x67] 56204 1 T1 11 T4 8 T5 65
valid_sources[0x68] 49042 1 T1 18 T4 2 T5 16
valid_sources[0x69] 47335 1 T1 14 T4 1 T5 56
valid_sources[0x6a] 50357 1 T1 24 T3 11 T4 4
valid_sources[0x6b] 55001 1 T1 9 T5 68 T10 35
valid_sources[0x6c] 50015 1 T1 28 T4 15 T5 15
valid_sources[0x6d] 49683 1 T1 29 T4 5 T5 22
valid_sources[0x6e] 48016 1 T1 12 T3 4 T4 13
valid_sources[0x6f] 48238 1 T1 12 T3 1 T4 15
valid_sources[0x70] 177541 1 T1 48 T3 9 T4 7
valid_sources[0x71] 46870 1 T1 29 T4 18 T5 19
valid_sources[0x72] 54304 1 T1 24 T5 14 T10 41
valid_sources[0x73] 47467 1 T1 20 T4 2 T5 39
valid_sources[0x74] 48474 1 T1 22 T4 15 T5 45
valid_sources[0x75] 62179 1 T1 39 T5 26 T10 27
valid_sources[0x76] 54453 1 T1 30 T3 8 T4 3
valid_sources[0x77] 57459 1 T1 25 T3 10 T4 3
valid_sources[0x78] 47963 1 T1 38 T5 35 T10 37
valid_sources[0x79] 52784 1 T1 19 T3 21 T4 25
valid_sources[0x7a] 48045 1 T1 15 T3 3 T4 16
valid_sources[0x7b] 68477 1 T1 15 T4 6 T5 32
valid_sources[0x7c] 47950 1 T1 18 T3 8 T4 6
valid_sources[0x7d] 50882 1 T1 41 T3 5 T4 7
valid_sources[0x7e] 56190 1 T1 8 T4 4 T5 60
valid_sources[0x7f] 54382 1 T1 28 T5 18 T10 28
valid_sources[0x80] 52013 1 T1 18 T3 2 T4 12



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 3287530 1 T1 1842 T2 393 T3 87
values[0x0] all_enables biggest_size 1707286 1 T1 137 T2 155 T3 48
values[0x1] all_enables biggest_size 1628009 1 T1 81 T2 92 T3 44


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 224043 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 7894951 1 T1 100 T2 120 T4 40



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 2024496 1 T1 50 T2 60 T4 20
values[0x0] 2956689 1 T1 26 T2 30 T4 9
values[0x1] 3137809 1 T1 24 T2 30 T4 11



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 80688 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 8038306 1 T1 100 T2 120 T4 40



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 31255 1 T1 2 T8 1 T17 1
valid_sources[0x01] 30885 1 T107 6 T91 1 T9 170
valid_sources[0x02] 29912 1 T1 1 T10 1 T8 11
valid_sources[0x03] 29082 1 T5 2 T8 3 T110 1
valid_sources[0x04] 34648 1 T8 1 T110 3 T132 1
valid_sources[0x05] 29631 1 T1 1 T12 22 T8 4
valid_sources[0x06] 32601 1 T2 1 T8 20 T18 1
valid_sources[0x07] 29035 1 T10 1 T8 5 T9 101
valid_sources[0x08] 31616 1 T1 1 T8 3 T18 2
valid_sources[0x09] 32447 1 T8 4 T107 4 T110 1
valid_sources[0x0a] 29132 1 T2 9 T93 3 T9 152
valid_sources[0x0b] 28955 1 T1 2 T5 1 T8 2
valid_sources[0x0c] 30450 1 T8 11 T93 1 T9 123
valid_sources[0x0d] 34375 1 T8 4 T110 1 T132 3
valid_sources[0x0e] 31338 1 T1 1 T2 1 T12 6
valid_sources[0x0f] 31863 1 T2 2 T10 5 T8 1
valid_sources[0x10] 36742 1 T1 2 T132 1 T93 1
valid_sources[0x11] 32486 1 T106 8 T18 1 T91 1
valid_sources[0x12] 30407 1 T8 3 T107 1 T220 3
valid_sources[0x13] 32572 1 T8 2 T93 2 T9 120
valid_sources[0x14] 31409 1 T10 5 T8 4 T91 1
valid_sources[0x15] 35183 1 T17 1 T18 1 T91 1
valid_sources[0x16] 31959 1 T8 7 T17 1 T98 2
valid_sources[0x17] 34352 1 T1 3 T5 4 T17 1
valid_sources[0x18] 32855 1 T10 2 T8 1 T107 5
valid_sources[0x19] 31364 1 T1 1 T10 3 T220 1
valid_sources[0x1a] 33198 1 T1 2 T2 3 T220 1
valid_sources[0x1b] 29515 1 T9 116 T96 1 T99 1
valid_sources[0x1c] 32892 1 T8 5 T110 3 T132 3
valid_sources[0x1d] 31384 1 T1 1 T5 1 T8 3
valid_sources[0x1e] 31824 1 T1 1 T8 1 T107 6
valid_sources[0x1f] 32506 1 T5 2 T110 4 T18 1
valid_sources[0x20] 31002 1 T8 6 T110 4 T18 1
valid_sources[0x21] 31259 1 T5 1 T8 1 T18 2
valid_sources[0x22] 31269 1 T1 3 T5 3 T6 1
valid_sources[0x23] 31085 1 T5 3 T132 1 T9 152
valid_sources[0x24] 30613 1 T4 2 T5 2 T8 2
valid_sources[0x25] 31908 1 T8 9 T110 2 T18 1
valid_sources[0x26] 31227 1 T1 1 T8 1 T220 1
valid_sources[0x27] 30713 1 T5 2 T8 3 T18 2
valid_sources[0x28] 31950 1 T1 1 T7 6 T8 5
valid_sources[0x29] 31673 1 T2 3 T8 4 T107 1
valid_sources[0x2a] 32700 1 T2 1 T107 3 T110 2
valid_sources[0x2b] 32584 1 T2 1 T8 1 T132 2
valid_sources[0x2c] 31714 1 T8 4 T107 10 T91 1
valid_sources[0x2d] 30694 1 T8 10 T132 1 T9 134
valid_sources[0x2e] 28925 1 T2 3 T5 1 T12 15
valid_sources[0x2f] 31445 1 T12 5 T8 2 T107 7
valid_sources[0x30] 29566 1 T132 1 T220 1 T9 116
valid_sources[0x31] 30739 1 T8 1 T110 3 T9 92
valid_sources[0x32] 32522 1 T1 1 T2 1 T10 1
valid_sources[0x33] 34420 1 T5 2 T10 2 T8 7
valid_sources[0x34] 29941 1 T8 9 T110 8 T91 1
valid_sources[0x35] 32190 1 T2 3 T10 3 T8 6
valid_sources[0x36] 33039 1 T5 1 T8 4 T18 1
valid_sources[0x37] 32094 1 T10 1 T8 2 T18 2
valid_sources[0x38] 32386 1 T9 93 T100 3 T101 1
valid_sources[0x39] 34499 1 T1 5 T2 1 T10 1
valid_sources[0x3a] 30475 1 T8 1 T18 4 T9 84
valid_sources[0x3b] 32168 1 T1 1 T8 3 T93 2
valid_sources[0x3c] 34222 1 T2 1 T4 14 T10 2
valid_sources[0x3d] 29030 1 T8 3 T91 1 T93 3
valid_sources[0x3e] 33012 1 T1 3 T8 8 T17 1
valid_sources[0x3f] 31120 1 T8 1 T132 1 T9 50
valid_sources[0x40] 31674 1 T10 1 T8 8 T106 9
valid_sources[0x41] 31027 1 T10 1 T12 6 T105 1
valid_sources[0x42] 32184 1 T1 1 T8 2 T107 8
valid_sources[0x43] 31672 1 T6 2 T8 2 T18 2
valid_sources[0x44] 32618 1 T8 1 T91 1 T93 1
valid_sources[0x45] 28484 1 T1 1 T18 1 T132 1
valid_sources[0x46] 31993 1 T10 3 T8 4 T17 2
valid_sources[0x47] 27499 1 T1 1 T2 4 T8 4
valid_sources[0x48] 30068 1 T2 2 T10 1 T8 3
valid_sources[0x49] 34035 1 T8 1 T17 1 T18 1
valid_sources[0x4a] 30426 1 T6 2 T8 4 T17 1
valid_sources[0x4b] 32975 1 T2 2 T10 4 T8 1
valid_sources[0x4c] 29766 1 T2 4 T8 1 T110 2
valid_sources[0x4d] 31735 1 T4 1 T8 1 T110 1
valid_sources[0x4e] 32529 1 T2 1 T8 2 T132 1
valid_sources[0x4f] 30684 1 T1 1 T2 2 T5 6
valid_sources[0x50] 28722 1 T8 2 T91 1 T9 125
valid_sources[0x51] 30490 1 T10 3 T8 2 T132 1
valid_sources[0x52] 28913 1 T2 2 T8 3 T18 1
valid_sources[0x53] 34244 1 T12 15 T8 1 T17 1
valid_sources[0x54] 31859 1 T7 1 T8 5 T17 1
valid_sources[0x55] 33710 1 T6 1 T8 3 T107 1
valid_sources[0x56] 33716 1 T5 6 T10 4 T8 5
valid_sources[0x57] 31407 1 T5 2 T10 2 T132 1
valid_sources[0x58] 29046 1 T18 7 T93 3 T9 104
valid_sources[0x59] 31259 1 T10 1 T8 7 T110 1
valid_sources[0x5a] 28773 1 T2 1 T10 1 T110 1
valid_sources[0x5b] 30913 1 T1 2 T10 1 T8 5
valid_sources[0x5c] 29986 1 T10 3 T17 1 T132 2
valid_sources[0x5d] 28536 1 T1 1 T2 1 T12 1
valid_sources[0x5e] 29580 1 T8 1 T110 1 T132 2
valid_sources[0x5f] 29456 1 T2 6 T105 1 T8 1
valid_sources[0x60] 33274 1 T2 1 T5 3 T93 1
valid_sources[0x61] 32288 1 T1 3 T8 5 T110 1
valid_sources[0x62] 32044 1 T1 1 T8 2 T110 2
valid_sources[0x63] 33242 1 T8 1 T17 1 T91 1
valid_sources[0x64] 31166 1 T2 1 T110 1 T132 1
valid_sources[0x65] 35067 1 T8 4 T110 3 T91 2
valid_sources[0x66] 31420 1 T10 3 T17 1 T132 1
valid_sources[0x67] 30116 1 T1 1 T10 1 T8 1
valid_sources[0x68] 33354 1 T5 1 T17 1 T93 3
valid_sources[0x69] 32333 1 T2 2 T5 1 T8 2
valid_sources[0x6a] 31823 1 T2 2 T10 3 T8 2
valid_sources[0x6b] 33759 1 T8 3 T93 1 T9 170
valid_sources[0x6c] 31461 1 T10 1 T91 1 T93 1
valid_sources[0x6d] 30491 1 T1 1 T2 1 T8 1
valid_sources[0x6e] 31433 1 T1 2 T2 4 T8 3
valid_sources[0x6f] 29840 1 T8 5 T132 1 T9 103
valid_sources[0x70] 31752 1 T8 1 T93 1 T9 198
valid_sources[0x71] 30575 1 T10 7 T8 1 T93 3
valid_sources[0x72] 31229 1 T1 1 T8 9 T91 1
valid_sources[0x73] 31720 1 T2 1 T8 3 T18 2
valid_sources[0x74] 32143 1 T2 1 T105 5 T8 7
valid_sources[0x75] 31991 1 T10 3 T8 19 T98 1
valid_sources[0x76] 30608 1 T110 2 T132 1 T91 1
valid_sources[0x77] 31600 1 T2 2 T8 3 T17 1
valid_sources[0x78] 31276 1 T5 2 T9 85 T100 1
valid_sources[0x79] 32909 1 T17 1 T220 1 T91 1
valid_sources[0x7a] 30173 1 T8 3 T17 2 T9 167
valid_sources[0x7b] 32751 1 T4 3 T5 3 T12 4
valid_sources[0x7c] 30826 1 T1 1 T2 1 T8 3
valid_sources[0x7d] 33707 1 T8 8 T17 1 T93 1
valid_sources[0x7e] 30857 1 T1 1 T2 3 T10 6
valid_sources[0x7f] 33465 1 T1 1 T8 3 T110 1
valid_sources[0x80] 32134 1 T8 6 T18 3 T132 1



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 2011624 1 T1 50 T2 60 T4 20
values[0x0] all_enables biggest_size 2941689 1 T1 26 T2 30 T4 9
values[0x1] all_enables biggest_size 2941638 1 T1 24 T2 30 T4 11

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%