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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
94.91 93.85 96.35 95.32 92.36 96.81 96.33 93.35


Total test records in report: 1329
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T1064 /workspace/coverage/default/56.otp_ctrl_stress_all_with_rand_reset.199937479 Mar 31 03:32:14 PM PDT 24 Mar 31 03:47:33 PM PDT 24 40042126188 ps
T1065 /workspace/coverage/default/23.otp_ctrl_test_access.1532371473 Mar 31 03:30:17 PM PDT 24 Mar 31 03:30:38 PM PDT 24 1287295369 ps
T1066 /workspace/coverage/default/37.otp_ctrl_regwen.3969113971 Mar 31 03:31:19 PM PDT 24 Mar 31 03:31:27 PM PDT 24 2691346093 ps
T1067 /workspace/coverage/default/22.otp_ctrl_parallel_lc_esc.2263514844 Mar 31 03:30:12 PM PDT 24 Mar 31 03:30:18 PM PDT 24 230598688 ps
T1068 /workspace/coverage/default/11.otp_ctrl_parallel_lc_esc.2516536424 Mar 31 03:29:24 PM PDT 24 Mar 31 03:29:30 PM PDT 24 199349064 ps
T1069 /workspace/coverage/default/0.otp_ctrl_wake_up.2035547028 Mar 31 03:28:09 PM PDT 24 Mar 31 03:28:11 PM PDT 24 62364861 ps
T1070 /workspace/coverage/default/151.otp_ctrl_init_fail.2947531048 Mar 31 03:33:22 PM PDT 24 Mar 31 03:33:26 PM PDT 24 614179358 ps
T243 /workspace/coverage/default/59.otp_ctrl_stress_all_with_rand_reset.2294183700 Mar 31 03:32:13 PM PDT 24 Mar 31 03:55:57 PM PDT 24 244687737573 ps
T1071 /workspace/coverage/default/4.otp_ctrl_check_fail.4156552965 Mar 31 03:28:53 PM PDT 24 Mar 31 03:28:58 PM PDT 24 310203045 ps
T1072 /workspace/coverage/default/38.otp_ctrl_stress_all.1439589923 Mar 31 03:31:25 PM PDT 24 Mar 31 03:34:38 PM PDT 24 19090645139 ps
T1073 /workspace/coverage/default/226.otp_ctrl_init_fail.2239621147 Mar 31 03:33:53 PM PDT 24 Mar 31 03:33:57 PM PDT 24 221265480 ps
T1074 /workspace/coverage/default/12.otp_ctrl_parallel_lc_esc.1757928540 Mar 31 03:29:30 PM PDT 24 Mar 31 03:29:52 PM PDT 24 1467695776 ps
T1075 /workspace/coverage/default/60.otp_ctrl_init_fail.1489854726 Mar 31 03:32:11 PM PDT 24 Mar 31 03:32:18 PM PDT 24 2421159909 ps
T1076 /workspace/coverage/default/119.otp_ctrl_parallel_lc_esc.2310642797 Mar 31 03:33:01 PM PDT 24 Mar 31 03:33:07 PM PDT 24 196171195 ps
T1077 /workspace/coverage/default/40.otp_ctrl_stress_all.1534848989 Mar 31 03:31:29 PM PDT 24 Mar 31 03:36:19 PM PDT 24 23675114834 ps
T1078 /workspace/coverage/default/29.otp_ctrl_stress_all_with_rand_reset.3725802211 Mar 31 03:30:51 PM PDT 24 Mar 31 03:51:31 PM PDT 24 92852927368 ps
T1079 /workspace/coverage/default/13.otp_ctrl_init_fail.3028722088 Mar 31 03:29:35 PM PDT 24 Mar 31 03:29:40 PM PDT 24 149498418 ps
T1080 /workspace/coverage/default/35.otp_ctrl_dai_lock.1012608307 Mar 31 03:31:07 PM PDT 24 Mar 31 03:31:19 PM PDT 24 8556240706 ps
T1081 /workspace/coverage/default/289.otp_ctrl_init_fail.681470871 Mar 31 03:34:10 PM PDT 24 Mar 31 03:34:13 PM PDT 24 199353138 ps
T1082 /workspace/coverage/default/42.otp_ctrl_regwen.3986421991 Mar 31 03:31:37 PM PDT 24 Mar 31 03:31:40 PM PDT 24 109948809 ps
T1083 /workspace/coverage/default/9.otp_ctrl_check_fail.2582810505 Mar 31 03:29:16 PM PDT 24 Mar 31 03:29:24 PM PDT 24 598132217 ps
T1084 /workspace/coverage/default/32.otp_ctrl_macro_errs.2478378039 Mar 31 03:30:54 PM PDT 24 Mar 31 03:32:12 PM PDT 24 7928109089 ps
T1085 /workspace/coverage/default/1.otp_ctrl_parallel_lc_req.1411038419 Mar 31 03:28:20 PM PDT 24 Mar 31 03:28:26 PM PDT 24 374582876 ps
T1086 /workspace/coverage/default/37.otp_ctrl_test_access.1696011114 Mar 31 03:31:20 PM PDT 24 Mar 31 03:31:33 PM PDT 24 6261159001 ps
T1087 /workspace/coverage/default/37.otp_ctrl_init_fail.3280492776 Mar 31 03:31:16 PM PDT 24 Mar 31 03:31:19 PM PDT 24 115372316 ps
T1088 /workspace/coverage/default/14.otp_ctrl_stress_all_with_rand_reset.588457840 Mar 31 03:29:47 PM PDT 24 Mar 31 03:39:42 PM PDT 24 23678240870 ps
T1089 /workspace/coverage/default/288.otp_ctrl_init_fail.1421094442 Mar 31 03:34:13 PM PDT 24 Mar 31 03:34:17 PM PDT 24 379728177 ps
T1090 /workspace/coverage/default/237.otp_ctrl_init_fail.2488395161 Mar 31 03:33:55 PM PDT 24 Mar 31 03:34:00 PM PDT 24 1521060096 ps
T302 /workspace/coverage/default/90.otp_ctrl_stress_all_with_rand_reset.4149210781 Mar 31 03:32:42 PM PDT 24 Mar 31 04:06:51 PM PDT 24 1114490184441 ps
T320 /workspace/coverage/default/147.otp_ctrl_init_fail.2046898278 Mar 31 03:33:13 PM PDT 24 Mar 31 03:33:17 PM PDT 24 256718770 ps
T321 /workspace/coverage/default/29.otp_ctrl_test_access.2376662011 Mar 31 03:30:48 PM PDT 24 Mar 31 03:31:08 PM PDT 24 1209742100 ps
T322 /workspace/coverage/default/3.otp_ctrl_parallel_lc_req.2299709870 Mar 31 03:28:41 PM PDT 24 Mar 31 03:28:47 PM PDT 24 2352343486 ps
T323 /workspace/coverage/default/15.otp_ctrl_parallel_lc_esc.460739714 Mar 31 03:29:46 PM PDT 24 Mar 31 03:29:50 PM PDT 24 316037267 ps
T234 /workspace/coverage/default/19.otp_ctrl_stress_all.2027021657 Mar 31 03:30:01 PM PDT 24 Mar 31 03:32:33 PM PDT 24 11470083007 ps
T324 /workspace/coverage/default/25.otp_ctrl_macro_errs.28640910 Mar 31 03:30:29 PM PDT 24 Mar 31 03:31:14 PM PDT 24 2958701377 ps
T325 /workspace/coverage/default/61.otp_ctrl_parallel_lc_esc.272392484 Mar 31 03:32:17 PM PDT 24 Mar 31 03:32:22 PM PDT 24 1345587886 ps
T326 /workspace/coverage/default/55.otp_ctrl_stress_all_with_rand_reset.2423348589 Mar 31 03:32:12 PM PDT 24 Mar 31 03:48:38 PM PDT 24 87410372058 ps
T327 /workspace/coverage/default/293.otp_ctrl_init_fail.1507840094 Mar 31 03:34:10 PM PDT 24 Mar 31 03:34:14 PM PDT 24 560199949 ps
T1091 /workspace/coverage/default/29.otp_ctrl_dai_errs.195580504 Mar 31 03:30:43 PM PDT 24 Mar 31 03:31:32 PM PDT 24 19364776632 ps
T1092 /workspace/coverage/default/99.otp_ctrl_init_fail.4090946113 Mar 31 03:32:52 PM PDT 24 Mar 31 03:32:57 PM PDT 24 554612786 ps
T28 /workspace/coverage/default/20.otp_ctrl_check_fail.2712459409 Mar 31 03:30:07 PM PDT 24 Mar 31 03:30:26 PM PDT 24 2936356836 ps
T1093 /workspace/coverage/default/82.otp_ctrl_init_fail.1334853337 Mar 31 03:32:35 PM PDT 24 Mar 31 03:32:39 PM PDT 24 124387228 ps
T1094 /workspace/coverage/default/48.otp_ctrl_macro_errs.1234152086 Mar 31 03:32:03 PM PDT 24 Mar 31 03:32:29 PM PDT 24 5566591848 ps
T29 /workspace/coverage/default/1.otp_ctrl_check_fail.1816806018 Mar 31 03:28:28 PM PDT 24 Mar 31 03:29:15 PM PDT 24 3486483257 ps
T1095 /workspace/coverage/default/99.otp_ctrl_parallel_lc_esc.2032641207 Mar 31 03:32:53 PM PDT 24 Mar 31 03:32:58 PM PDT 24 138163311 ps
T1096 /workspace/coverage/default/76.otp_ctrl_init_fail.627089179 Mar 31 03:32:30 PM PDT 24 Mar 31 03:32:35 PM PDT 24 406842914 ps
T1097 /workspace/coverage/default/243.otp_ctrl_init_fail.2469215261 Mar 31 03:33:55 PM PDT 24 Mar 31 03:34:00 PM PDT 24 126956274 ps
T1098 /workspace/coverage/default/126.otp_ctrl_parallel_lc_esc.1226377333 Mar 31 03:33:07 PM PDT 24 Mar 31 03:33:19 PM PDT 24 430995045 ps
T1099 /workspace/coverage/default/85.otp_ctrl_stress_all_with_rand_reset.3978491589 Mar 31 03:32:39 PM PDT 24 Mar 31 03:57:55 PM PDT 24 138200192755 ps
T1100 /workspace/coverage/default/115.otp_ctrl_parallel_lc_esc.1622553409 Mar 31 03:32:57 PM PDT 24 Mar 31 03:33:09 PM PDT 24 471113574 ps
T1101 /workspace/coverage/default/44.otp_ctrl_stress_all_with_rand_reset.4263817043 Mar 31 03:31:42 PM PDT 24 Mar 31 03:35:45 PM PDT 24 33598331707 ps
T1102 /workspace/coverage/default/44.otp_ctrl_dai_lock.283248606 Mar 31 03:31:44 PM PDT 24 Mar 31 03:32:22 PM PDT 24 19109464235 ps
T1103 /workspace/coverage/default/31.otp_ctrl_alert_test.438656287 Mar 31 03:30:58 PM PDT 24 Mar 31 03:31:01 PM PDT 24 79314912 ps
T1104 /workspace/coverage/default/27.otp_ctrl_parallel_lc_esc.1219642641 Mar 31 03:30:37 PM PDT 24 Mar 31 03:30:43 PM PDT 24 212809755 ps
T1105 /workspace/coverage/default/44.otp_ctrl_parallel_lc_esc.916526553 Mar 31 03:31:44 PM PDT 24 Mar 31 03:31:49 PM PDT 24 331908375 ps
T1106 /workspace/coverage/default/42.otp_ctrl_parallel_lc_req.3490283362 Mar 31 03:31:37 PM PDT 24 Mar 31 03:31:42 PM PDT 24 514974165 ps
T1107 /workspace/coverage/default/78.otp_ctrl_parallel_lc_esc.2878511994 Mar 31 03:32:31 PM PDT 24 Mar 31 03:32:36 PM PDT 24 439515250 ps
T1108 /workspace/coverage/default/21.otp_ctrl_regwen.1255238897 Mar 31 03:30:08 PM PDT 24 Mar 31 03:30:12 PM PDT 24 272343610 ps
T1109 /workspace/coverage/default/47.otp_ctrl_macro_errs.883495692 Mar 31 03:31:55 PM PDT 24 Mar 31 03:32:25 PM PDT 24 15483875009 ps
T1110 /workspace/coverage/default/35.otp_ctrl_parallel_lc_req.1940009311 Mar 31 03:31:10 PM PDT 24 Mar 31 03:31:20 PM PDT 24 352614053 ps
T1111 /workspace/coverage/default/7.otp_ctrl_stress_all.168636766 Mar 31 03:29:10 PM PDT 24 Mar 31 03:32:32 PM PDT 24 123053492828 ps
T1112 /workspace/coverage/default/74.otp_ctrl_parallel_lc_esc.2573460575 Mar 31 03:32:32 PM PDT 24 Mar 31 03:32:36 PM PDT 24 168965428 ps
T1113 /workspace/coverage/default/173.otp_ctrl_init_fail.2370324278 Mar 31 03:33:35 PM PDT 24 Mar 31 03:33:38 PM PDT 24 146306973 ps
T1114 /workspace/coverage/default/215.otp_ctrl_init_fail.2751471506 Mar 31 03:33:51 PM PDT 24 Mar 31 03:33:56 PM PDT 24 2300492192 ps
T1115 /workspace/coverage/default/14.otp_ctrl_init_fail.2483722716 Mar 31 03:29:40 PM PDT 24 Mar 31 03:29:46 PM PDT 24 129790125 ps
T1116 /workspace/coverage/default/4.otp_ctrl_parallel_lc_req.3301374386 Mar 31 03:28:53 PM PDT 24 Mar 31 03:28:59 PM PDT 24 202803889 ps
T1117 /workspace/coverage/default/165.otp_ctrl_parallel_lc_esc.3605118702 Mar 31 03:33:28 PM PDT 24 Mar 31 03:33:43 PM PDT 24 3741441362 ps
T1118 /workspace/coverage/default/54.otp_ctrl_parallel_lc_esc.3625249473 Mar 31 03:32:12 PM PDT 24 Mar 31 03:32:18 PM PDT 24 1972193720 ps
T54 /workspace/coverage/default/26.otp_ctrl_check_fail.2013245764 Mar 31 03:30:29 PM PDT 24 Mar 31 03:30:41 PM PDT 24 1224311636 ps
T1119 /workspace/coverage/default/35.otp_ctrl_parallel_key_req.1897148632 Mar 31 03:31:10 PM PDT 24 Mar 31 03:31:35 PM PDT 24 2432164710 ps
T259 /workspace/coverage/default/179.otp_ctrl_parallel_lc_esc.3063902476 Mar 31 03:33:34 PM PDT 24 Mar 31 03:33:38 PM PDT 24 118040027 ps
T1120 /workspace/coverage/default/6.otp_ctrl_init_fail.1893896062 Mar 31 03:28:58 PM PDT 24 Mar 31 03:29:03 PM PDT 24 1598547603 ps
T1121 /workspace/coverage/default/31.otp_ctrl_dai_lock.2041012699 Mar 31 03:30:54 PM PDT 24 Mar 31 03:31:01 PM PDT 24 359472707 ps
T1122 /workspace/coverage/default/0.otp_ctrl_smoke.1235792730 Mar 31 03:28:08 PM PDT 24 Mar 31 03:28:18 PM PDT 24 434647611 ps
T1123 /workspace/coverage/default/120.otp_ctrl_parallel_lc_esc.3943071230 Mar 31 03:33:01 PM PDT 24 Mar 31 03:33:10 PM PDT 24 172640802 ps
T1124 /workspace/coverage/default/1.otp_ctrl_macro_errs.624820989 Mar 31 03:28:28 PM PDT 24 Mar 31 03:28:39 PM PDT 24 1435928556 ps
T1125 /workspace/coverage/default/28.otp_ctrl_smoke.2956532898 Mar 31 03:30:41 PM PDT 24 Mar 31 03:30:52 PM PDT 24 808762783 ps
T1126 /workspace/coverage/default/34.otp_ctrl_dai_errs.1348216833 Mar 31 03:31:03 PM PDT 24 Mar 31 03:31:26 PM PDT 24 5507996766 ps
T1127 /workspace/coverage/default/3.otp_ctrl_alert_test.4088350740 Mar 31 03:28:46 PM PDT 24 Mar 31 03:28:48 PM PDT 24 54520902 ps
T303 /workspace/coverage/default/89.otp_ctrl_stress_all_with_rand_reset.2511682872 Mar 31 03:32:40 PM PDT 24 Mar 31 03:41:37 PM PDT 24 123026891980 ps
T1128 /workspace/coverage/default/41.otp_ctrl_parallel_lc_req.3138708801 Mar 31 03:31:30 PM PDT 24 Mar 31 03:31:39 PM PDT 24 831030036 ps
T1129 /workspace/coverage/default/30.otp_ctrl_macro_errs.1942970365 Mar 31 03:30:50 PM PDT 24 Mar 31 03:32:17 PM PDT 24 29635978775 ps
T257 /workspace/coverage/default/17.otp_ctrl_stress_all.2964072458 Mar 31 03:30:00 PM PDT 24 Mar 31 03:34:57 PM PDT 24 19268527838 ps
T1130 /workspace/coverage/default/46.otp_ctrl_init_fail.2182585576 Mar 31 03:31:51 PM PDT 24 Mar 31 03:31:56 PM PDT 24 121357881 ps
T1131 /workspace/coverage/default/47.otp_ctrl_stress_all.3717191385 Mar 31 03:32:04 PM PDT 24 Mar 31 03:33:20 PM PDT 24 11172250602 ps
T1132 /workspace/coverage/default/55.otp_ctrl_init_fail.3506132944 Mar 31 03:32:11 PM PDT 24 Mar 31 03:32:16 PM PDT 24 2188466662 ps
T1133 /workspace/coverage/default/30.otp_ctrl_parallel_lc_esc.1432973706 Mar 31 03:30:49 PM PDT 24 Mar 31 03:30:59 PM PDT 24 229874440 ps
T1134 /workspace/coverage/default/195.otp_ctrl_parallel_lc_esc.325990010 Mar 31 03:33:49 PM PDT 24 Mar 31 03:33:56 PM PDT 24 931657400 ps
T1135 /workspace/coverage/default/24.otp_ctrl_parallel_lc_esc.955039926 Mar 31 03:30:23 PM PDT 24 Mar 31 03:30:33 PM PDT 24 784544260 ps
T1136 /workspace/coverage/default/244.otp_ctrl_init_fail.3412837061 Mar 31 03:33:54 PM PDT 24 Mar 31 03:33:57 PM PDT 24 204606110 ps
T1137 /workspace/coverage/default/42.otp_ctrl_parallel_lc_esc.1044134579 Mar 31 03:31:36 PM PDT 24 Mar 31 03:31:43 PM PDT 24 547482698 ps
T342 /workspace/coverage/default/9.otp_ctrl_stress_all_with_rand_reset.1410941524 Mar 31 03:29:19 PM PDT 24 Mar 31 03:57:34 PM PDT 24 63517134508 ps
T1138 /workspace/coverage/default/38.otp_ctrl_dai_lock.418099075 Mar 31 03:31:25 PM PDT 24 Mar 31 03:31:44 PM PDT 24 1558936699 ps
T1139 /workspace/coverage/default/50.otp_ctrl_init_fail.3543046191 Mar 31 03:32:09 PM PDT 24 Mar 31 03:32:14 PM PDT 24 117098568 ps
T1140 /workspace/coverage/default/57.otp_ctrl_init_fail.3371600290 Mar 31 03:32:12 PM PDT 24 Mar 31 03:32:16 PM PDT 24 144702465 ps
T1141 /workspace/coverage/default/39.otp_ctrl_parallel_lc_req.2227561457 Mar 31 03:31:25 PM PDT 24 Mar 31 03:31:58 PM PDT 24 12910617250 ps
T1142 /workspace/coverage/default/30.otp_ctrl_smoke.655096793 Mar 31 03:30:50 PM PDT 24 Mar 31 03:30:56 PM PDT 24 197270322 ps
T252 /workspace/coverage/default/60.otp_ctrl_stress_all_with_rand_reset.4272355800 Mar 31 03:32:17 PM PDT 24 Mar 31 03:46:37 PM PDT 24 263115368517 ps
T1143 /workspace/coverage/default/28.otp_ctrl_check_fail.2248977190 Mar 31 03:30:45 PM PDT 24 Mar 31 03:31:02 PM PDT 24 618811755 ps
T1144 /workspace/coverage/default/34.otp_ctrl_parallel_key_req.3536860279 Mar 31 03:31:09 PM PDT 24 Mar 31 03:31:17 PM PDT 24 442289677 ps
T1145 /workspace/coverage/default/297.otp_ctrl_init_fail.1292130289 Mar 31 03:34:09 PM PDT 24 Mar 31 03:34:13 PM PDT 24 175404284 ps
T1146 /workspace/coverage/default/131.otp_ctrl_init_fail.2399220958 Mar 31 03:33:04 PM PDT 24 Mar 31 03:33:08 PM PDT 24 240558396 ps
T1147 /workspace/coverage/default/117.otp_ctrl_init_fail.1259197646 Mar 31 03:33:01 PM PDT 24 Mar 31 03:33:06 PM PDT 24 608555340 ps
T1148 /workspace/coverage/default/238.otp_ctrl_init_fail.3498049421 Mar 31 03:33:57 PM PDT 24 Mar 31 03:34:02 PM PDT 24 1513937740 ps
T1149 /workspace/coverage/default/2.otp_ctrl_macro_errs.4240143631 Mar 31 03:28:36 PM PDT 24 Mar 31 03:28:50 PM PDT 24 786283486 ps
T1150 /workspace/coverage/default/22.otp_ctrl_alert_test.2858999259 Mar 31 03:30:13 PM PDT 24 Mar 31 03:30:17 PM PDT 24 1031907834 ps
T1151 /workspace/coverage/default/83.otp_ctrl_stress_all_with_rand_reset.2554985442 Mar 31 03:32:39 PM PDT 24 Mar 31 03:50:13 PM PDT 24 290974707758 ps
T1152 /workspace/coverage/default/82.otp_ctrl_parallel_lc_esc.3974685477 Mar 31 03:32:39 PM PDT 24 Mar 31 03:32:54 PM PDT 24 1067637374 ps
T1153 /workspace/coverage/default/21.otp_ctrl_macro_errs.670711971 Mar 31 03:30:11 PM PDT 24 Mar 31 03:30:20 PM PDT 24 343923306 ps
T1154 /workspace/coverage/default/36.otp_ctrl_macro_errs.566660226 Mar 31 03:31:15 PM PDT 24 Mar 31 03:31:35 PM PDT 24 2307168376 ps
T1155 /workspace/coverage/default/0.otp_ctrl_alert_test.4226194030 Mar 31 03:28:21 PM PDT 24 Mar 31 03:28:26 PM PDT 24 1075844315 ps
T1156 /workspace/coverage/default/28.otp_ctrl_regwen.664584685 Mar 31 03:30:42 PM PDT 24 Mar 31 03:30:50 PM PDT 24 840515772 ps
T1157 /workspace/coverage/default/13.otp_ctrl_stress_all.486911148 Mar 31 03:29:39 PM PDT 24 Mar 31 03:30:14 PM PDT 24 2944601181 ps
T1158 /workspace/coverage/default/105.otp_ctrl_init_fail.4151202635 Mar 31 03:33:00 PM PDT 24 Mar 31 03:33:04 PM PDT 24 155618784 ps
T1159 /workspace/coverage/default/31.otp_ctrl_parallel_key_req.1261692140 Mar 31 03:30:55 PM PDT 24 Mar 31 03:31:01 PM PDT 24 472096428 ps
T1160 /workspace/coverage/default/28.otp_ctrl_init_fail.726881367 Mar 31 03:30:41 PM PDT 24 Mar 31 03:30:47 PM PDT 24 1743577651 ps
T1161 /workspace/coverage/default/26.otp_ctrl_parallel_key_req.1761036546 Mar 31 03:30:30 PM PDT 24 Mar 31 03:31:07 PM PDT 24 1464692655 ps
T1162 /workspace/coverage/default/39.otp_ctrl_alert_test.3185696951 Mar 31 03:31:26 PM PDT 24 Mar 31 03:31:28 PM PDT 24 82272714 ps
T1163 /workspace/coverage/default/5.otp_ctrl_dai_errs.9904739 Mar 31 03:28:58 PM PDT 24 Mar 31 03:29:18 PM PDT 24 708760294 ps
T1164 /workspace/coverage/default/6.otp_ctrl_test_access.1330494285 Mar 31 03:29:02 PM PDT 24 Mar 31 03:29:09 PM PDT 24 3188600378 ps
T1165 /workspace/coverage/default/40.otp_ctrl_test_access.1994423689 Mar 31 03:31:27 PM PDT 24 Mar 31 03:31:38 PM PDT 24 634057652 ps
T1166 /workspace/coverage/default/56.otp_ctrl_parallel_lc_esc.275360422 Mar 31 03:32:13 PM PDT 24 Mar 31 03:32:29 PM PDT 24 6788708619 ps
T1167 /workspace/coverage/default/144.otp_ctrl_parallel_lc_esc.2052337573 Mar 31 03:33:14 PM PDT 24 Mar 31 03:33:32 PM PDT 24 305240852 ps
T1168 /workspace/coverage/default/41.otp_ctrl_init_fail.2687253591 Mar 31 03:31:31 PM PDT 24 Mar 31 03:31:39 PM PDT 24 2747224374 ps
T1169 /workspace/coverage/default/121.otp_ctrl_init_fail.653450795 Mar 31 03:32:59 PM PDT 24 Mar 31 03:33:07 PM PDT 24 2049526145 ps
T1170 /workspace/coverage/default/14.otp_ctrl_parallel_lc_esc.3611772029 Mar 31 03:29:39 PM PDT 24 Mar 31 03:29:52 PM PDT 24 882695611 ps
T1171 /workspace/coverage/default/43.otp_ctrl_dai_lock.480399234 Mar 31 03:31:37 PM PDT 24 Mar 31 03:31:51 PM PDT 24 801102957 ps
T1172 /workspace/coverage/default/16.otp_ctrl_dai_lock.709366713 Mar 31 03:29:53 PM PDT 24 Mar 31 03:30:07 PM PDT 24 1661135972 ps
T1173 /workspace/coverage/default/30.otp_ctrl_init_fail.2294481180 Mar 31 03:30:49 PM PDT 24 Mar 31 03:30:54 PM PDT 24 2826739647 ps
T1174 /workspace/coverage/default/26.otp_ctrl_init_fail.151027681 Mar 31 03:30:32 PM PDT 24 Mar 31 03:30:35 PM PDT 24 130050930 ps
T1175 /workspace/coverage/default/41.otp_ctrl_regwen.150086513 Mar 31 03:31:31 PM PDT 24 Mar 31 03:31:38 PM PDT 24 1874633337 ps
T1176 /workspace/coverage/default/17.otp_ctrl_regwen.2185898790 Mar 31 03:29:54 PM PDT 24 Mar 31 03:30:00 PM PDT 24 169778426 ps
T1177 /workspace/coverage/default/152.otp_ctrl_init_fail.2515040569 Mar 31 03:33:19 PM PDT 24 Mar 31 03:33:23 PM PDT 24 156276783 ps
T1178 /workspace/coverage/default/7.otp_ctrl_parallel_key_req.3886975911 Mar 31 03:29:10 PM PDT 24 Mar 31 03:29:35 PM PDT 24 10272407820 ps
T1179 /workspace/coverage/default/157.otp_ctrl_init_fail.576360054 Mar 31 03:33:21 PM PDT 24 Mar 31 03:33:25 PM PDT 24 156055934 ps
T1180 /workspace/coverage/default/29.otp_ctrl_macro_errs.1825979371 Mar 31 03:30:43 PM PDT 24 Mar 31 03:30:47 PM PDT 24 291697319 ps
T1181 /workspace/coverage/default/15.otp_ctrl_stress_all.3951578910 Mar 31 03:29:48 PM PDT 24 Mar 31 03:36:12 PM PDT 24 77734724600 ps
T1182 /workspace/coverage/default/17.otp_ctrl_parallel_key_req.2598109025 Mar 31 03:29:51 PM PDT 24 Mar 31 03:30:22 PM PDT 24 1253212384 ps
T1183 /workspace/coverage/default/120.otp_ctrl_init_fail.3628661596 Mar 31 03:32:58 PM PDT 24 Mar 31 03:33:03 PM PDT 24 107223073 ps
T1184 /workspace/coverage/default/27.otp_ctrl_check_fail.3270433691 Mar 31 03:30:36 PM PDT 24 Mar 31 03:30:49 PM PDT 24 990570566 ps
T90 /workspace/coverage/default/43.otp_ctrl_check_fail.3458156347 Mar 31 03:31:48 PM PDT 24 Mar 31 03:32:06 PM PDT 24 2548902448 ps
T1185 /workspace/coverage/default/40.otp_ctrl_parallel_key_req.4246110264 Mar 31 03:31:26 PM PDT 24 Mar 31 03:31:42 PM PDT 24 440014926 ps
T1186 /workspace/coverage/default/43.otp_ctrl_macro_errs.141569391 Mar 31 03:31:41 PM PDT 24 Mar 31 03:32:07 PM PDT 24 3838730223 ps
T1187 /workspace/coverage/default/12.otp_ctrl_check_fail.3440242408 Mar 31 03:29:33 PM PDT 24 Mar 31 03:29:55 PM PDT 24 1298533338 ps
T1188 /workspace/coverage/default/8.otp_ctrl_stress_all.1631656487 Mar 31 03:29:13 PM PDT 24 Mar 31 03:30:29 PM PDT 24 10167497545 ps
T1189 /workspace/coverage/default/164.otp_ctrl_init_fail.3453390506 Mar 31 03:33:28 PM PDT 24 Mar 31 03:33:33 PM PDT 24 300089663 ps
T1190 /workspace/coverage/default/6.otp_ctrl_regwen.4243521879 Mar 31 03:29:02 PM PDT 24 Mar 31 03:29:13 PM PDT 24 285108361 ps
T1191 /workspace/coverage/default/27.otp_ctrl_init_fail.1407680195 Mar 31 03:30:37 PM PDT 24 Mar 31 03:30:41 PM PDT 24 115532890 ps
T304 /workspace/coverage/default/98.otp_ctrl_stress_all_with_rand_reset.899985251 Mar 31 03:32:52 PM PDT 24 Mar 31 04:11:20 PM PDT 24 156898874189 ps
T1192 /workspace/coverage/default/80.otp_ctrl_init_fail.1531405898 Mar 31 03:32:30 PM PDT 24 Mar 31 03:32:37 PM PDT 24 2263614437 ps
T1193 /workspace/coverage/default/33.otp_ctrl_init_fail.3601768791 Mar 31 03:30:58 PM PDT 24 Mar 31 03:31:02 PM PDT 24 214666799 ps
T1194 /workspace/coverage/default/11.otp_ctrl_macro_errs.2449312933 Mar 31 03:29:25 PM PDT 24 Mar 31 03:29:57 PM PDT 24 1060190986 ps
T1195 /workspace/coverage/default/34.otp_ctrl_smoke.1330377543 Mar 31 03:31:01 PM PDT 24 Mar 31 03:31:07 PM PDT 24 392950515 ps
T1196 /workspace/coverage/default/36.otp_ctrl_parallel_lc_req.1765701984 Mar 31 03:31:10 PM PDT 24 Mar 31 03:31:26 PM PDT 24 912722596 ps
T264 /workspace/coverage/cover_reg_top/14.otp_ctrl_csr_rw.804721717 Mar 31 12:48:00 PM PDT 24 Mar 31 12:48:02 PM PDT 24 589035804 ps
T1197 /workspace/coverage/cover_reg_top/45.otp_ctrl_intr_test.1990015174 Mar 31 12:48:13 PM PDT 24 Mar 31 12:48:14 PM PDT 24 55645778 ps
T260 /workspace/coverage/cover_reg_top/16.otp_ctrl_tl_intg_err.2770416774 Mar 31 12:48:06 PM PDT 24 Mar 31 12:48:28 PM PDT 24 10193532175 ps
T1198 /workspace/coverage/cover_reg_top/0.otp_ctrl_mem_walk.4234361960 Mar 31 12:47:23 PM PDT 24 Mar 31 12:47:25 PM PDT 24 140588696 ps
T263 /workspace/coverage/cover_reg_top/15.otp_ctrl_same_csr_outstanding.3181003073 Mar 31 12:48:07 PM PDT 24 Mar 31 12:48:10 PM PDT 24 156195627 ps
T1199 /workspace/coverage/cover_reg_top/4.otp_ctrl_tl_errors.255668551 Mar 31 12:47:38 PM PDT 24 Mar 31 12:47:41 PM PDT 24 335409569 ps
T261 /workspace/coverage/cover_reg_top/0.otp_ctrl_tl_intg_err.3712593438 Mar 31 12:47:22 PM PDT 24 Mar 31 12:47:32 PM PDT 24 706910844 ps
T262 /workspace/coverage/cover_reg_top/1.otp_ctrl_tl_intg_err.1624575829 Mar 31 12:47:30 PM PDT 24 Mar 31 12:47:54 PM PDT 24 19119734907 ps
T1200 /workspace/coverage/cover_reg_top/39.otp_ctrl_intr_test.2078392351 Mar 31 12:48:12 PM PDT 24 Mar 31 12:48:14 PM PDT 24 41199262 ps
T329 /workspace/coverage/cover_reg_top/16.otp_ctrl_same_csr_outstanding.219316660 Mar 31 12:48:09 PM PDT 24 Mar 31 12:48:11 PM PDT 24 185702754 ps
T330 /workspace/coverage/cover_reg_top/4.otp_ctrl_same_csr_outstanding.1142802281 Mar 31 12:47:43 PM PDT 24 Mar 31 12:47:47 PM PDT 24 120860071 ps
T331 /workspace/coverage/cover_reg_top/10.otp_ctrl_same_csr_outstanding.1921186607 Mar 31 12:48:02 PM PDT 24 Mar 31 12:48:05 PM PDT 24 383629393 ps
T332 /workspace/coverage/cover_reg_top/17.otp_ctrl_same_csr_outstanding.1885303086 Mar 31 12:48:08 PM PDT 24 Mar 31 12:48:10 PM PDT 24 66830198 ps
T333 /workspace/coverage/cover_reg_top/14.otp_ctrl_same_csr_outstanding.538706256 Mar 31 12:48:01 PM PDT 24 Mar 31 12:48:06 PM PDT 24 1616848437 ps
T314 /workspace/coverage/cover_reg_top/3.otp_ctrl_csr_bit_bash.1675055759 Mar 31 12:47:37 PM PDT 24 Mar 31 12:47:41 PM PDT 24 173847136 ps
T334 /workspace/coverage/cover_reg_top/8.otp_ctrl_same_csr_outstanding.2465993271 Mar 31 12:47:50 PM PDT 24 Mar 31 12:47:52 PM PDT 24 79052044 ps
T1201 /workspace/coverage/cover_reg_top/14.otp_ctrl_tl_errors.2169719586 Mar 31 12:47:59 PM PDT 24 Mar 31 12:48:06 PM PDT 24 312368965 ps
T335 /workspace/coverage/cover_reg_top/6.otp_ctrl_same_csr_outstanding.1356596561 Mar 31 12:47:50 PM PDT 24 Mar 31 12:47:55 PM PDT 24 1474923907 ps
T1202 /workspace/coverage/cover_reg_top/2.otp_ctrl_csr_aliasing.3254913183 Mar 31 12:47:39 PM PDT 24 Mar 31 12:47:44 PM PDT 24 104978877 ps
T1203 /workspace/coverage/cover_reg_top/26.otp_ctrl_intr_test.2522238091 Mar 31 12:48:14 PM PDT 24 Mar 31 12:48:15 PM PDT 24 49674994 ps
T336 /workspace/coverage/cover_reg_top/5.otp_ctrl_csr_rw.63508536 Mar 31 12:47:43 PM PDT 24 Mar 31 12:47:45 PM PDT 24 173406997 ps
T1204 /workspace/coverage/cover_reg_top/38.otp_ctrl_intr_test.2591253257 Mar 31 12:48:13 PM PDT 24 Mar 31 12:48:16 PM PDT 24 570678182 ps
T305 /workspace/coverage/cover_reg_top/18.otp_ctrl_csr_rw.4246222363 Mar 31 12:48:08 PM PDT 24 Mar 31 12:48:10 PM PDT 24 38946541 ps
T1205 /workspace/coverage/cover_reg_top/15.otp_ctrl_tl_errors.1915904515 Mar 31 12:48:07 PM PDT 24 Mar 31 12:48:12 PM PDT 24 80639784 ps
T1206 /workspace/coverage/cover_reg_top/0.otp_ctrl_same_csr_outstanding.4258270181 Mar 31 12:47:31 PM PDT 24 Mar 31 12:47:33 PM PDT 24 128866288 ps
T1207 /workspace/coverage/cover_reg_top/48.otp_ctrl_intr_test.2369870824 Mar 31 12:48:14 PM PDT 24 Mar 31 12:48:16 PM PDT 24 77492555 ps
T1208 /workspace/coverage/cover_reg_top/2.otp_ctrl_intr_test.1638624999 Mar 31 12:47:36 PM PDT 24 Mar 31 12:47:38 PM PDT 24 146093852 ps
T1209 /workspace/coverage/cover_reg_top/0.otp_ctrl_intr_test.1148315167 Mar 31 12:47:21 PM PDT 24 Mar 31 12:47:23 PM PDT 24 74783772 ps
T1210 /workspace/coverage/cover_reg_top/2.otp_ctrl_same_csr_outstanding.1976994329 Mar 31 12:47:37 PM PDT 24 Mar 31 12:47:39 PM PDT 24 126637580 ps
T1211 /workspace/coverage/cover_reg_top/42.otp_ctrl_intr_test.1706708679 Mar 31 12:48:11 PM PDT 24 Mar 31 12:48:13 PM PDT 24 65873334 ps
T1212 /workspace/coverage/cover_reg_top/36.otp_ctrl_intr_test.2318570381 Mar 31 12:48:12 PM PDT 24 Mar 31 12:48:13 PM PDT 24 79460378 ps
T384 /workspace/coverage/cover_reg_top/8.otp_ctrl_csr_rw.2192667457 Mar 31 12:47:52 PM PDT 24 Mar 31 12:47:54 PM PDT 24 107514659 ps
T1213 /workspace/coverage/cover_reg_top/22.otp_ctrl_intr_test.379153757 Mar 31 12:48:23 PM PDT 24 Mar 31 12:48:25 PM PDT 24 53281247 ps
T267 /workspace/coverage/cover_reg_top/19.otp_ctrl_tl_intg_err.2730252617 Mar 31 12:48:08 PM PDT 24 Mar 31 12:48:25 PM PDT 24 10471457339 ps
T1214 /workspace/coverage/cover_reg_top/13.otp_ctrl_csr_rw.1807573763 Mar 31 12:48:00 PM PDT 24 Mar 31 12:48:02 PM PDT 24 140663891 ps
T268 /workspace/coverage/cover_reg_top/6.otp_ctrl_tl_intg_err.3217597320 Mar 31 12:47:42 PM PDT 24 Mar 31 12:48:00 PM PDT 24 1280632867 ps
T1215 /workspace/coverage/cover_reg_top/8.otp_ctrl_intr_test.589630101 Mar 31 12:47:50 PM PDT 24 Mar 31 12:47:52 PM PDT 24 68789313 ps
T1216 /workspace/coverage/cover_reg_top/16.otp_ctrl_csr_rw.2102141973 Mar 31 12:48:07 PM PDT 24 Mar 31 12:48:09 PM PDT 24 40505043 ps
T1217 /workspace/coverage/cover_reg_top/9.otp_ctrl_same_csr_outstanding.2585817102 Mar 31 12:47:52 PM PDT 24 Mar 31 12:47:54 PM PDT 24 131293134 ps
T1218 /workspace/coverage/cover_reg_top/19.otp_ctrl_same_csr_outstanding.3826505715 Mar 31 12:48:07 PM PDT 24 Mar 31 12:48:09 PM PDT 24 53872780 ps
T1219 /workspace/coverage/cover_reg_top/41.otp_ctrl_intr_test.3367614941 Mar 31 12:48:13 PM PDT 24 Mar 31 12:48:15 PM PDT 24 93309414 ps
T367 /workspace/coverage/cover_reg_top/17.otp_ctrl_tl_intg_err.2553123666 Mar 31 12:48:08 PM PDT 24 Mar 31 12:48:40 PM PDT 24 20181222648 ps
T1220 /workspace/coverage/cover_reg_top/3.otp_ctrl_same_csr_outstanding.3933336563 Mar 31 12:47:36 PM PDT 24 Mar 31 12:47:40 PM PDT 24 523993480 ps
T1221 /workspace/coverage/cover_reg_top/18.otp_ctrl_csr_mem_rw_with_rand_reset.2074243374 Mar 31 12:48:07 PM PDT 24 Mar 31 12:48:10 PM PDT 24 131721513 ps
T1222 /workspace/coverage/cover_reg_top/19.otp_ctrl_intr_test.3297471909 Mar 31 12:48:06 PM PDT 24 Mar 31 12:48:08 PM PDT 24 565810279 ps
T1223 /workspace/coverage/cover_reg_top/1.otp_ctrl_intr_test.2027487158 Mar 31 12:47:28 PM PDT 24 Mar 31 12:47:30 PM PDT 24 85653164 ps
T1224 /workspace/coverage/cover_reg_top/47.otp_ctrl_intr_test.2350389851 Mar 31 12:48:12 PM PDT 24 Mar 31 12:48:14 PM PDT 24 71429720 ps
T1225 /workspace/coverage/cover_reg_top/10.otp_ctrl_csr_mem_rw_with_rand_reset.1415652978 Mar 31 12:47:59 PM PDT 24 Mar 31 12:48:03 PM PDT 24 227973980 ps
T1226 /workspace/coverage/cover_reg_top/0.otp_ctrl_mem_partial_access.3451640599 Mar 31 12:47:29 PM PDT 24 Mar 31 12:47:31 PM PDT 24 553635078 ps
T1227 /workspace/coverage/cover_reg_top/15.otp_ctrl_csr_rw.1724967544 Mar 31 12:48:06 PM PDT 24 Mar 31 12:48:08 PM PDT 24 159814823 ps
T1228 /workspace/coverage/cover_reg_top/0.otp_ctrl_tl_errors.3758795514 Mar 31 12:47:21 PM PDT 24 Mar 31 12:47:26 PM PDT 24 856255344 ps
T1229 /workspace/coverage/cover_reg_top/23.otp_ctrl_intr_test.3578290512 Mar 31 12:48:12 PM PDT 24 Mar 31 12:48:15 PM PDT 24 601184387 ps
T1230 /workspace/coverage/cover_reg_top/15.otp_ctrl_csr_mem_rw_with_rand_reset.2014903607 Mar 31 12:48:08 PM PDT 24 Mar 31 12:48:11 PM PDT 24 108765090 ps
T1231 /workspace/coverage/cover_reg_top/3.otp_ctrl_csr_rw.2977322672 Mar 31 12:47:39 PM PDT 24 Mar 31 12:47:41 PM PDT 24 180620207 ps
T1232 /workspace/coverage/cover_reg_top/2.otp_ctrl_mem_partial_access.3735343193 Mar 31 12:47:39 PM PDT 24 Mar 31 12:47:41 PM PDT 24 45983703 ps
T1233 /workspace/coverage/cover_reg_top/7.otp_ctrl_intr_test.1360154030 Mar 31 12:47:42 PM PDT 24 Mar 31 12:47:43 PM PDT 24 41648568 ps
T1234 /workspace/coverage/cover_reg_top/12.otp_ctrl_tl_errors.2002436622 Mar 31 12:47:59 PM PDT 24 Mar 31 12:48:04 PM PDT 24 78795097 ps
T1235 /workspace/coverage/cover_reg_top/8.otp_ctrl_tl_errors.2002612009 Mar 31 12:47:53 PM PDT 24 Mar 31 12:47:59 PM PDT 24 159997160 ps
T1236 /workspace/coverage/cover_reg_top/1.otp_ctrl_tl_errors.870436800 Mar 31 12:47:28 PM PDT 24 Mar 31 12:47:35 PM PDT 24 151482301 ps
T1237 /workspace/coverage/cover_reg_top/6.otp_ctrl_tl_errors.138662298 Mar 31 12:47:42 PM PDT 24 Mar 31 12:47:45 PM PDT 24 120206142 ps
T306 /workspace/coverage/cover_reg_top/17.otp_ctrl_csr_rw.4205448389 Mar 31 12:48:07 PM PDT 24 Mar 31 12:48:09 PM PDT 24 85937949 ps
T1238 /workspace/coverage/cover_reg_top/28.otp_ctrl_intr_test.3907841855 Mar 31 12:48:15 PM PDT 24 Mar 31 12:48:16 PM PDT 24 129415347 ps
T1239 /workspace/coverage/cover_reg_top/16.otp_ctrl_tl_errors.1590699532 Mar 31 12:48:06 PM PDT 24 Mar 31 12:48:10 PM PDT 24 217065343 ps
T1240 /workspace/coverage/cover_reg_top/1.otp_ctrl_same_csr_outstanding.2626659832 Mar 31 12:47:29 PM PDT 24 Mar 31 12:47:31 PM PDT 24 46508614 ps
T1241 /workspace/coverage/cover_reg_top/19.otp_ctrl_tl_errors.2800252736 Mar 31 12:48:06 PM PDT 24 Mar 31 12:48:10 PM PDT 24 165881783 ps
T1242 /workspace/coverage/cover_reg_top/7.otp_ctrl_csr_mem_rw_with_rand_reset.3967812391 Mar 31 12:47:43 PM PDT 24 Mar 31 12:47:46 PM PDT 24 74898591 ps
T307 /workspace/coverage/cover_reg_top/11.otp_ctrl_csr_rw.3545944825 Mar 31 12:47:59 PM PDT 24 Mar 31 12:48:01 PM PDT 24 554011514 ps
T1243 /workspace/coverage/cover_reg_top/6.otp_ctrl_csr_mem_rw_with_rand_reset.4246481536 Mar 31 12:47:46 PM PDT 24 Mar 31 12:47:49 PM PDT 24 131168703 ps
T1244 /workspace/coverage/cover_reg_top/15.otp_ctrl_intr_test.2696625076 Mar 31 12:48:11 PM PDT 24 Mar 31 12:48:12 PM PDT 24 42363715 ps
T1245 /workspace/coverage/cover_reg_top/40.otp_ctrl_intr_test.2606061495 Mar 31 12:48:16 PM PDT 24 Mar 31 12:48:17 PM PDT 24 69343701 ps
T1246 /workspace/coverage/cover_reg_top/5.otp_ctrl_csr_mem_rw_with_rand_reset.4255267378 Mar 31 12:47:44 PM PDT 24 Mar 31 12:47:46 PM PDT 24 78978817 ps
T308 /workspace/coverage/cover_reg_top/0.otp_ctrl_csr_rw.4032227511 Mar 31 12:47:30 PM PDT 24 Mar 31 12:47:31 PM PDT 24 42232129 ps
T1247 /workspace/coverage/cover_reg_top/3.otp_ctrl_intr_test.1441343180 Mar 31 12:47:37 PM PDT 24 Mar 31 12:47:39 PM PDT 24 38736286 ps
T1248 /workspace/coverage/cover_reg_top/18.otp_ctrl_tl_errors.2772255141 Mar 31 12:48:08 PM PDT 24 Mar 31 12:48:14 PM PDT 24 615669061 ps
T265 /workspace/coverage/cover_reg_top/5.otp_ctrl_tl_intg_err.3641289748 Mar 31 12:47:50 PM PDT 24 Mar 31 12:48:07 PM PDT 24 1252017537 ps
T1249 /workspace/coverage/cover_reg_top/12.otp_ctrl_same_csr_outstanding.1455858494 Mar 31 12:48:01 PM PDT 24 Mar 31 12:48:03 PM PDT 24 123642707 ps
T1250 /workspace/coverage/cover_reg_top/6.otp_ctrl_csr_rw.3728503191 Mar 31 12:47:44 PM PDT 24 Mar 31 12:47:46 PM PDT 24 49981040 ps
T1251 /workspace/coverage/cover_reg_top/44.otp_ctrl_intr_test.3899869921 Mar 31 12:48:15 PM PDT 24 Mar 31 12:48:17 PM PDT 24 38407489 ps
T1252 /workspace/coverage/cover_reg_top/2.otp_ctrl_tl_intg_err.914023184 Mar 31 12:47:37 PM PDT 24 Mar 31 12:47:46 PM PDT 24 664777965 ps
T1253 /workspace/coverage/cover_reg_top/43.otp_ctrl_intr_test.406904796 Mar 31 12:48:13 PM PDT 24 Mar 31 12:48:15 PM PDT 24 80097664 ps
T1254 /workspace/coverage/cover_reg_top/11.otp_ctrl_intr_test.4070844491 Mar 31 12:47:59 PM PDT 24 Mar 31 12:48:01 PM PDT 24 50836038 ps
T1255 /workspace/coverage/cover_reg_top/13.otp_ctrl_same_csr_outstanding.497980170 Mar 31 12:48:04 PM PDT 24 Mar 31 12:48:06 PM PDT 24 89407971 ps
T1256 /workspace/coverage/cover_reg_top/1.otp_ctrl_csr_mem_rw_with_rand_reset.1589105517 Mar 31 12:47:30 PM PDT 24 Mar 31 12:47:32 PM PDT 24 1097497097 ps
T1257 /workspace/coverage/cover_reg_top/2.otp_ctrl_csr_bit_bash.1556748250 Mar 31 12:47:36 PM PDT 24 Mar 31 12:47:45 PM PDT 24 5577789033 ps
T1258 /workspace/coverage/cover_reg_top/25.otp_ctrl_intr_test.4104299302 Mar 31 12:48:12 PM PDT 24 Mar 31 12:48:13 PM PDT 24 565282529 ps
T1259 /workspace/coverage/cover_reg_top/14.otp_ctrl_csr_mem_rw_with_rand_reset.1977292577 Mar 31 12:47:58 PM PDT 24 Mar 31 12:48:02 PM PDT 24 213770453 ps
T1260 /workspace/coverage/cover_reg_top/5.otp_ctrl_same_csr_outstanding.3018179000 Mar 31 12:47:49 PM PDT 24 Mar 31 12:47:52 PM PDT 24 665470273 ps
T1261 /workspace/coverage/cover_reg_top/49.otp_ctrl_intr_test.1028880825 Mar 31 12:48:23 PM PDT 24 Mar 31 12:48:25 PM PDT 24 78376873 ps
T1262 /workspace/coverage/cover_reg_top/0.otp_ctrl_csr_mem_rw_with_rand_reset.3888184781 Mar 31 12:47:29 PM PDT 24 Mar 31 12:47:33 PM PDT 24 136705434 ps
T1263 /workspace/coverage/cover_reg_top/24.otp_ctrl_intr_test.1326505055 Mar 31 12:48:23 PM PDT 24 Mar 31 12:48:24 PM PDT 24 143633173 ps
T1264 /workspace/coverage/cover_reg_top/17.otp_ctrl_intr_test.1625488844 Mar 31 12:48:06 PM PDT 24 Mar 31 12:48:07 PM PDT 24 43620773 ps
T1265 /workspace/coverage/cover_reg_top/13.otp_ctrl_tl_intg_err.1106898842 Mar 31 12:48:01 PM PDT 24 Mar 31 12:48:19 PM PDT 24 1663435792 ps
T1266 /workspace/coverage/cover_reg_top/19.otp_ctrl_csr_rw.3728415595 Mar 31 12:48:06 PM PDT 24 Mar 31 12:48:08 PM PDT 24 50625923 ps
T1267 /workspace/coverage/cover_reg_top/13.otp_ctrl_csr_mem_rw_with_rand_reset.3643158850 Mar 31 12:47:59 PM PDT 24 Mar 31 12:48:02 PM PDT 24 71931033 ps
T1268 /workspace/coverage/cover_reg_top/27.otp_ctrl_intr_test.1464420485 Mar 31 12:48:11 PM PDT 24 Mar 31 12:48:13 PM PDT 24 560032678 ps
T1269 /workspace/coverage/cover_reg_top/2.otp_ctrl_csr_rw.4272411327 Mar 31 12:47:37 PM PDT 24 Mar 31 12:47:38 PM PDT 24 43251366 ps
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