Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
dashboard | hierarchy | modlist | groups | tests | asserts

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 100.00 1 100 1 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

2 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64
tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64




Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0



Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 7516126 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 7472773 1 T1 251 T2 17 T3 264



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 8569527 1 T1 840 T2 1 T3 467
values[0x0] 2432817 1 T1 143 T2 43 T3 142
values[0x1] 3986555 1 T1 130 T2 43 T3 159



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 4837964 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 10150935 1 T1 482 T2 22 T3 389



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 54131 1 T1 2 T10 33 T11 4
valid_sources[0x01] 50324 1 T1 4 T3 2 T10 31
valid_sources[0x02] 51430 1 T1 6 T3 4 T10 29
valid_sources[0x03] 61381 1 T1 5 T3 1 T10 28
valid_sources[0x04] 51813 1 T1 2 T3 1 T10 39
valid_sources[0x05] 56620 1 T1 4 T3 1 T10 28
valid_sources[0x06] 61080 1 T1 3 T3 1 T10 34
valid_sources[0x07] 67782 1 T1 1 T3 7 T10 44
valid_sources[0x08] 51942 1 T1 3 T3 5 T10 39
valid_sources[0x09] 54482 1 T1 5 T3 5 T10 29
valid_sources[0x0a] 56571 1 T1 2 T3 4 T10 35
valid_sources[0x0b] 56619 1 T1 3 T3 3 T10 27
valid_sources[0x0c] 57957 1 T1 3 T2 87 T3 2
valid_sources[0x0d] 104685 1 T1 4 T3 1 T10 40
valid_sources[0x0e] 54715 1 T1 2 T3 2 T10 36
valid_sources[0x0f] 49892 1 T1 3 T3 4 T10 40
valid_sources[0x10] 55400 1 T1 3 T10 40 T11 4
valid_sources[0x11] 55467 1 T1 3 T3 3 T10 32
valid_sources[0x12] 64074 1 T1 6 T3 4 T10 53
valid_sources[0x13] 56030 1 T1 7 T3 5 T10 36
valid_sources[0x14] 51095 1 T1 8 T3 3 T10 25
valid_sources[0x15] 52913 1 T1 3 T3 2 T10 48
valid_sources[0x16] 57201 1 T1 3 T3 2 T10 33
valid_sources[0x17] 56213 1 T1 8 T3 2 T10 35
valid_sources[0x18] 54797 1 T1 7 T3 2 T10 44
valid_sources[0x19] 65121 1 T1 9 T3 1 T10 38
valid_sources[0x1a] 52140 1 T1 4 T10 42 T11 3
valid_sources[0x1b] 54244 1 T1 4 T3 4 T10 44
valid_sources[0x1c] 50887 1 T1 4 T3 6 T10 42
valid_sources[0x1d] 52349 1 T1 6 T3 4 T10 34
valid_sources[0x1e] 50957 1 T1 5 T3 4 T10 35
valid_sources[0x1f] 51792 1 T1 6 T3 1 T10 41
valid_sources[0x20] 50393 1 T1 1 T10 35 T5 116
valid_sources[0x21] 78171 1 T1 4 T3 5 T10 34
valid_sources[0x22] 50413 1 T1 6 T3 2 T10 31
valid_sources[0x23] 51326 1 T1 1 T3 5 T10 42
valid_sources[0x24] 67739 1 T1 4 T3 6 T10 29
valid_sources[0x25] 50522 1 T1 3 T3 2 T10 33
valid_sources[0x26] 53046 1 T1 3 T10 47 T11 2
valid_sources[0x27] 50567 1 T1 2 T3 3 T10 37
valid_sources[0x28] 65036 1 T1 7 T3 8 T10 40
valid_sources[0x29] 52939 1 T1 9 T3 2 T10 43
valid_sources[0x2a] 49067 1 T1 5 T3 3 T10 34
valid_sources[0x2b] 53558 1 T1 6 T3 2 T10 43
valid_sources[0x2c] 55304 1 T1 1 T3 2 T10 29
valid_sources[0x2d] 51473 1 T1 7 T3 1 T10 37
valid_sources[0x2e] 58129 1 T1 2 T10 42 T11 2
valid_sources[0x2f] 51178 1 T1 5 T3 1 T10 36
valid_sources[0x30] 169933 1 T1 4 T3 1 T10 33
valid_sources[0x31] 61930 1 T1 7 T3 1 T10 38
valid_sources[0x32] 55003 1 T1 4 T3 2 T10 39
valid_sources[0x33] 49318 1 T1 4 T3 3 T10 39
valid_sources[0x34] 56578 1 T1 2 T3 1 T10 29
valid_sources[0x35] 55446 1 T1 7 T3 2 T10 30
valid_sources[0x36] 61997 1 T1 7 T3 3 T10 33
valid_sources[0x37] 51057 1 T1 8 T3 8 T10 23
valid_sources[0x38] 64964 1 T1 1 T3 4 T10 49
valid_sources[0x39] 51421 1 T1 2 T10 48 T11 6
valid_sources[0x3a] 59175 1 T3 4 T10 40 T11 3
valid_sources[0x3b] 66574 1 T3 6 T10 35 T11 7
valid_sources[0x3c] 52001 1 T1 6 T3 1 T10 39
valid_sources[0x3d] 55077 1 T1 6 T10 32 T11 2
valid_sources[0x3e] 57462 1 T1 1 T3 3 T10 37
valid_sources[0x3f] 50643 1 T1 4 T3 1 T10 33
valid_sources[0x40] 51308 1 T1 6 T3 3 T10 45
valid_sources[0x41] 51864 1 T1 4 T3 2 T10 38
valid_sources[0x42] 50501 1 T1 3 T3 9 T10 31
valid_sources[0x43] 59236 1 T1 6 T3 6 T10 35
valid_sources[0x44] 52684 1 T1 7 T3 3 T10 46
valid_sources[0x45] 48715 1 T1 5 T3 3 T10 41
valid_sources[0x46] 58713 1 T1 3 T3 5 T10 33
valid_sources[0x47] 50345 1 T1 2 T3 3 T10 40
valid_sources[0x48] 56945 1 T1 3 T10 53 T11 5
valid_sources[0x49] 52255 1 T1 4 T7 1282 T10 28
valid_sources[0x4a] 57828 1 T1 9 T3 2 T10 29
valid_sources[0x4b] 85388 1 T1 1 T3 3 T10 25
valid_sources[0x4c] 52705 1 T1 4 T3 3 T10 40
valid_sources[0x4d] 59149 1 T1 4 T3 2 T10 33
valid_sources[0x4e] 55338 1 T1 2 T3 2 T10 34
valid_sources[0x4f] 65880 1 T1 8 T3 5 T10 45
valid_sources[0x50] 52692 1 T1 4 T3 1 T10 32
valid_sources[0x51] 53818 1 T1 6 T3 3 T10 44
valid_sources[0x52] 109127 1 T1 11 T3 1 T4 7893
valid_sources[0x53] 57149 1 T1 6 T3 1 T10 30
valid_sources[0x54] 51642 1 T1 3 T3 5 T10 46
valid_sources[0x55] 59522 1 T1 3 T3 3 T10 37
valid_sources[0x56] 60756 1 T1 6 T3 6 T10 36
valid_sources[0x57] 54991 1 T1 2 T3 5 T10 40
valid_sources[0x58] 57517 1 T1 3 T3 3 T10 31
valid_sources[0x59] 63882 1 T1 8 T3 1 T10 25
valid_sources[0x5a] 63323 1 T1 3 T3 3 T10 49
valid_sources[0x5b] 52187 1 T1 7 T3 10 T10 36
valid_sources[0x5c] 52309 1 T1 4 T3 4 T10 45
valid_sources[0x5d] 50799 1 T1 4 T3 2 T10 37
valid_sources[0x5e] 53412 1 T3 4 T10 37 T11 4
valid_sources[0x5f] 56986 1 T1 5 T3 4 T10 30
valid_sources[0x60] 105714 1 T1 6 T3 1 T10 45
valid_sources[0x61] 50635 1 T1 4 T3 1 T10 38
valid_sources[0x62] 54795 1 T1 8 T3 4 T10 39
valid_sources[0x63] 62328 1 T1 8 T3 3 T10 38
valid_sources[0x64] 52156 1 T10 43 T11 5 T5 130
valid_sources[0x65] 133323 1 T1 5 T3 3 T10 27
valid_sources[0x66] 56961 1 T1 5 T3 9 T10 36
valid_sources[0x67] 50404 1 T1 4 T3 1 T10 29
valid_sources[0x68] 56550 1 T1 7 T3 2 T10 48
valid_sources[0x69] 55947 1 T1 8 T3 3 T10 35
valid_sources[0x6a] 130239 1 T1 2 T3 6 T10 33
valid_sources[0x6b] 60340 1 T1 2 T10 38 T11 3
valid_sources[0x6c] 51370 1 T1 4 T3 5 T10 44
valid_sources[0x6d] 60049 1 T1 7 T10 41 T11 3
valid_sources[0x6e] 54911 1 T1 5 T3 3 T10 42
valid_sources[0x6f] 55479 1 T1 7 T3 6 T10 36
valid_sources[0x70] 71310 1 T1 3 T3 1 T10 36
valid_sources[0x71] 60704 1 T3 3 T10 43 T5 121
valid_sources[0x72] 50071 1 T1 3 T3 7 T10 28
valid_sources[0x73] 58333 1 T1 4 T3 4 T10 41
valid_sources[0x74] 52451 1 T1 4 T3 4 T10 40
valid_sources[0x75] 59738 1 T1 7 T3 2 T10 34
valid_sources[0x76] 52730 1 T1 2 T3 2 T10 40
valid_sources[0x77] 57375 1 T1 5 T10 34 T11 2
valid_sources[0x78] 52030 1 T1 2 T3 1 T10 56
valid_sources[0x79] 51337 1 T1 6 T10 38 T5 125
valid_sources[0x7a] 54890 1 T1 8 T3 2 T10 38
valid_sources[0x7b] 52029 1 T1 2 T3 6 T10 42
valid_sources[0x7c] 55034 1 T1 5 T3 2 T10 36
valid_sources[0x7d] 51015 1 T1 1 T3 3 T10 25
valid_sources[0x7e] 56294 1 T1 11 T10 52 T11 4
valid_sources[0x7f] 51085 1 T1 8 T3 3 T10 30
valid_sources[0x80] 50828 1 T1 3 T10 35 T5 114



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 3492663 1 T1 131 T2 1 T3 127
values[0x0] all_enables biggest_size 2028384 1 T1 70 T2 12 T3 81
values[0x1] all_enables biggest_size 1951726 1 T1 50 T2 4 T3 56


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 263724 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 9680992 1 T4 140 T10 200 T5 560



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 2473264 1 T4 70 T10 100 T5 280
values[0x0] 3631016 1 T4 31 T10 51 T5 131
values[0x1] 3840436 1 T4 39 T10 49 T5 149



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 95013 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 9849703 1 T4 140 T10 200 T5 560



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 39085 1 T4 4 T5 1 T6 3
valid_sources[0x01] 37691 1 T5 2 T6 1 T8 820
valid_sources[0x02] 38438 1 T10 9 T5 4 T6 10
valid_sources[0x03] 38511 1 T5 3 T6 6 T8 816
valid_sources[0x04] 40211 1 T5 2 T6 1 T8 783
valid_sources[0x05] 38808 1 T5 2 T6 1 T109 1
valid_sources[0x06] 40970 1 T5 1 T6 6 T8 804
valid_sources[0x07] 39582 1 T5 1 T6 3 T8 783
valid_sources[0x08] 41677 1 T5 1 T6 3 T8 764
valid_sources[0x09] 39539 1 T5 1 T6 2 T12 1
valid_sources[0x0a] 38017 1 T5 9 T6 5 T109 1
valid_sources[0x0b] 40849 1 T5 1 T6 3 T109 1
valid_sources[0x0c] 40037 1 T5 2 T6 4 T8 732
valid_sources[0x0d] 39335 1 T6 2 T8 816 T9 409
valid_sources[0x0e] 38480 1 T5 6 T6 1 T109 1
valid_sources[0x0f] 40643 1 T4 2 T5 1 T6 4
valid_sources[0x10] 38507 1 T5 1 T6 1 T109 1
valid_sources[0x11] 39098 1 T5 1 T6 1 T8 789
valid_sources[0x12] 38609 1 T5 1 T109 1 T8 801
valid_sources[0x13] 37452 1 T5 3 T6 3 T12 1
valid_sources[0x14] 39773 1 T10 1 T5 1 T12 1
valid_sources[0x15] 39882 1 T5 2 T6 6 T8 780
valid_sources[0x16] 39999 1 T5 3 T6 1 T109 1
valid_sources[0x17] 39306 1 T5 1 T6 12 T8 752
valid_sources[0x18] 39519 1 T5 3 T6 3 T109 1
valid_sources[0x19] 37787 1 T5 4 T6 2 T12 2
valid_sources[0x1a] 40179 1 T5 2 T6 6 T109 2
valid_sources[0x1b] 37465 1 T5 1 T6 1 T8 789
valid_sources[0x1c] 37932 1 T6 3 T109 1 T8 771
valid_sources[0x1d] 36372 1 T4 6 T5 6 T6 7
valid_sources[0x1e] 39660 1 T5 1 T6 3 T8 755
valid_sources[0x1f] 37132 1 T5 2 T8 740 T110 1
valid_sources[0x20] 37817 1 T4 2 T10 1 T5 4
valid_sources[0x21] 38281 1 T5 3 T6 3 T109 1
valid_sources[0x22] 37938 1 T5 4 T6 5 T12 5
valid_sources[0x23] 38342 1 T5 3 T6 1 T8 740
valid_sources[0x24] 40076 1 T5 3 T6 1 T12 1
valid_sources[0x25] 39661 1 T5 3 T6 7 T8 760
valid_sources[0x26] 37916 1 T4 3 T5 2 T6 2
valid_sources[0x27] 39334 1 T5 1 T6 2 T109 1
valid_sources[0x28] 38232 1 T5 2 T6 3 T109 2
valid_sources[0x29] 38656 1 T10 1 T5 5 T6 5
valid_sources[0x2a] 39416 1 T10 2 T5 5 T6 8
valid_sources[0x2b] 37648 1 T5 3 T12 3 T8 754
valid_sources[0x2c] 38989 1 T5 3 T6 2 T8 820
valid_sources[0x2d] 38715 1 T10 2 T5 3 T6 1
valid_sources[0x2e] 39891 1 T6 2 T8 799 T110 1
valid_sources[0x2f] 38456 1 T5 2 T6 5 T8 713
valid_sources[0x30] 37596 1 T6 3 T8 743 T9 320
valid_sources[0x31] 40808 1 T5 1 T6 3 T12 4
valid_sources[0x32] 38361 1 T4 7 T10 3 T5 3
valid_sources[0x33] 40292 1 T5 1 T8 790 T9 462
valid_sources[0x34] 40212 1 T5 5 T6 5 T8 779
valid_sources[0x35] 38204 1 T5 1 T6 1 T8 770
valid_sources[0x36] 38195 1 T5 1 T6 4 T8 829
valid_sources[0x37] 39109 1 T10 2 T5 6 T8 761
valid_sources[0x38] 37587 1 T5 1 T6 3 T8 763
valid_sources[0x39] 39193 1 T6 3 T109 1 T8 781
valid_sources[0x3a] 38179 1 T5 2 T6 1 T8 765
valid_sources[0x3b] 40746 1 T5 7 T6 5 T109 1
valid_sources[0x3c] 38155 1 T5 5 T8 719 T9 678
valid_sources[0x3d] 37001 1 T5 3 T6 13 T8 777
valid_sources[0x3e] 41202 1 T5 2 T6 1 T12 4
valid_sources[0x3f] 39436 1 T4 12 T8 791 T111 3
valid_sources[0x40] 37081 1 T4 20 T5 7 T6 6
valid_sources[0x41] 40266 1 T5 2 T6 3 T109 1
valid_sources[0x42] 38508 1 T5 2 T6 6 T8 760
valid_sources[0x43] 39418 1 T5 1 T6 6 T8 758
valid_sources[0x44] 39492 1 T6 2 T109 2 T8 764
valid_sources[0x45] 38553 1 T10 1 T5 2 T6 1
valid_sources[0x46] 39507 1 T10 2 T5 1 T8 827
valid_sources[0x47] 39602 1 T6 2 T108 1 T8 683
valid_sources[0x48] 37775 1 T10 1 T5 3 T6 8
valid_sources[0x49] 37983 1 T5 3 T109 1 T8 753
valid_sources[0x4a] 37295 1 T10 4 T5 2 T6 2
valid_sources[0x4b] 39586 1 T5 2 T6 6 T12 1
valid_sources[0x4c] 39522 1 T5 1 T6 1 T8 827
valid_sources[0x4d] 39688 1 T10 3 T5 1 T12 1
valid_sources[0x4e] 37369 1 T10 2 T5 1 T12 2
valid_sources[0x4f] 38089 1 T5 4 T6 3 T8 803
valid_sources[0x50] 39319 1 T5 3 T6 2 T8 775
valid_sources[0x51] 38168 1 T6 10 T8 779 T9 835
valid_sources[0x52] 39343 1 T5 3 T6 1 T12 3
valid_sources[0x53] 39797 1 T6 3 T8 819 T112 11
valid_sources[0x54] 38744 1 T10 5 T6 4 T109 2
valid_sources[0x55] 36024 1 T5 2 T6 7 T12 1
valid_sources[0x56] 40102 1 T5 2 T6 2 T8 760
valid_sources[0x57] 37059 1 T5 2 T8 760 T9 8
valid_sources[0x58] 40671 1 T5 6 T12 1 T109 1
valid_sources[0x59] 38879 1 T5 1 T6 2 T8 745
valid_sources[0x5a] 41410 1 T10 1 T5 2 T6 2
valid_sources[0x5b] 40577 1 T10 7 T5 4 T6 1
valid_sources[0x5c] 39068 1 T5 4 T6 2 T8 823
valid_sources[0x5d] 37137 1 T10 1 T5 4 T6 5
valid_sources[0x5e] 38246 1 T5 6 T6 2 T109 2
valid_sources[0x5f] 38829 1 T5 2 T8 740 T9 353
valid_sources[0x60] 38526 1 T5 2 T6 3 T12 1
valid_sources[0x61] 39440 1 T5 2 T6 4 T12 1
valid_sources[0x62] 39791 1 T6 6 T109 1 T8 837
valid_sources[0x63] 39082 1 T5 1 T6 5 T109 1
valid_sources[0x64] 38898 1 T10 7 T5 3 T6 1
valid_sources[0x65] 39270 1 T5 2 T109 1 T8 739
valid_sources[0x66] 37714 1 T10 3 T5 3 T6 2
valid_sources[0x67] 39392 1 T4 28 T5 4 T6 8
valid_sources[0x68] 39288 1 T5 4 T8 754 T110 1
valid_sources[0x69] 38251 1 T10 1 T5 7 T8 797
valid_sources[0x6a] 38978 1 T5 1 T6 5 T12 8
valid_sources[0x6b] 39558 1 T5 5 T6 1 T12 1
valid_sources[0x6c] 37413 1 T5 2 T109 1 T8 769
valid_sources[0x6d] 38151 1 T5 2 T6 1 T12 7
valid_sources[0x6e] 39603 1 T10 3 T5 4 T109 3
valid_sources[0x6f] 38269 1 T6 1 T108 2 T8 825
valid_sources[0x70] 38621 1 T5 1 T6 2 T12 4
valid_sources[0x71] 37324 1 T4 6 T5 6 T6 1
valid_sources[0x72] 40922 1 T5 6 T6 6 T8 793
valid_sources[0x73] 38217 1 T5 2 T8 797 T15 1
valid_sources[0x74] 37818 1 T5 5 T6 4 T8 826
valid_sources[0x75] 41354 1 T6 1 T108 1 T8 800
valid_sources[0x76] 37920 1 T10 2 T5 1 T6 3
valid_sources[0x77] 38758 1 T10 1 T5 4 T6 7
valid_sources[0x78] 38590 1 T10 1 T5 3 T6 2
valid_sources[0x79] 36498 1 T5 2 T6 1 T109 1
valid_sources[0x7a] 38806 1 T5 1 T6 1 T8 772
valid_sources[0x7b] 41580 1 T10 1 T6 4 T12 1
valid_sources[0x7c] 37178 1 T10 3 T5 4 T109 1
valid_sources[0x7d] 37593 1 T5 1 T8 764 T9 587
valid_sources[0x7e] 37409 1 T5 3 T6 3 T109 1
valid_sources[0x7f] 38289 1 T5 3 T6 1 T108 2
valid_sources[0x80] 38731 1 T10 2 T5 1 T6 5



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 2459255 1 T4 70 T10 100 T5 280
values[0x0] all_enables biggest_size 3613111 1 T4 31 T10 51 T5 131
values[0x1] all_enables biggest_size 3608626 1 T4 39 T10 49 T5 149

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