Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

2 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64
tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	7185892	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

7432486

1

T1

1996

T2

1762

T3

4310

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	8342534	1			T1	4857		T2	4442		T3	7710
values[0x0]	2389937	1			T1	224		T2	202		T3	680
values[0x1]	3885907	1			T1	232		T2	225		T3	711

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	4649560	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

9968818

1

T1

2809

T2

2574

T3

5324

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	52571	1			T2	24		T10	4		T6	33
valid_sources[0x01]	51358	1			T2	19		T10	4		T6	11
valid_sources[0x02]	69953	1			T2	16		T10	5		T6	19
valid_sources[0x03]	52733	1			T2	21		T10	5		T6	18
valid_sources[0x04]	62240	1			T2	15		T10	5		T6	40
valid_sources[0x05]	54130	1			T2	12		T10	4		T6	6
valid_sources[0x06]	49747	1			T2	13		T10	6		T6	7
valid_sources[0x07]	58041	1			T2	25		T10	5		T6	18
valid_sources[0x08]	51506	1			T2	26		T10	5		T6	37
valid_sources[0x09]	51488	1			T2	18		T10	3		T6	29
valid_sources[0x0a]	67250	1			T2	17		T10	1		T6	29
valid_sources[0x0b]	52043	1			T2	23		T10	4		T6	25
valid_sources[0x0c]	62357	1			T2	14		T10	5		T6	27
valid_sources[0x0d]	51644	1			T2	23		T10	3		T6	28
valid_sources[0x0e]	52977	1			T2	14		T10	10		T6	5
valid_sources[0x0f]	48573	1			T2	20		T10	7		T6	8
valid_sources[0x10]	49491	1			T2	22		T10	7		T6	3
valid_sources[0x11]	49395	1			T2	29		T10	3		T6	15
valid_sources[0x12]	49971	1			T2	9		T10	5		T6	19
valid_sources[0x13]	51011	1			T2	18		T10	8		T6	43
valid_sources[0x14]	53114	1			T2	18		T10	2		T6	19
valid_sources[0x15]	64170	1			T2	17		T10	5		T6	29
valid_sources[0x16]	52162	1			T2	8		T10	5		T6	18
valid_sources[0x17]	48480	1			T2	16		T10	8		T6	22
valid_sources[0x18]	53040	1			T2	23		T10	7		T6	14
valid_sources[0x19]	49904	1			T2	18		T10	7		T6	20
valid_sources[0x1a]	49031	1			T2	30		T10	2		T6	25
valid_sources[0x1b]	53408	1			T2	27		T10	5		T6	38
valid_sources[0x1c]	53451	1			T2	29		T10	7		T6	4
valid_sources[0x1d]	55168	1			T1	5313		T2	16		T10	6
valid_sources[0x1e]	61411	1			T2	21		T10	5		T6	63
valid_sources[0x1f]	54764	1			T2	23		T10	1		T6	18
valid_sources[0x20]	50283	1			T2	28		T10	4		T6	36
valid_sources[0x21]	56706	1			T2	16		T10	2		T6	31
valid_sources[0x22]	50859	1			T2	16		T10	6		T6	14
valid_sources[0x23]	57129	1			T2	21		T10	8		T6	35
valid_sources[0x24]	48683	1			T2	18		T10	5		T6	37
valid_sources[0x25]	55036	1			T2	17		T10	9		T6	18
valid_sources[0x26]	52727	1			T2	28		T10	6		T6	11
valid_sources[0x27]	53636	1			T2	15		T10	5		T6	12
valid_sources[0x28]	53122	1			T2	16		T10	7		T6	17
valid_sources[0x29]	50845	1			T2	24		T10	8		T6	18
valid_sources[0x2a]	50678	1			T2	22		T10	4		T6	4
valid_sources[0x2b]	49094	1			T2	22		T10	6		T6	15
valid_sources[0x2c]	75349	1			T2	18		T10	3		T6	36
valid_sources[0x2d]	53345	1			T2	17		T5	3229		T10	4
valid_sources[0x2e]	56379	1			T2	33		T10	7		T6	3
valid_sources[0x2f]	50143	1			T2	23		T10	4		T6	16
valid_sources[0x30]	53413	1			T2	21		T10	3		T6	23
valid_sources[0x31]	85864	1			T2	16		T10	6		T6	11
valid_sources[0x32]	49926	1			T2	15		T10	8		T6	17
valid_sources[0x33]	49962	1			T2	18		T10	8		T6	13
valid_sources[0x34]	56915	1			T2	17		T10	7		T6	16
valid_sources[0x35]	50733	1			T2	24		T10	1		T6	22
valid_sources[0x36]	50306	1			T2	20		T10	1		T6	34
valid_sources[0x37]	50643	1			T2	12		T10	5		T6	4
valid_sources[0x38]	54687	1			T2	21		T10	6		T6	24
valid_sources[0x39]	49853	1			T2	16		T10	6		T6	13
valid_sources[0x3a]	50430	1			T2	18		T10	4		T6	14
valid_sources[0x3b]	49002	1			T2	23		T10	4		T6	9
valid_sources[0x3c]	52600	1			T2	16		T10	7		T6	8
valid_sources[0x3d]	58273	1			T2	20		T10	4		T6	25
valid_sources[0x3e]	100406	1			T2	15		T10	4		T6	22
valid_sources[0x3f]	54292	1			T2	17		T10	6		T6	12
valid_sources[0x40]	50224	1			T2	13		T10	4		T6	17
valid_sources[0x41]	50689	1			T2	24		T10	5		T6	34
valid_sources[0x42]	55977	1			T2	21		T10	1		T6	50
valid_sources[0x43]	62198	1			T2	19		T10	9		T6	27
valid_sources[0x44]	50817	1			T2	21		T10	3		T6	20
valid_sources[0x45]	104530	1			T2	17		T10	6		T6	2
valid_sources[0x46]	58374	1			T2	13		T10	2		T6	17
valid_sources[0x47]	55344	1			T2	15		T10	4		T6	15
valid_sources[0x48]	51059	1			T2	23		T10	4		T6	10
valid_sources[0x49]	51270	1			T2	16		T10	10		T6	19
valid_sources[0x4a]	52920	1			T2	13		T10	2		T6	23
valid_sources[0x4b]	53354	1			T2	18		T10	4		T6	9
valid_sources[0x4c]	52911	1			T2	22		T10	3		T6	48
valid_sources[0x4d]	51021	1			T2	23		T10	4		T6	29
valid_sources[0x4e]	51912	1			T2	18		T10	5		T6	13
valid_sources[0x4f]	51583	1			T2	24		T10	5		T6	9
valid_sources[0x50]	56598	1			T2	19		T10	5		T6	35
valid_sources[0x51]	50210	1			T2	20		T10	9		T6	14
valid_sources[0x52]	57501	1			T2	17		T10	4		T6	23
valid_sources[0x53]	50511	1			T2	22		T10	5		T6	19
valid_sources[0x54]	49601	1			T2	17		T10	3		T6	26
valid_sources[0x55]	51427	1			T2	29		T10	5		T6	14
valid_sources[0x56]	63083	1			T2	18		T10	3		T6	25
valid_sources[0x57]	52802	1			T2	14		T10	3		T6	20
valid_sources[0x58]	56168	1			T2	19		T10	4		T6	35
valid_sources[0x59]	59201	1			T2	22		T10	4		T6	49
valid_sources[0x5a]	51800	1			T2	22		T10	3		T6	5
valid_sources[0x5b]	58073	1			T2	22		T10	10		T6	13
valid_sources[0x5c]	51771	1			T2	11		T10	8		T6	23
valid_sources[0x5d]	53428	1			T2	16		T10	6		T6	11
valid_sources[0x5e]	54059	1			T2	14		T10	4		T6	12
valid_sources[0x5f]	49809	1			T2	24		T10	3		T6	9
valid_sources[0x60]	49866	1			T2	12		T10	4		T6	11
valid_sources[0x61]	48879	1			T2	17		T10	8		T6	17
valid_sources[0x62]	66031	1			T2	16		T10	8		T6	20
valid_sources[0x63]	49807	1			T2	22		T10	1		T6	12
valid_sources[0x64]	52525	1			T2	11		T10	5		T6	9
valid_sources[0x65]	52252	1			T2	16		T10	8		T6	18
valid_sources[0x66]	50127	1			T2	11		T10	6		T6	53
valid_sources[0x67]	64176	1			T2	14		T10	8		T6	24
valid_sources[0x68]	53790	1			T2	23		T10	6		T6	23
valid_sources[0x69]	50040	1			T2	17		T10	6		T6	13
valid_sources[0x6a]	53418	1			T2	23		T10	5		T6	7
valid_sources[0x6b]	51209	1			T2	17		T10	5		T6	20
valid_sources[0x6c]	50452	1			T2	20		T10	6		T6	15
valid_sources[0x6d]	61137	1			T2	11		T10	7		T6	17
valid_sources[0x6e]	51758	1			T2	18		T10	5		T6	10
valid_sources[0x6f]	148737	1			T2	16		T10	10		T6	15
valid_sources[0x70]	50468	1			T2	16		T10	6		T6	32
valid_sources[0x71]	62337	1			T2	22		T10	4		T6	5
valid_sources[0x72]	49638	1			T2	12		T10	8		T6	34
valid_sources[0x73]	67461	1			T2	19		T10	7		T6	34
valid_sources[0x74]	52943	1			T2	15		T10	5		T6	14
valid_sources[0x75]	51845	1			T2	19		T10	2		T6	14
valid_sources[0x76]	64171	1			T2	19		T3	9101		T10	6
valid_sources[0x77]	52562	1			T2	21		T10	2		T6	28
valid_sources[0x78]	202871	1			T2	21		T10	2		T6	21
valid_sources[0x79]	56952	1			T2	12		T10	5		T6	23
valid_sources[0x7a]	59036	1			T2	22		T10	6		T6	14
valid_sources[0x7b]	50369	1			T2	22		T10	7		T6	6
valid_sources[0x7c]	52378	1			T2	17		T10	8		T6	13
valid_sources[0x7d]	61612	1			T2	15		T10	3		T6	15
valid_sources[0x7e]	50957	1			T2	20		T10	6		T6	12
valid_sources[0x7f]	55166	1			T2	27		T10	3		T6	13
valid_sources[0x80]	53287	1			T2	24		T10	4		T6	10

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

3545647

1

T1

1783

T2

1547

T3

3664

values[0x0]

all_enables

biggest_size

1985203

1

T1

125

T2

122

T3

364

values[0x1]

all_enables

biggest_size

1901636

1

T1

88

T2

93

T3

282

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	258457	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

9363138

1

T1

100

T2

120

T3

20

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	2392626	1			T1	50		T2	60		T3	10
values[0x0]	3509914	1			T1	29		T2	27		T3	1
values[0x1]	3719055	1			T1	21		T2	33		T3	9

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	93351	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

9528244

1

T1

100

T2

120

T3

20

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	39059	1			T12	2		T71	1		T8	498
valid_sources[0x01]	36694	1			T71	1		T8	434		T246	2
valid_sources[0x02]	36832	1			T8	488		T16	5		T232	6
valid_sources[0x03]	37370	1			T7	1		T8	393		T19	2
valid_sources[0x04]	38637	1			T7	2		T8	614		T150	1
valid_sources[0x05]	35484	1			T7	2		T71	1		T8	428
valid_sources[0x06]	37817	1			T3	1		T8	286		T16	5
valid_sources[0x07]	37502	1			T7	1		T71	1		T8	361
valid_sources[0x08]	36593	1			T12	1		T8	381		T16	6
valid_sources[0x09]	39833	1			T8	357		T150	2		T16	4
valid_sources[0x0a]	38463	1			T7	1		T8	335		T19	1
valid_sources[0x0b]	36500	1			T7	1		T8	549		T19	3
valid_sources[0x0c]	37073	1			T12	1		T8	437		T19	1
valid_sources[0x0d]	37799	1			T12	1		T8	392		T19	3
valid_sources[0x0e]	37831	1			T8	362		T19	1		T16	9
valid_sources[0x0f]	38710	1			T7	1		T8	541		T16	5
valid_sources[0x10]	37714	1			T8	328		T16	3		T127	1
valid_sources[0x11]	40199	1			T8	592		T16	4		T104	1
valid_sources[0x12]	39579	1			T2	10		T8	423		T16	1
valid_sources[0x13]	36357	1			T70	4		T71	2		T8	444
valid_sources[0x14]	37211	1			T8	297		T110	1		T19	1
valid_sources[0x15]	37022	1			T7	1		T8	486		T19	1
valid_sources[0x16]	36563	1			T8	409		T110	1		T19	2
valid_sources[0x17]	40897	1			T7	2		T8	464		T150	2
valid_sources[0x18]	37053	1			T8	397		T19	1		T16	7
valid_sources[0x19]	36876	1			T7	1		T8	262		T16	6
valid_sources[0x1a]	37055	1			T7	2		T8	426		T19	2
valid_sources[0x1b]	37414	1			T8	419		T19	2		T9	2
valid_sources[0x1c]	35435	1			T8	375		T19	1		T16	4
valid_sources[0x1d]	35666	1			T8	328		T150	3		T16	1
valid_sources[0x1e]	36401	1			T7	1		T8	427		T16	2
valid_sources[0x1f]	37128	1			T7	1		T8	401		T19	2
valid_sources[0x20]	37753	1			T7	2		T8	415		T16	9
valid_sources[0x21]	36017	1			T70	4		T8	477		T150	4
valid_sources[0x22]	40781	1			T8	355		T150	6		T16	2
valid_sources[0x23]	36093	1			T8	362		T110	1		T19	1
valid_sources[0x24]	37565	1			T2	15		T71	2		T8	454
valid_sources[0x25]	36631	1			T8	449		T110	1		T19	1
valid_sources[0x26]	36162	1			T12	1		T70	3		T8	512
valid_sources[0x27]	37441	1			T8	404		T16	2		T104	3
valid_sources[0x28]	35103	1			T3	1		T8	516		T150	1
valid_sources[0x29]	37128	1			T7	1		T71	3		T8	397
valid_sources[0x2a]	37334	1			T7	2		T8	434		T16	4
valid_sources[0x2b]	36952	1			T7	1		T71	2		T8	485
valid_sources[0x2c]	37363	1			T12	1		T71	1		T8	383
valid_sources[0x2d]	37883	1			T7	1		T8	469		T19	1
valid_sources[0x2e]	36100	1			T71	1		T8	370		T19	3
valid_sources[0x2f]	37631	1			T8	559		T16	2		T14	562
valid_sources[0x30]	37255	1			T8	294		T16	7		T127	1
valid_sources[0x31]	36924	1			T8	358		T19	1		T16	2
valid_sources[0x32]	35897	1			T8	544		T19	1		T16	7
valid_sources[0x33]	39498	1			T8	478		T19	1		T16	4
valid_sources[0x34]	37336	1			T8	529		T16	3		T106	4
valid_sources[0x35]	37031	1			T70	11		T8	388		T19	1
valid_sources[0x36]	37605	1			T3	1		T7	1		T70	5
valid_sources[0x37]	36789	1			T7	1		T12	1		T70	3
valid_sources[0x38]	38448	1			T7	1		T71	1		T8	355
valid_sources[0x39]	38562	1			T7	1		T8	575		T19	1
valid_sources[0x3a]	37146	1			T7	4		T71	2		T8	251
valid_sources[0x3b]	38980	1			T2	22		T8	306		T16	1
valid_sources[0x3c]	37786	1			T7	2		T8	448		T19	1
valid_sources[0x3d]	36103	1			T8	394		T110	1		T19	1
valid_sources[0x3e]	39303	1			T7	3		T8	514		T19	1
valid_sources[0x3f]	39031	1			T7	1		T8	450		T19	1
valid_sources[0x40]	38443	1			T8	399		T19	1		T150	2
valid_sources[0x41]	37189	1			T8	297		T19	1		T16	7
valid_sources[0x42]	36596	1			T8	543		T19	1		T150	1
valid_sources[0x43]	37269	1			T12	2		T71	1		T8	465
valid_sources[0x44]	37363	1			T7	1		T71	3		T8	442
valid_sources[0x45]	37809	1			T8	443		T19	4		T16	3
valid_sources[0x46]	37089	1			T8	445		T19	1		T16	6
valid_sources[0x47]	37941	1			T8	726		T150	8		T16	1
valid_sources[0x48]	39211	1			T8	485		T16	4		T14	545
valid_sources[0x49]	40045	1			T70	2		T8	432		T110	1
valid_sources[0x4a]	39318	1			T8	404		T19	1		T16	3
valid_sources[0x4b]	38009	1			T8	382		T16	8		T104	3
valid_sources[0x4c]	38774	1			T71	1		T8	376		T19	2
valid_sources[0x4d]	36921	1			T70	2		T8	479		T150	3
valid_sources[0x4e]	36257	1			T7	1		T8	432		T150	1
valid_sources[0x4f]	37824	1			T8	455		T150	4		T9	1
valid_sources[0x50]	36863	1			T3	2		T7	2		T8	371
valid_sources[0x51]	37049	1			T3	1		T8	447		T110	2
valid_sources[0x52]	39113	1			T7	2		T71	2		T8	362
valid_sources[0x53]	39119	1			T8	560		T150	2		T16	5
valid_sources[0x54]	37417	1			T8	388		T150	5		T16	2
valid_sources[0x55]	35503	1			T8	518		T19	2		T16	5
valid_sources[0x56]	36468	1			T8	487		T16	4		T14	594
valid_sources[0x57]	38405	1			T7	2		T71	1		T8	531
valid_sources[0x58]	38517	1			T8	408		T150	1		T16	3
valid_sources[0x59]	36736	1			T71	1		T8	441		T150	2
valid_sources[0x5a]	34829	1			T7	1		T8	550		T150	2
valid_sources[0x5b]	36951	1			T8	342		T19	1		T16	6
valid_sources[0x5c]	39770	1			T8	315		T19	1		T16	6
valid_sources[0x5d]	35909	1			T8	470		T16	4		T14	571
valid_sources[0x5e]	36980	1			T8	358		T16	2		T78	6
valid_sources[0x5f]	39199	1			T71	1		T8	562		T16	3
valid_sources[0x60]	36826	1			T7	2		T8	463		T16	5
valid_sources[0x61]	37678	1			T8	644		T150	3		T16	5
valid_sources[0x62]	38741	1			T7	1		T8	433		T19	4
valid_sources[0x63]	37308	1			T2	7		T8	430		T19	2
valid_sources[0x64]	37683	1			T8	347		T16	5		T104	2
valid_sources[0x65]	35484	1			T12	1		T8	413		T16	8
valid_sources[0x66]	37918	1			T7	3		T12	1		T71	2
valid_sources[0x67]	39201	1			T8	585		T19	2		T16	7
valid_sources[0x68]	38689	1			T7	2		T70	1		T71	1
valid_sources[0x69]	36957	1			T7	3		T8	393		T16	2
valid_sources[0x6a]	36573	1			T7	1		T71	1		T8	362
valid_sources[0x6b]	37778	1			T71	3		T8	487		T19	2
valid_sources[0x6c]	38839	1			T3	1		T7	1		T8	299
valid_sources[0x6d]	35007	1			T7	2		T71	2		T8	403
valid_sources[0x6e]	37895	1			T6	200		T7	1		T8	479
valid_sources[0x6f]	39169	1			T8	510		T19	2		T16	7
valid_sources[0x70]	37941	1			T8	543		T19	1		T16	4
valid_sources[0x71]	36960	1			T8	501		T19	1		T150	1
valid_sources[0x72]	37180	1			T7	1		T8	384		T110	1
valid_sources[0x73]	37926	1			T70	2		T71	3		T8	551
valid_sources[0x74]	37670	1			T7	1		T8	469		T16	5
valid_sources[0x75]	38811	1			T8	483		T19	2		T16	3
valid_sources[0x76]	39369	1			T10	80		T8	423		T19	1
valid_sources[0x77]	39108	1			T7	2		T8	426		T16	5
valid_sources[0x78]	38105	1			T8	227		T19	2		T16	1
valid_sources[0x79]	35033	1			T8	466		T19	1		T150	1
valid_sources[0x7a]	38140	1			T12	2		T8	389		T19	1
valid_sources[0x7b]	39395	1			T8	518		T19	1		T16	4
valid_sources[0x7c]	37093	1			T70	3		T8	411		T19	1
valid_sources[0x7d]	37322	1			T3	1		T7	2		T8	429
valid_sources[0x7e]	37278	1			T7	3		T8	577		T19	1
valid_sources[0x7f]	36537	1			T8	420		T16	3		T346	1
valid_sources[0x80]	36451	1			T71	1		T8	424		T19	1

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

2378729

1

T1

50

T2

60

T3

10

values[0x0]

all_enables

biggest_size

3492104

1

T1

29

T2

27

T3

1

values[0x1]

all_enables

biggest_size

3492305

1

T1

21

T2

33

T3

9